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[Qemu-commits] [qemu/qemu] 2627e4: accel/tcg: Allow the second page of a


From: Peter Maydell
Subject: [Qemu-commits] [qemu/qemu] 2627e4: accel/tcg: Allow the second page of an instruction...
Date: Fri, 24 Feb 2023 04:46:41 -0800

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 2627e4524ea6c6ba14f9d6b298e08c9d4d3cc4fe
      
https://github.com/qemu/qemu/commit/2627e4524ea6c6ba14f9d6b298e08c9d4d3cc4fe
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2023-02-21 (Tue, 21 Feb 2023)

  Changed paths:
    M accel/tcg/translator.c

  Log Message:
  -----------
  accel/tcg: Allow the second page of an instruction to be MMIO

If an instruction straddles a page boundary, and the first page
was ram, but the second page was MMIO, we would abort.  Handle
this as if both pages are MMIO, by setting the ram_addr_t for
the first page to -1.

Reported-by: Sid Manning <sidneym@quicinc.com>
Reported-by: Jørgen Hansen <Jorgen.Hansen@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 21a474c41d18eb56186e2022e8e081c2b6011bd3
      
https://github.com/qemu/qemu/commit/21a474c41d18eb56186e2022e8e081c2b6011bd3
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2023-02-21 (Tue, 21 Feb 2023)

  Changed paths:
    M linux-user/sparc/cpu_loop.c

  Log Message:
  -----------
  linux-user/sparc: Raise SIGILL for all unhandled software traps

The linux kernel's trap tables vector all unassigned trap
numbers to BAD_TRAP, which then raises SIGILL.

Tested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reported-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 7de0816f699553514016f52a76e26d1c2ae14034
      
https://github.com/qemu/qemu/commit/7de0816f699553514016f52a76e26d1c2ae14034
  Author: Ilya Leoshkevich <iii@linux.ibm.com>
  Date:   2023-02-21 (Tue, 21 Feb 2023)

  Changed paths:
    M linux-user/main.c
    M linux-user/syscall.c

  Log Message:
  -----------
  linux-user: Always exit from exclusive state in fork_end()

fork()ed processes currently start with
current_cpu->in_exclusive_context set, which is, strictly speaking, not
correct, but does not cause problems (even assertion failures).

With one of the next patches, the code begins to rely on this value, so
fix it by always calling end_exclusive() in fork_end().

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Message-Id: <20230214140829.45392-2-iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: df8a688032280ecd07ace7c6fbc70f5650cca9af
      
https://github.com/qemu/qemu/commit/df8a688032280ecd07ace7c6fbc70f5650cca9af
  Author: Ilya Leoshkevich <iii@linux.ibm.com>
  Date:   2023-02-21 (Tue, 21 Feb 2023)

  Changed paths:
    M cpus-common.c
    M include/hw/core/cpu.h

  Log Message:
  -----------
  cpus: Make {start,end}_exclusive() recursive

Currently dying to one of the core_dump_signal()s deadlocks, because
dump_core_and_abort() calls start_exclusive() two times: first via
stop_all_tasks(), and then via preexit_cleanup() ->
qemu_plugin_user_exit().

There are a number of ways to solve this: resume after dumping core;
check cpu_in_exclusive_context() in qemu_plugin_user_exit(); or make
{start,end}_exclusive() recursive. Pick the last option, since it's
the most straightforward one.

Fixes: da91c1920242 ("linux-user: Clean up when exiting due to a signal")
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Message-Id: <20230214140829.45392-3-iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: d7d5601c788b7972d7e62ce2e8af4587db9e2da1
      
https://github.com/qemu/qemu/commit/d7d5601c788b7972d7e62ce2e8af4587db9e2da1
  Author: Ilya Leoshkevich <iii@linux.ibm.com>
  Date:   2023-02-21 (Tue, 21 Feb 2023)

  Changed paths:
    M linux-user/microblaze/cpu_loop.c

  Log Message:
  -----------
  linux-user/microblaze: Handle privileged exception

Follow what kernel's full_exception() is doing.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Message-Id: <20230214140829.45392-4-iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: c3bef3b4de8e60affa6aa3a46dcfcf3bd09459a1
      
https://github.com/qemu/qemu/commit/c3bef3b4de8e60affa6aa3a46dcfcf3bd09459a1
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2023-02-21 (Tue, 21 Feb 2023)

  Changed paths:
    M configs/targets/microblaze-linux-user.mak
    M configs/targets/microblaze-softmmu.mak
    M configs/targets/microblazeel-linux-user.mak
    M configs/targets/microblazeel-softmmu.mak
    A gdb-xml/microblaze-core.xml
    A gdb-xml/microblaze-stack-protect.xml
    M target/microblaze/cpu.c
    M target/microblaze/cpu.h
    M target/microblaze/gdbstub.c

  Log Message:
  -----------
  target/microblaze: Add gdbstub xml

Mirroring the upstream gdb xml files, the two stack boundary
registers are separated out.

Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: b3c326029554a7d134e26e749240ba2d8ac288b1
      
https://github.com/qemu/qemu/commit/b3c326029554a7d134e26e749240ba2d8ac288b1
  Author: Pierrick Bouvier <pierrick.bouvier@linaro.org>
  Date:   2023-02-21 (Tue, 21 Feb 2023)

  Changed paths:
    M util/cacheflush.c

  Log Message:
  -----------
  util/cacheflush: fix cache on windows-arm64

ctr_el0 access is privileged on this platform and fails as an illegal
instruction.

Windows does not offer a way to flush data cache from userspace, and
only FlushInstructionCache is available in Windows API.

The generic implementation of flush_idcache_range uses,
__builtin___clear_cache, which already use the FlushInstructionCache
function. So we rely on that.

Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230221153006.20300-2-pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: dbd672c87f19949bb62bfb1fb3a97b9729fd7560
      
https://github.com/qemu/qemu/commit/dbd672c87f19949bb62bfb1fb3a97b9729fd7560
  Author: Pierrick Bouvier <pierrick.bouvier@linaro.org>
  Date:   2023-02-21 (Tue, 21 Feb 2023)

  Changed paths:
    M include/sysemu/os-win32.h
    M meson.build

  Log Message:
  -----------
  sysemu/os-win32: fix setjmp/longjmp on windows-arm64

Windows implementation of setjmp/longjmp is done in
C:/WINDOWS/system32/ucrtbase.dll. Alas, on arm64, it seems to *always*
perform stack unwinding, which crashes from generated code.

By using alternative implementation built in mingw, we avoid doing stack
unwinding and this fixes crash when calling longjmp.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230221153006.20300-3-pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: ed9128c177227bb8682deafd3530d49b059e03c4
      
https://github.com/qemu/qemu/commit/ed9128c177227bb8682deafd3530d49b059e03c4
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2023-02-24 (Fri, 24 Feb 2023)

  Changed paths:
    M accel/tcg/translator.c
    M configs/targets/microblaze-linux-user.mak
    M configs/targets/microblaze-softmmu.mak
    M configs/targets/microblazeel-linux-user.mak
    M configs/targets/microblazeel-softmmu.mak
    M cpus-common.c
    A gdb-xml/microblaze-core.xml
    A gdb-xml/microblaze-stack-protect.xml
    M include/hw/core/cpu.h
    M include/sysemu/os-win32.h
    M linux-user/main.c
    M linux-user/microblaze/cpu_loop.c
    M linux-user/sparc/cpu_loop.c
    M linux-user/syscall.c
    M meson.build
    M target/microblaze/cpu.c
    M target/microblaze/cpu.h
    M target/microblaze/gdbstub.c
    M util/cacheflush.c

  Log Message:
  -----------
  Merge tag 'pull-tcg-20230221' of https://gitlab.com/rth7680/qemu into staging

tcg: Allow first half of insn in ram, and second half in mmio
linux-user/sparc: SIGILL for unknown trap vectors
linux-user/microblaze: SIGILL for privileged insns
linux-user: Fix deadlock while exiting due to signal
target/microblaze: Add gdbstub xml
util: Adjust cacheflush for windows-arm64
include/sysemu/os-win32: Adjust setjmp/longjmp for windows-arm64

# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmP1dpkdHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+70gf+OOM3KmsFpsJ4+68W
# v/ulVwye3RFQXv4KRtuRPeKCKMk7vXmBRj9gsyOpc23TaoYiMNbFbztpAkcc/Z/1
# +6H8QeZGLWDqiX6ashwGNm/2bqPbvY7znaCvNuLkNGCPBeJ12C19uN1BBiGdeqOe
# IXIIk1r0U6rfIDhP2PJALXOxgHd/8/onYbhU6kU5tQjM24pycW44UUGPSeV++I0e
# xWezAYOmZ4PK58bXHDPMZ0UkzuefaNmiLlfwj/4nlaWQetwQTy7BeEU6FpKolUN2
# wrvfCqth/c3SdUaZHu4DoX1yWt72L37SpO0ijvk8E+AqsvXTn9gFdWK2dsEiPEeS
# Z9abFw==
# =dxZo
# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 22 Feb 2023 01:57:45 GMT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" 
[full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* tag 'pull-tcg-20230221' of https://gitlab.com/rth7680/qemu:
  sysemu/os-win32: fix setjmp/longjmp on windows-arm64
  util/cacheflush: fix cache on windows-arm64
  target/microblaze: Add gdbstub xml
  linux-user/microblaze: Handle privileged exception
  cpus: Make {start,end}_exclusive() recursive
  linux-user: Always exit from exclusive state in fork_end()
  linux-user/sparc: Raise SIGILL for all unhandled software traps
  accel/tcg: Allow the second page of an instruction to be MMIO

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Compare: https://github.com/qemu/qemu/compare/79b677d658d3...ed9128c17722



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