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[Qemu-commits] [qemu/qemu] 8063db: target/mips: Set CP0St_{KX, SX, UX} f
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From: |
Paolo Bonzini |
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Subject: |
[Qemu-commits] [qemu/qemu] 8063db: target/mips: Set CP0St_{KX, SX, UX} for Loongson-2F |
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Date: |
Tue, 08 Nov 2022 10:07:34 -0800 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 8063db0fc8256e3f6b9b33c246bd926f3a2dbb12
https://github.com/qemu/qemu/commit/8063db0fc8256e3f6b9b33c246bd926f3a2dbb12
Author: Jiaxun Yang <jiaxun.yang@flygoat.com>
Date: 2022-11-08 (Tue, 08 Nov 2022)
Changed paths:
M target/mips/cpu.c
Log Message:
-----------
target/mips: Set CP0St_{KX, SX, UX} for Loongson-2F
As per an unpublished document, in later reversion of chips
CP0St_{KX, SX, UX} is not writeable and hardcoded to 1.
Without those bits set, kernel is unable to access XKPHYS address
segment. So just set them up on CPU reset.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221031132531.18122-2-jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 0e8b3010afa7507f42754ebec16bbd4dfdb3a660
https://github.com/qemu/qemu/commit/0e8b3010afa7507f42754ebec16bbd4dfdb3a660
Author: Jiaxun Yang <jiaxun.yang@flygoat.com>
Date: 2022-11-08 (Tue, 08 Nov 2022)
Changed paths:
M target/mips/tcg/octeon.decode
Log Message:
-----------
target/mips: Cast offset field of Octeon BBIT to int16_t
As per "Cavium Networks OCTEON Plus CN50XX Hardware Reference
Manual" offset field is signed 16 bit value. However arg_BBIT.offset
is unsigned. We need to cast it as signed to do address calculation.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221031132531.18122-3-jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 4525ea7e0caa4aa6317204cd977179dea972cf6d
https://github.com/qemu/qemu/commit/4525ea7e0caa4aa6317204cd977179dea972cf6d
Author: Pavel Dovgalyuk <pavel.dovgalyuk@ispras.ru>
Date: 2022-11-08 (Tue, 08 Nov 2022)
Changed paths:
M target/mips/tcg/translate.c
Log Message:
-----------
target/mips: Enable LBX/LWX/* instructions for Octeon
This patch changes condition and function name for enabling
indexed load instructions for Octeon vCPUs. Octeons do not
have DSP extension, but implement LBX-and-others.
Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <166728058455.229236.13834649461181619195.stgit@pasha-ThinkPad-X280>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 4bfc895383ed65b83d55a8ae5738a166c1cc48f1
https://github.com/qemu/qemu/commit/4bfc895383ed65b83d55a8ae5738a166c1cc48f1
Author: Jiaxun Yang <jiaxun.yang@flygoat.com>
Date: 2022-11-08 (Tue, 08 Nov 2022)
Changed paths:
M target/mips/cpu-defs.c.inc
Log Message:
-----------
target/mips: Disable DSP ASE for Octeon68XX
I don't have access to Octeon68XX hardware but according
to my investigation Octeon never had DSP ASE support.
As per "Cavium Networks OCTEON Plus CN50XX Hardware Reference
Manual" CP0C3_DSPP is reserved bit and read as 0. Also I do have
access to a Ubiquiti Edgerouter 4 which has Octeon CN7130 processor
and I can confirm CP0C3_DSPP is read as 0 on that processor.
Further more, in linux kernel:
arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
cpu_has_dsp is overridden as 0.
So I believe we shouldn't emulate DSP in QEMU as well.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Message-Id: <20221031132531.18122-4-jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 2a2105a26219695c72bfc7cab9b7d37754fc0920
https://github.com/qemu/qemu/commit/2a2105a26219695c72bfc7cab9b7d37754fc0920
Author: Jiaxun Yang <jiaxun.yang@flygoat.com>
Date: 2022-11-08 (Tue, 08 Nov 2022)
Changed paths:
M target/mips/tcg/translate.c
Log Message:
-----------
target/mips: Don't check COP1X for 64 bit FP mode
Some implementations (i.e. Loongson-2F) may decide to implement
a 64 bit FPU without implementing COP1X instructions.
As the eligibility of 64 bit FP instructions is already determined
by CP0St_FR, there is no need to check for COP1X again.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221102165719.190378-1-jiaxun.yang@flygoat.com>
[PMD: Add missing trailing parenthesis (buildfix)]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 04849c94fe50ce6fc621933eda2321dc6a3280a1
https://github.com/qemu/qemu/commit/04849c94fe50ce6fc621933eda2321dc6a3280a1
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2022-11-08 (Tue, 08 Nov 2022)
Changed paths:
M disas/nanomips.c
Log Message:
-----------
disas/nanomips: Fix invalid PRId64 format calling img_format()
Fix warnings such:
disas/nanomips.c:3251:64: warning: format specifies type 'char *' but the
argument has type 'int64' (aka 'long long') [-Wformat]
return img_format("CACHE 0x%" PRIx64 ", %s(%s)", op_value, s_value, rs);
~~ ^~~~~~~
%lld
To avoid crashes such (kernel from commit f375ad6a0d):
$ qemu-system-mipsel -cpu I7200 -d in_asm -kernel generic_nano32r6el_page4k
...
----------------
IN: __bzero
0x805c6084: 20c4 6950 ADDU r13, a0, a2
0x805c6088: 9089 ADDIU a0, 1
Process 70261 stopped
* thread #6, stop reason = EXC_BAD_ACCESS (code=1, address=0xfffffffffffffff0)
frame #0: 0x00000001bfe38864 libsystem_platform.dylib`_platform_strlen + 4
libsystem_platform.dylib`:
-> 0x1bfe38864 <+4>: ldr q0, [x1]
0x1bfe38868 <+8>: adr x3, #-0xc8 ;
___lldb_unnamed_symbol314
0x1bfe3886c <+12>: ldr q2, [x3], #0x10
0x1bfe38870 <+16>: and x2, x0, #0xf
Target 0: (qemu-system-mipsel) stopped.
(lldb) bt
* thread #6, stop reason = EXC_BAD_ACCESS (code=1, address=0xfffffffffffffff0)
* frame #0: 0x00000001bfe38864 libsystem_platform.dylib`_platform_strlen + 4
frame #1: 0x00000001bfce76a0 libsystem_c.dylib`__vfprintf + 4544
frame #2: 0x00000001bfd158b4 libsystem_c.dylib`_vasprintf + 280
frame #3: 0x0000000101c22fb0 libglib-2.0.0.dylib`g_vasprintf + 28
frame #4: 0x0000000101bfb7d8 libglib-2.0.0.dylib`g_strdup_vprintf + 32
frame #5: 0x000000010000fb70
qemu-system-mipsel`img_format(format=<unavailable>) at nanomips.c:103:14 [opt]
frame #6: 0x0000000100018868
qemu-system-mipsel`SB_S9_(instruction=<unavailable>, info=<unavailable>) at
nanomips.c:12616:12 [opt]
frame #7: 0x000000010000f90c qemu-system-mipsel`print_insn_nanomips at
nanomips.c:589:28 [opt]
Fixes: 4066c152b3 ("disas/nanomips: Remove IMMEDIATE functions")
Reported-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221101114458.25756-2-philmd@linaro.org>
Commit: 50fc0945b6448903c0b696d373b004881ed37e1e
https://github.com/qemu/qemu/commit/50fc0945b6448903c0b696d373b004881ed37e1e
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2022-11-08 (Tue, 08 Nov 2022)
Changed paths:
M disas/nanomips.c
Log Message:
-----------
disas/nanomips: Fix invalid PRIx64 format calling img_format()
Fix:
disas/nanomips.c:12231:62: warning: format specifies type 'char *' but the
argument has type 'uint64' (aka 'unsigned long long') [-Wformat]
return img_format("RESTOREF 0x%" PRIx64 ", %s", u_value, count_value);
~~ ^~~~~~~~~~~
%llu
Fixes: 4066c152b3 ("disas/nanomips: Remove IMMEDIATE functions")
Reported-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221101114458.25756-3-philmd@linaro.org>
Commit: d03a008e82b58593a6da7a79e6341a7a3a45da43
https://github.com/qemu/qemu/commit/d03a008e82b58593a6da7a79e6341a7a3a45da43
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2022-11-08 (Tue, 08 Nov 2022)
Changed paths:
M disas/nanomips.c
Log Message:
-----------
disas/nanomips: Use G_GNUC_PRINTF to avoid invalid string formats
Suggested-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221101114458.25756-4-philmd@linaro.org>
Commit: e9ebb6677b2c07690f8e6e05602a0efcd19d3f2d
https://github.com/qemu/qemu/commit/e9ebb6677b2c07690f8e6e05602a0efcd19d3f2d
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2022-11-08 (Tue, 08 Nov 2022)
Changed paths:
M disas/nanomips.c
Log Message:
-----------
disas/nanomips: Remove headers already included by "qemu/osdep.h"
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221101114458.25756-5-philmd@linaro.org>
Commit: 24449fc0f55ba99d4dbc6b3ab7ed495f43591c51
https://github.com/qemu/qemu/commit/24449fc0f55ba99d4dbc6b3ab7ed495f43591c51
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-11-08 (Tue, 08 Nov 2022)
Changed paths:
M disas/nanomips.c
Log Message:
-----------
disas/nanomips: Move setjmp into nanomips_dis
Reduce the number of local variables within the scope of the
setjmp by moving it to the existing helper. The actual length
returned from Disassemble is not used, because we have already
determined the length while reading bytes. Fixes:
nanomips.c: In function ‘print_insn_nanomips’:
nanomips.c:21925:14: error: variable ‘insn1’ might be clobbered by ‘longjmp’ or
‘vfork’ [-Werror=clobbered]
nanomips.c:21925:25: error: variable ‘insn2’ might be clobbered by ‘longjmp’ or
‘vfork’ [-Werror=clobbered]
nanomips.c:21925:36: error: variable ‘insn3’ might be clobbered by ‘longjmp’ or
‘vfork’ [-Werror=clobbered]
nanomips.c:21926:22: error: variable ‘buf’ might be clobbered by ‘longjmp’ or
‘vfork’ [-Werror=clobbered]
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221106212852.152384-2-richard.henderson@linaro.org>
Commit: ad120616edfe405e283a924fa3302b78605616d6
https://github.com/qemu/qemu/commit/ad120616edfe405e283a924fa3302b78605616d6
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-11-08 (Tue, 08 Nov 2022)
Changed paths:
M disas/nanomips.c
Log Message:
-----------
disas/nanomips: Merge insn{1,2,3} into words[3]
Since Disassemble wants the data in this format, collect
it that way. This allows using a loop to print the bytes.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221106212852.152384-3-richard.henderson@linaro.org>
Commit: 1414e3f5657a9f0c66495eb347ffd00df7978b4c
https://github.com/qemu/qemu/commit/1414e3f5657a9f0c66495eb347ffd00df7978b4c
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-11-08 (Tue, 08 Nov 2022)
Changed paths:
M disas/nanomips.c
Log Message:
-----------
disas/nanomips: Split out read_u16
Split out a helper function for reading a uint16_t
with the correct endianness.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221106023735.5277-4-richard.henderson@linaro.org>
Commit: bb3daca71b58d11a13bc5979d1eb3c90b79452bc
https://github.com/qemu/qemu/commit/bb3daca71b58d11a13bc5979d1eb3c90b79452bc
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-11-08 (Tue, 08 Nov 2022)
Changed paths:
M disas/nanomips.c
Log Message:
-----------
disas/nanomips: Tidy read for 48-bit opcodes
There is no point in looking for a 48-bit opcode if we've
not read the second word for a 32-bit opcode.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221106023735.5277-5-richard.henderson@linaro.org>
Commit: 30dd5ff892d2f51025a5fd6be55f44d9506c7df8
https://github.com/qemu/qemu/commit/30dd5ff892d2f51025a5fd6be55f44d9506c7df8
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2022-11-08 (Tue, 08 Nov 2022)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Inherit from nanoMIPS
6 months ago Stefan Pejic stepped in as nanoMIPS maintainer
(see commit a 8e0e23445a "target/mips: Undeprecate nanoMIPS
ISA support in QEMU"), however today his email is bouncing:
** Message blocked **
Your message to stefan.pejic@syrmia.com has been blocked. See technical
details below for more information.
The response from the remote server was:
550 5.4.1 Recipient address rejected: Access denied. AS(201806281)
[DBAEUR03FT030.eop-EUR03.prod.protection.outlook.com]
To avoid unmaintained code, I feel forced to merge this code
back with the generic MIPS section.
Historical references:
-
https://lore.kernel.org/qemu-devel/TY0PR03MB679726901BD6C6BE40114A2FE2A79@TY0PR03MB6797.apcprd03.prod.outlook.com/
-
https://lore.kernel.org/qemu-devel/b858a20e97b74e7b90a94948314d0008@MTKMBS62N2.mediatek.inc/
Cc: Vince Del Vecchio <Vince.DelVecchio@mediatek.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <49f41916-687f-b9e5-2de7-9c658fe0d4c7@linaro.org>
Tested-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221101114458.25756-6-philmd@linaro.org>
Commit: 57702891376d4636b5eab4a89145152a0342c987
https://github.com/qemu/qemu/commit/57702891376d4636b5eab4a89145152a0342c987
Author: Cédric Le Goater <clg@redhat.com>
Date: 2022-11-08 (Tue, 08 Nov 2022)
Changed paths:
M hw/s390x/s390-pci-kvm.c
M hw/s390x/s390-virtio-ccw.c
M include/hw/s390x/s390-virtio-ccw.h
M qemu-options.hx
M util/qemu-config.c
Log Message:
-----------
Revert "s390x/s390-virtio-ccw: add zpcii-disable machine property"
This reverts commit 59d1ce44396e3ad2330dc3261ff3da7ad3a16184.
The "zpcii-disable" machine property is redundant with the "interpret"
zPCI device property. Remove it for clarification.
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Message-Id: <20221107161349.1032730-2-clg@kaod.org>
Reviewed-by: Matthew Rosato <mjrosato@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Commit: d3d1a406127f7da482eafbdc871c120c2770bb91
https://github.com/qemu/qemu/commit/d3d1a406127f7da482eafbdc871c120c2770bb91
Author: Cédric Le Goater <clg@redhat.com>
Date: 2022-11-08 (Tue, 08 Nov 2022)
Changed paths:
M hw/s390x/s390-virtio-ccw.c
Log Message:
-----------
s390x/s390-virtio-ccw: Switch off zPCI enhancements on older machines
zPCI enhancement features (interpretation and forward assist) were
recently introduced to improve performance on PCI passthrough devices.
To maintain the same behaviour on older Z machines, deactivate the
features with the associated properties.
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Message-Id: <20221107161349.1032730-3-clg@kaod.org>
Reviewed-by: Matthew Rosato <mjrosato@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Commit: ef99aa2a31d6189f9eb39114f1752b1b980c766b
https://github.com/qemu/qemu/commit/ef99aa2a31d6189f9eb39114f1752b1b980c766b
Author: Amarjargal Gundjalam <amarjargal16@gmail.com>
Date: 2022-11-08 (Tue, 08 Nov 2022)
Changed paths:
M ui/vgafont.h
M ui/vnc-enc-zywrle-template.c
M ui/vnc-enc-zywrle.h
M ui/vnc_keysym.h
Log Message:
-----------
ui: fix tab indentation
The TABs should be replaced with spaces, to make sure that we have a
consistent coding style with an indentation of 4 spaces everywhere.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/370
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Amarjargal Gundjalam <amarjargal16@gmail.com>
Message-Id:
<9a0d0718aafaa52029fad76a149f3200b6bba0dd.1666707782.git.amarjargal16@gmail.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Commit: a076a3dcbf6cd5b038ce5ac8f419bb8d65f6432a
https://github.com/qemu/qemu/commit/a076a3dcbf6cd5b038ce5ac8f419bb8d65f6432a
Author: Amarjargal Gundjalam <amarjargal16@gmail.com>
Date: 2022-11-08 (Tue, 08 Nov 2022)
Changed paths:
M hw/display/blizzard.c
M hw/display/cirrus_vga.c
M hw/display/omap_dss.c
M hw/display/pxa2xx_lcd.c
M hw/display/vga_regs.h
M hw/display/xenfb.c
Log Message:
-----------
hw/display: fix tab indentation
The TABs should be replaced with spaces, to make sure that we have a
consistent coding style with an indentation of 4 spaces everywhere.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/370
Signed-off-by: Amarjargal Gundjalam <amarjargal16@gmail.com>
Message-Id:
<5cefd05b4d3721d416e48e6df19df18cb6338933.1666707782.git.amarjargal16@gmail.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Commit: 6c10e08a4f131431dbb50a11912cb2a726879df3
https://github.com/qemu/qemu/commit/6c10e08a4f131431dbb50a11912cb2a726879df3
Author: Amarjargal Gundjalam <amarjargal16@gmail.com>
Date: 2022-11-08 (Tue, 08 Nov 2022)
Changed paths:
M hw/usb/dev-hub.c
M hw/usb/dev-network.c
M hw/usb/dev-wacom.c
M hw/usb/hcd-musb.c
M hw/usb/quirks-pl2303-ids.h
M include/hw/usb.h
M include/hw/usb/dwc2-regs.h
Log Message:
-----------
hw/usb: fix tab indentation
The TABs should be replaced with spaces, to make sure that we have a
consistent coding style with an indentation of 4 spaces everywhere.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/370
Signed-off-by: Amarjargal Gundjalam <amarjargal16@gmail.com>
Message-Id:
<6c993f57800f8fef7a910074620f6e80e077a3d1.1666707782.git.amarjargal16@gmail.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Commit: 3ba5fe46ea4456a16e2f47ab8e75943b54879c4e
https://github.com/qemu/qemu/commit/3ba5fe46ea4456a16e2f47ab8e75943b54879c4e
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2022-11-08 (Tue, 08 Nov 2022)
Changed paths:
M MAINTAINERS
M disas/nanomips.c
M target/mips/cpu-defs.c.inc
M target/mips/cpu.c
M target/mips/tcg/octeon.decode
M target/mips/tcg/translate.c
Log Message:
-----------
Merge tag 'mips-20221108' of https://github.com/philmd/qemu into staging
MIPS patches queue
- Remove -Wclobbered in nanoMIPS disassembler (Richard Henderson)
- Fix invalid string formats in nanoMIPS disassembler (myself)
- Allow Loongson-2F to access XKPHYS in kernel mode (Jiaxun Yang)
- Octeon opcode fixes (Jiaxun Yang, Pavel Dovgalyuk)
- MAINTAINERS nanoMIPS update
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# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 07 Nov 2022 19:05:10 EST
# gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>"
[full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'mips-20221108' of https://github.com/philmd/qemu:
MAINTAINERS: Inherit from nanoMIPS
disas/nanomips: Tidy read for 48-bit opcodes
disas/nanomips: Split out read_u16
disas/nanomips: Merge insn{1,2,3} into words[3]
disas/nanomips: Move setjmp into nanomips_dis
disas/nanomips: Remove headers already included by "qemu/osdep.h"
disas/nanomips: Use G_GNUC_PRINTF to avoid invalid string formats
disas/nanomips: Fix invalid PRIx64 format calling img_format()
disas/nanomips: Fix invalid PRId64 format calling img_format()
target/mips: Don't check COP1X for 64 bit FP mode
target/mips: Disable DSP ASE for Octeon68XX
target/mips: Enable LBX/LWX/* instructions for Octeon
target/mips: Cast offset field of Octeon BBIT to int16_t
target/mips: Set CP0St_{KX, SX, UX} for Loongson-2F
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Commit: ade760a2f63804b7ab1839fbc3e5ddbf30538718
https://github.com/qemu/qemu/commit/ade760a2f63804b7ab1839fbc3e5ddbf30538718
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2022-11-08 (Tue, 08 Nov 2022)
Changed paths:
M hw/display/blizzard.c
M hw/display/cirrus_vga.c
M hw/display/omap_dss.c
M hw/display/pxa2xx_lcd.c
M hw/display/vga_regs.h
M hw/display/xenfb.c
M hw/s390x/s390-pci-kvm.c
M hw/s390x/s390-virtio-ccw.c
M hw/usb/dev-hub.c
M hw/usb/dev-network.c
M hw/usb/dev-wacom.c
M hw/usb/hcd-musb.c
M hw/usb/quirks-pl2303-ids.h
M include/hw/s390x/s390-virtio-ccw.h
M include/hw/usb.h
M include/hw/usb/dwc2-regs.h
M qemu-options.hx
M ui/vgafont.h
M ui/vnc-enc-zywrle-template.c
M ui/vnc-enc-zywrle.h
M ui/vnc_keysym.h
M util/qemu-config.c
Log Message:
-----------
Merge tag 'pull-request-2022-11-08' of https://gitlab.com/thuth/qemu into
staging
* Last minute s390x fixes before the hard freeze
* Whiste space clean-up in ui/, display/ and hw/usb/
# -----BEGIN PGP SIGNATURE-----
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# -----END PGP SIGNATURE-----
# gpg: Signature made Tue 08 Nov 2022 06:29:33 EST
# gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg: issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full]
# gpg: aka "Thomas Huth <thuth@redhat.com>" [full]
# gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full]
# gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5
* tag 'pull-request-2022-11-08' of https://gitlab.com/thuth/qemu:
hw/usb: fix tab indentation
hw/display: fix tab indentation
ui: fix tab indentation
s390x/s390-virtio-ccw: Switch off zPCI enhancements on older machines
Revert "s390x/s390-virtio-ccw: add zpcii-disable machine property"
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Compare: https://github.com/qemu/qemu/compare/f21f1cfeb94b...ade760a2f638