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[Qemu-commits] [qemu/qemu] 68e35a: target/loongarch: bstrins.w src regis
From: |
Philippe Mathieu-Daudé |
Subject: |
[Qemu-commits] [qemu/qemu] 68e35a: target/loongarch: bstrins.w src register need EXT_... |
Date: |
Mon, 17 Oct 2022 14:22:25 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 68e35a2b75eaf1a55a83bb0b102aeb017ab44e06
https://github.com/qemu/qemu/commit/68e35a2b75eaf1a55a83bb0b102aeb017ab44e06
Author: Song Gao <gaosong@loongson.cn>
Date: 2022-10-17 (Mon, 17 Oct 2022)
Changed paths:
M target/loongarch/insn_trans/trans_bit.c.inc
Log Message:
-----------
target/loongarch: bstrins.w src register need EXT_NONE
use gen_bstrins/gen_bstrpic to replace gen_rr_ms_ls.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220930024510.800005-2-gaosong@loongson.cn>
Commit: 153620126add5c4868308cc5831d400c7e7029ad
https://github.com/qemu/qemu/commit/153620126add5c4868308cc5831d400c7e7029ad
Author: Song Gao <gaosong@loongson.cn>
Date: 2022-10-17 (Mon, 17 Oct 2022)
Changed paths:
M target/loongarch/insn_trans/trans_farith.c.inc
Log Message:
-----------
target/loongarch: Fix fnm{sub/add}_{s/d} set wrong flags
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220930024510.800005-3-gaosong@loongson.cn>
Commit: 3cf71969095a99f840cd4b3f4aae696ce44b8078
https://github.com/qemu/qemu/commit/3cf71969095a99f840cd4b3f4aae696ce44b8078
Author: Song Gao <gaosong@loongson.cn>
Date: 2022-10-17 (Mon, 17 Oct 2022)
Changed paths:
M fpu/softfloat-parts.c.inc
Log Message:
-----------
softfloat: logB(0) should raise divideByZero exception
logB(0) should raise divideByZero exception from IEEE 754-2008 spec 7.3
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220930024510.800005-4-gaosong@loongson.cn>
Commit: 7bf36a5c5276c4dc7926a0bc2e5ebbd93eedac41
https://github.com/qemu/qemu/commit/7bf36a5c5276c4dc7926a0bc2e5ebbd93eedac41
Author: WANG Xuerui <xen0n@gentoo.org>
Date: 2022-10-17 (Mon, 17 Oct 2022)
Changed paths:
M linux-user/syscall_defs.h
Log Message:
-----------
linux-user: Fix struct statfs ABI on loongarch64
Previously the 32-bit version was incorrectly chosen, leading to funny
but incorrect output from e.g. df(1). Simply select the version
corresponding to the 64-bit asm-generic definition.
For reference, this program should produce the same output no matter
natively compiled or not, for loongarch64 or not:
```c
#include <stdio.h>
#include <sys/statfs.h>
int main(int argc, const char *argv[])
{
struct statfs b;
if (statfs(argv[0], &b))
return 1;
printf("f_type = 0x%lx\n", b.f_type);
printf("f_bsize = %ld\n", b.f_bsize);
printf("f_blocks = %ld\n", b.f_blocks);
printf("f_bfree = %ld\n", b.f_bfree);
printf("f_bavail = %ld\n", b.f_bavail);
return 0;
}
// Example output on my amd64 box, with the test binary residing on a
// btrfs partition.
// Native and emulated output after the fix:
//
// f_type = 0x9123683e
// f_bsize = 4096
// f_blocks = 268435456
// f_bfree = 168406890
// f_bavail = 168355058
// Output before the fix, note the messed layout:
//
// f_type = 0x10009123683e
// f_bsize = 723302085239504896
// f_blocks = 168355058
// f_bfree = 2250817541779750912
// f_bavail = 1099229433104
```
Fixes: 1f63019632 ("linux-user: Add LoongArch syscall support")
Signed-off-by: WANG Xuerui <xen0n@gentoo.org>
Cc: Song Gao <gaosong@loongson.cn>
Cc: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Cc: Andreas K. Hüttel <dilfridge@gentoo.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Andreas K. Huettel <dilfridge@gentoo.org>
Message-Id: <20221006100710.427252-1-xen0n@gentoo.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Commit: 5ef4a4af8b41fb175374726f379a2aea79929023
https://github.com/qemu/qemu/commit/5ef4a4af8b41fb175374726f379a2aea79929023
Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Date: 2022-10-17 (Mon, 17 Oct 2022)
Changed paths:
M hw/intc/loongarch_ipi.c
Log Message:
-----------
hw/intc: Fix LoongArch ipi device emulation
In ipi_send function, it should not to set irq before
writing data to dest cpu iocsr space, as the irq will
trigger after data writing.
When call this function 'address_space_stl()', it will
trigger loongarch_ipi_writel(), the addr arg is 0x1008
('CORE_SET_OFF'), and qemu_irq_raise will be called in
this case.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220930095139.867115-3-yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Commit: a1bf4f8904596d9fee2ac055a8ec854cf33b2cca
https://github.com/qemu/qemu/commit/a1bf4f8904596d9fee2ac055a8ec854cf33b2cca
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2022-10-17 (Mon, 17 Oct 2022)
Changed paths:
M fpu/softfloat-parts.c.inc
M hw/intc/loongarch_ipi.c
M linux-user/syscall_defs.h
M target/loongarch/insn_trans/trans_bit.c.inc
M target/loongarch/insn_trans/trans_farith.c.inc
Log Message:
-----------
Merge tag 'pull-loongarch-20221017' of https://gitlab.com/gaosong/qemu into
staging
pull-loongarch-20221017
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# gpg: Signature made Sun 16 Oct 2022 22:32:47 EDT
# gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF
# gpg: Can't check signature: No public key
* tag 'pull-loongarch-20221017' of https://gitlab.com/gaosong/qemu:
hw/intc: Fix LoongArch ipi device emulation
linux-user: Fix struct statfs ABI on loongarch64
softfloat: logB(0) should raise divideByZero exception
target/loongarch: Fix fnm{sub/add}_{s/d} set wrong flags
target/loongarch: bstrins.w src register need EXT_NONE
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Commit: 8823ef1336d6c4af1a6ccdcaa8f5c0b756f3a875
https://github.com/qemu/qemu/commit/8823ef1336d6c4af1a6ccdcaa8f5c0b756f3a875
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2022-10-17 (Mon, 17 Oct 2022)
Changed paths:
M .mailmap
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Replace my amsat.org email address
The amsat.org domain is having issues with DMARC / SPF / DKIM:
https://lore.kernel.org/qemu-devel/CAMVc7JUy5NeEN0q=4zfZvn_rppgqn9wicV1z=TsLuHKS3RY3Sw@mail.gmail.com/
Consolidate all of my MAINTAINERS entries on my work address.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20221017182005.43015-1-philmd@linaro.org
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Compare: https://github.com/qemu/qemu/compare/5c2439a92ce4...8823ef1336d6