[Qemu-commits] [qemu/qemu] 10dcb0: target/loongarch: Remove cpu_fcsr0

[Richard Henderson]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 10dcb08b03863221faa41f4f1aa835cdca441b96
      
https://github.com/qemu/qemu/commit/10dcb08b03863221faa41f4f1aa835cdca441b96
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-08-08 (Mon, 08 Aug 2022)

  Changed paths:
    M target/loongarch/fpu_helper.c
    M target/loongarch/helper.h
    M target/loongarch/insn_trans/trans_fmov.c.inc
    M target/loongarch/translate.c
    M tests/tcg/loongarch64/Makefile.target
    A tests/tcg/loongarch64/test_fcsr.c

  Log Message:
  -----------
  target/loongarch: Remove cpu_fcsr0

All of the fpu operations are defined with TCG_CALL_NO_WG, but they
all modify FCSR0.  The most efficient way to fix this is to remove
cpu_fcsr0, and instead use explicit load and store operations for the
two instructions that manipulate that value.

Acked-by: Qi Hu <huqi@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Reported-by: Feiyang Chen <chenfeiyang@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: ca5f3d4df1b47d7f66a109cdb504e83dfd7ec433
      
https://github.com/qemu/qemu/commit/ca5f3d4df1b47d7f66a109cdb504e83dfd7ec433
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-08-08 (Mon, 08 Aug 2022)

  Changed paths:
    M target/loongarch/fpu_helper.c
    M target/loongarch/helper.h
    M target/loongarch/insn_trans/trans_fmov.c.inc
    M target/loongarch/translate.c
    M tests/tcg/loongarch64/Makefile.target
    A tests/tcg/loongarch64/test_fcsr.c

  Log Message:
  -----------
  Merge tag 'pull-la-20220808' of https://gitlab.com/rth7680/qemu into staging

loongarch: fix emulation of fcsr register

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[ultimate]

* tag 'pull-la-20220808' of https://gitlab.com/rth7680/qemu:
  target/loongarch: Remove cpu_fcsr0

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Compare: https://github.com/qemu/qemu/compare/7b06148df8a2...ca5f3d4df1b4