[Qemu-commits] [qemu/qemu] 1c69cb: ppc/pnv: move root port attach to pnv

qemu-commits
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-commits] [qemu/qemu] 1c69cb: ppc/pnv: move root port attach to pnv

From:	Richard Henderson
Subject:	[Qemu-commits] [qemu/qemu] 1c69cb: ppc/pnv: move root port attach to pnv_phb4_realize()
Date:	Wed, 06 Jul 2022 17:56:53 -0700
  Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: 1c69cb4e7552be2984ba67861f35938ef8024f0c
      
https://github.com/qemu/qemu/commit/1c69cb4e7552be2984ba67861f35938ef8024f0c
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M hw/pci-host/pnv_phb4.c
    M hw/pci-host/pnv_phb4_pec.c

  Log Message:
  -----------
  ppc/pnv: move root port attach to pnv_phb4_realize()

Creating a root port is something related to the PHB, not the PEC. It
also makes the logic more in line with what pnv-phb3 does.

Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220621173436.165912-2-danielhb413@gmail.com>


  Commit: 8625164a3866064da0e37aabef7cab40311fd929
      
https://github.com/qemu/qemu/commit/8625164a3866064da0e37aabef7cab40311fd929
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M hw/pci-host/pnv_phb3.c
    M hw/pci-host/pnv_phb4.c
    M hw/ppc/pnv.c
    M include/hw/ppc/pnv.h

  Log Message:
  -----------
  ppc/pnv: attach phb3/phb4 root ports in QOM tree

At this moment we leave the pnv-phb3(4)-root-port unattached in QOM:

  /unattached (container)
(...)
    /device[2] (pnv-phb3-root-port)
      /bus master container[0] (memory-region)
      /bus master[0] (memory-region)
      /pci_bridge_io[0] (memory-region)
      /pci_bridge_io[1] (memory-region)
      /pci_bridge_mem[0] (memory-region)
      /pci_bridge_pci[0] (memory-region)
      /pci_bridge_pref_mem[0] (memory-region)
      /pci_bridge_vga_io_hi[0] (memory-region)
      /pci_bridge_vga_io_lo[0] (memory-region)
      /pci_bridge_vga_mem[0] (memory-region)
      /pcie.0 (PCIE)

Let's make changes in pnv_phb_attach_root_port() to attach the created
root ports to its corresponding PHB.

This is the result afterwards:

    /pnv-phb3[0] (pnv-phb3)
      /lsi (ics)
      /msi (phb3-msi)
      /msi32[0] (memory-region)
      /msi64[0] (memory-region)
      /pbcq (pnv-pbcq)
    (...)
      /phb3_iommu[0] (pnv-phb3-iommu-memory-region)
      /pnv-phb3-root.0 (pnv-phb3-root)
        /pnv-phb3-root-port[0] (pnv-phb3-root-port)
          /bus master container[0] (memory-region)
          /bus master[0] (memory-region)
          /pci_bridge_io[0] (memory-region)
          /pci_bridge_io[1] (memory-region)
          /pci_bridge_mem[0] (memory-region)
          /pci_bridge_pci[0] (memory-region)
          /pci_bridge_pref_mem[0] (memory-region)
          /pci_bridge_vga_io_hi[0] (memory-region)
          /pci_bridge_vga_io_lo[0] (memory-region)
          /pci_bridge_vga_mem[0] (memory-region)
          /pcie.0 (PCIE)

Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220621173436.165912-3-danielhb413@gmail.com>


  Commit: 792e8bb629c6c11e99b092d10790a6d027d7f2d2
      
https://github.com/qemu/qemu/commit/792e8bb629c6c11e99b092d10790a6d027d7f2d2
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M hw/pci-host/pnv_phb3.c
    M hw/pci-host/pnv_phb4.c
    M hw/ppc/pnv.c
    M include/hw/ppc/pnv.h

  Log Message:
  -----------
  ppc/pnv: assign pnv-phb-root-port chassis/slot earlier

It is not advisable to execute an object_dynamic_cast() to poke into
bus->qbus.parent and follow it up with a C cast into the PnvPHB type we
think we got.

In fact this is not needed. There is nothing sophisticated being done
with the PHB object retrieved during root_port_realize() for both PHB3
and PHB4. We're retrieving a PHB reference just to access phb->chip_id
and phb->phb_id and use them to define the chassis/slot of the root
port.

phb->phb_id is already being passed to pnv_phb_attach_root_port() via
the 'index' parameter. Let's also add a 'chip_id' parameter to this
function and assign chassis and slot right there. This will spare us
from the hassle of accessing the PHB object inside realize().

Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <20220621173436.165912-4-danielhb413@gmail.com>


  Commit: da6be50136800dee59e22ac95a6ee10c154e1210
      
https://github.com/qemu/qemu/commit/da6be50136800dee59e22ac95a6ee10c154e1210
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M hw/ppc/pnv.c

  Log Message:
  -----------
  ppc/pnv: make pnv_ics_get() use the chip8->phbs[] array

The function is working today by getting all the child objects of the
chip, interacting with each of them to check whether the child is a PHB,
and then doing what needs to be done.

We have all the chip PHBs in the phbs[] array so interacting with all
child objects is unneeded. Open code pnv_ics_get_phb_ics() into
pnv_ics_get() and remove both pnv_ics_get_phb_ics() and the
ForeachPhb3Args struct.

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220621173436.165912-5-danielhb413@gmail.com>


  Commit: ca45948991c1d22b30197cc741799f2543d42c37
      
https://github.com/qemu/qemu/commit/ca45948991c1d22b30197cc741799f2543d42c37
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M hw/ppc/pnv.c

  Log Message:
  -----------
  ppc/pnv: make pnv_ics_resend() use chip8->phbs[]

pnv_ics_resend() is scrolling through all the child objects of the chip
to search for the PHBs. It's faster and simpler to just use the phbs[]
array.

pnv_ics_resend_child() was folded into pnv_ics_resend() since it's too
simple to justify its own function.

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220621173436.165912-6-danielhb413@gmail.com>


  Commit: 8a69bca77a417167b743b8077c91ee43c52709cf
      
https://github.com/qemu/qemu/commit/8a69bca77a417167b743b8077c91ee43c52709cf
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M hw/ppc/pnv.c

  Log Message:
  -----------
  ppc/pnv: make pnv_chip_power8_pic_print_info() use chip8->phbs[]

It's inneficient to scroll all child objects when we have all PHBs
available in chip8->phbs[].

pnv_chip_power8_pic_print_info_child() ended up folded into
pic_print_info() for simplicity.

Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220621173436.165912-7-danielhb413@gmail.com>


  Commit: 71cd3e5ecb33e5f8842552bcf91aceb964bbd33c
      
https://github.com/qemu/qemu/commit/71cd3e5ecb33e5f8842552bcf91aceb964bbd33c
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M hw/pci-host/pnv_phb3.c

  Log Message:
  -----------
  ppc/pnv: remove 'INTERFACE_PCIE_DEVICE' from phb3 root bus

It's unneeded. No other PCIE_BUS implements this interface.

Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Fixes: 9ae1329ee2fe ("ppc/pnv: Add models for POWER8 PHB3 PCIe Host bridge")
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220621173436.165912-8-danielhb413@gmail.com>


  Commit: 21870aab36355ff5a1a0dbdb06d2071f3214cab2
      
https://github.com/qemu/qemu/commit/21870aab36355ff5a1a0dbdb06d2071f3214cab2
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M hw/pci-host/pnv_phb4.c

  Log Message:
  -----------
  ppc/pnv: remove 'INTERFACE_PCIE_DEVICE' from phb4 root bus

It's unneeded. No other PCIE_BUS implements this interface.

Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Fixes: 4f9924c4d4cf ("ppc/pnv: Add models for POWER9 PHB4 PCIe Host bridge")
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220621173436.165912-9-danielhb413@gmail.com>


  Commit: 59f11543e2ccd5cab283732a7c59aeeaa6790138
      
https://github.com/qemu/qemu/commit/59f11543e2ccd5cab283732a7c59aeeaa6790138
  Author: Víctor Colombo <victor.colombo@eldorado.org.br>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M target/ppc/cpu.h

  Log Message:
  -----------
  target/ppc: Change FPSCR_* to follow POWER ISA numbering convention

FPSCR_* bit values in QEMU are in the 'inverted' order from what Power
ISA defines (e.g. FPSCR.FI is bit 46 but is defined as 17 in cpu.h).
Now that PPC_BIT_NR macro was introduced to fix this situation for the
MSR bits, we can use it for the FPSCR bits too.

Also, adjust the comments to make then fit in 80 columns

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>
Message-Id: <20220622193203.127698-1-victor.colombo@eldorado.org.br>
[danielhb: fixed 'exceptio' typo in target/ppc/cpu.h]
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: 31cc81f72801bcda02c866ff94ed8baf6b84506d
      
https://github.com/qemu/qemu/commit/31cc81f72801bcda02c866ff94ed8baf6b84506d
  Author: Alexey Kardashevskiy <aik@ozlabs.ru>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M hw/ppc/spapr_iommu.c
    M hw/ppc/spapr_pci.c
    M hw/ppc/spapr_rtas_ddw.c
    M include/hw/ppc/spapr.h

  Log Message:
  -----------
  spapr/ddw: Reset DMA when the last non-default window is removed

PAPR+/LoPAPR says:
===
The platform must restore the default DMA window for the PE on a call
to the ibm,remove-pe-dma-window RTAS call when all of the following
are true:
 a. The call removes the last DMA window remaining for the PE.
 b. The DMA window being removed is not the default window

===

This resets DMA as PAPR mandates.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220622052955.1069903-1-aik@ozlabs.ru>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: c0e765dafb474f7e60e43c229cb772cbbaf3b90e
      
https://github.com/qemu/qemu/commit/c0e765dafb474f7e60e43c229cb772cbbaf3b90e
  Author: Alexey Kardashevskiy <aik@ozlabs.ru>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M hw/ppc/spapr_pci.c
    M hw/ppc/spapr_rtas_ddw.c

  Log Message:
  -----------
  spapr/ddw: Implement 64bit query extension

PAPR 2.8 (2018) defines an extension to return 64bit value for
the largest TCE block in "ibm,query-pe-dma-window". Recent Linux kernels
support this already.

This adds the extension and supports the older format.

This advertises a bigger window for the new format as the biggest
window with 2M pages below the start of the 64bit window as it is
the maximum we will see in practice.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220623073136.1380214-1-aik@ozlabs.ru>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: e82ca8acdd5021ccd7c0c0fe7e25fae7e3909b4b
      
https://github.com/qemu/qemu/commit/e82ca8acdd5021ccd7c0c0fe7e25fae7e3909b4b
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.c.inc
    M target/ppc/translate/vmx-ops.c.inc

  Log Message:
  -----------
  target/ppc: use int128.h methods in vpmsumd

Also drop VECTOR_FOR_INORDER_I usage since there is no need to access
the elements in any particular order, and move the instruction to
decodetree.

Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Message-Id: <20220606150037.338931-2-matheus.ferst@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: 7ca042868744a5efca902473d600d205e9e104b2
      
https://github.com/qemu/qemu/commit/7ca042868744a5efca902473d600d205e9e104b2
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.c.inc
    M target/ppc/translate/vmx-ops.c.inc

  Log Message:
  -----------
  target/ppc: use int128.h methods in vadduqm

And also move the insn to decodetree.

Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Message-Id: <20220606150037.338931-3-matheus.ferst@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: 896d92c81d638bfd040ee249629bbc48b2ce883f
      
https://github.com/qemu/qemu/commit/896d92c81d638bfd040ee249629bbc48b2ce883f
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.c.inc
    M target/ppc/translate/vmx-ops.c.inc

  Log Message:
  -----------
  target/ppc: use int128.h methods in vaddecuq and vaddeuqm

And also move the insns to decodetree and remove the now unused
avr_qw_addc method.

Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Message-Id: <20220606150037.338931-4-matheus.ferst@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: 8290ea509f62e4742a76d409091f398a80ba0b5b
      
https://github.com/qemu/qemu/commit/8290ea509f62e4742a76d409091f398a80ba0b5b
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.c.inc
    M target/ppc/translate/vmx-ops.c.inc

  Log Message:
  -----------
  target/ppc: use int128.h methods in vaddcuq

And also move the insn to decodetree.

Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Message-Id: <20220606150037.338931-5-matheus.ferst@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: b132be53a4ba6a0a40d5643d791822f958a36e53
      
https://github.com/qemu/qemu/commit/b132be53a4ba6a0a40d5643d791822f958a36e53
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.c.inc
    M target/ppc/translate/vmx-ops.c.inc

  Log Message:
  -----------
  target/ppc: use int128.h methods in vsubuqm

And also move the insn to decodetree

Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Message-Id: <20220606150037.338931-6-matheus.ferst@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: e6a5ad43deea6242d6b108ca12beac9465e5ab3b
      
https://github.com/qemu/qemu/commit/e6a5ad43deea6242d6b108ca12beac9465e5ab3b
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.c.inc
    M target/ppc/translate/vmx-ops.c.inc

  Log Message:
  -----------
  target/ppc: use int128.h methods in vsubecuq and vsubeuqm

And also move the insns to decodetree.

Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Message-Id: <20220606150037.338931-7-matheus.ferst@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: b7d30fae5b4fe672c31f567358947990c37cd957
      
https://github.com/qemu/qemu/commit/b7d30fae5b4fe672c31f567358947990c37cd957
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.c.inc
    M target/ppc/translate/vmx-ops.c.inc

  Log Message:
  -----------
  target/ppc: use int128.h methods in vsubcuq

And also move the insn to decodetree and remove the now unused
avr_qw_not, avr_qw_cmpu, and avr_qw_add methods.

Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Message-Id: <20220606150037.338931-8-matheus.ferst@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: 95444afcab4dd7ecd117b67aae5af8f8665be0ff
      
https://github.com/qemu/qemu/commit/95444afcab4dd7ecd117b67aae5af8f8665be0ff
  Author: Alexey Kardashevskiy <aik@ozlabs.ru>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M hw/intc/pnv_xive.c
    M hw/intc/pnv_xive2.c
    M hw/pci-host/pnv_phb4.c
    M include/hw/pci-host/pnv_phb3_regs.h
    M target/ppc/cpu.h

  Log Message:
  -----------
  ppc: Define SETFIELD for the ppc target

It keeps repeating, move it to the header. This uses __builtin_ffsll() to
allow using the macros in #define.

This is not using the QEMU's FIELD macros as this would require changing
all such macros found in skiboot (the PPC PowerNV firmware).

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220628080544.1509428-1-aik@ozlabs.ru>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: 81b205cecf30d5e1e1c2ece1f7121855e4e0fb1e
      
https://github.com/qemu/qemu/commit/81b205cecf30d5e1e1c2ece1f7121855e4e0fb1e
  Author: Alexey Kardashevskiy <aik@ozlabs.ru>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M hw/ppc/spapr.c
    M hw/watchdog/meson.build
    A hw/watchdog/spapr_watchdog.c
    M hw/watchdog/trace-events
    M include/hw/ppc/spapr.h

  Log Message:
  -----------
  ppc/spapr: Implement H_WATCHDOG

The new PAPR 2.12 defines a watchdog facility managed via the new
H_WATCHDOG hypercall.

This adds H_WATCHDOG support which a proposed driver for pseries uses:
https://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=303120

This was tested by running QEMU with a debug kernel and command line:
-append \
 "pseries-wdt.timeout=60 pseries-wdt.nowayout=1 pseries-wdt.action=2"

and running "echo V > /dev/watchdog0" inside the VM.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220622051008.1067464-1-aik@ozlabs.ru>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: bbecdb22aede8cd465b1a414747097571c21d9c5
      
https://github.com/qemu/qemu/commit/bbecdb22aede8cd465b1a414747097571c21d9c5
  Author: Víctor Colombo <victor.colombo@eldorado.org.br>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M target/ppc/insn32.decode

  Log Message:
  -----------
  target/ppc: Fix insn32.decode style issues

Some lines in insn32.decode have inconsistent alignment when compared
to others.
Fix this by changing the alignment of some lines, making it more
consistent throughout the file.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220629162904.105060-2-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: bf8adfd88b547680aa857c46098f3a1e94373160
      
https://github.com/qemu/qemu/commit/bf8adfd88b547680aa857c46098f3a1e94373160
  Author: Víctor Colombo <victor.colombo@eldorado.org.br>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/internal.h
    M target/ppc/translate/fp-impl.c.inc
    M target/ppc/translate/fp-ops.c.inc

  Log Message:
  -----------
  target/ppc: Move mffscrn[i] to decodetree

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220629162904.105060-3-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: 394c2e2fda70da722f20fb60412d6c0ca4bfaa03
      
https://github.com/qemu/qemu/commit/394c2e2fda70da722f20fb60412d6c0ca4bfaa03
  Author: Víctor Colombo <victor.colombo@eldorado.org.br>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/fp-impl.c.inc
    M target/ppc/translate/fp-ops.c.inc

  Log Message:
  -----------
  target/ppc: Move mffsce to decodetree

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220629162904.105060-4-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: 3e5bce70efe6bd1f684efbb21fd2a316cbf0657e
      
https://github.com/qemu/qemu/commit/3e5bce70efe6bd1f684efbb21fd2a316cbf0657e
  Author: Víctor Colombo <victor.colombo@eldorado.org.br>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/fp-impl.c.inc
    M target/ppc/translate/fp-ops.c.inc

  Log Message:
  -----------
  target/ppc: Move mffsl to decodetree

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220629162904.105060-5-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: f80d04d548d97fbbf5d4084dcc7d59a9bba387ef
      
https://github.com/qemu/qemu/commit/f80d04d548d97fbbf5d4084dcc7d59a9bba387ef
  Author: Víctor Colombo <victor.colombo@eldorado.org.br>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/fp-impl.c.inc
    M target/ppc/translate/fp-ops.c.inc

  Log Message:
  -----------
  target/ppc: Move mffs[.] to decodetree

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220629162904.105060-6-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: 6cef305fe7d9982d68b23923fc1f2ab0fd3eac56
      
https://github.com/qemu/qemu/commit/6cef305fe7d9982d68b23923fc1f2ab0fd3eac56
  Author: Víctor Colombo <victor.colombo@eldorado.org.br>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/fp-impl.c.inc

  Log Message:
  -----------
  target/ppc: Implement mffscdrn[i] instructions

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220629162904.105060-7-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: 7141a173c83414c4e1a4cda2d9ff1eaa6dccfee1
      
https://github.com/qemu/qemu/commit/7141a173c83414c4e1a4cda2d9ff1eaa6dccfee1
  Author: Víctor Colombo <victor.colombo@eldorado.org.br>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M tests/tcg/ppc64/Makefile.target
    M tests/tcg/ppc64le/Makefile.target
    A tests/tcg/ppc64le/mffsce.c

  Log Message:
  -----------
  tests/tcg/ppc64: Add mffsce test

Add mffsce test to check both the return value and the new fpscr
stored in the cpu.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220629162904.105060-8-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: 4dc5f8abdc8e0024bc4cef80b3b2db2c853d8df7
      
https://github.com/qemu/qemu/commit/4dc5f8abdc8e0024bc4cef80b3b2db2c853d8df7
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M target/ppc/cpu.h
    M target/ppc/cpu_init.c

  Log Message:
  -----------
  target/ppc: Add flag for ISA v2.06 BCDA instructions

Adds an insns_flags2 for the BCD assist instructions introduced in
Power ISA 2.06. These instructions are not listed in the manuals for
e5500[1] and e6500[2], so the flag is only added for POWER7/8/9/10
models.

[1] https://www.nxp.com/files-static/32bit/doc/ref_manual/EREF_RM.pdf
[2] https://www.nxp.com/docs/en/reference-manual/E6500RM.pdf

Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220629162904.105060-9-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: 6addef4d272684ba624c9fcaf66bc67e5fc4a93f
      
https://github.com/qemu/qemu/commit/6addef4d272684ba624c9fcaf66bc67e5fc4a93f
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/fixedpoint-impl.c.inc

  Log Message:
  -----------
  target/ppc: implement addg6s

Implements the following Power ISA v2.06 instruction:
addg6s: Add and Generate Sixes

Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Message-Id: <20220629162904.105060-10-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: 38d3690bda3fe217ea72903859907916a5429c6e
      
https://github.com/qemu/qemu/commit/38d3690bda3fe217ea72903859907916a5429c6e
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M target/ppc/dfp_helper.c
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/translate/fixedpoint-impl.c.inc

  Log Message:
  -----------
  target/ppc: implement cbcdtd

Implements the Convert Binary Coded Decimal To Declets instruction.
Since libdecnumber doesn't expose the methods for direct conversion
(decDigitsToDPD, BCD2DPD, etc.), the BCD values are converted to
decimal32 format, from which the declets are extracted.

Where the behavior is undefined, we try to match the result observed in
a POWER9 DD2.3.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Message-Id: <20220629162904.105060-11-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: 6b924d4afcab8d4284910483d16dcf803a24f657
      
https://github.com/qemu/qemu/commit/6b924d4afcab8d4284910483d16dcf803a24f657
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M target/ppc/dfp_helper.c
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/translate/fixedpoint-impl.c.inc

  Log Message:
  -----------
  target/ppc: implement cdtbcd

Implements the Convert Declets To Binary Coded Decimal instruction.
Since libdecnumber doesn't expose the methods for direct conversion
(decDigitsFromDPD, DPD2BCD, etc), a positive decimal32 with zero
exponent is used as an intermediate value to convert the declets.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Message-Id: <20220629162904.105060-12-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: c7e89de13224c1e6409152602ac760ac91f606b4
      
https://github.com/qemu/qemu/commit/c7e89de13224c1e6409152602ac760ac91f606b4
  Author: Murilo Opsfelder Araujo <muriloo@linux.ibm.com>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M target/ppc/cpu-models.c
    M target/ppc/cpu_init.c

  Log Message:
  -----------
  target/ppc: Return default CPU for max CPU

All ppc CPUs represent hardware that exists in the real world, i.e.: we
do not have a "max" CPU with all possible emulated features enabled.
Return the default CPU type for the machine because that has greater
chance of being useful as the "max" CPU.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1038
Cc: Cédric Le Goater <clg@kaod.org>
Cc: Daniel Henrique Barboza <danielhb413@gmail.com>
Cc: Daniel P. Berrangé <berrange@redhat.com>
Cc: Greg Kurz <groug@kaod.org>
Cc: Matheus K. Ferst <matheus.ferst@eldorado.org.br>
Cc: Thomas Huth <thuth@redhat.com>
Signed-off-by: Murilo Opsfelder Araujo <muriloo@linux.ibm.com>
Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Reviewed-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Message-Id: <20220628205513.81917-1-muriloo@linux.ibm.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: 7886605961d0a9c40ada0c28dee5fa0b42a30836
      
https://github.com/qemu/qemu/commit/7886605961d0a9c40ada0c28dee5fa0b42a30836
  Author: Thomas Huth <thuth@redhat.com>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M target/ppc/cpu-models.c

  Log Message:
  -----------
  target/ppc/cpu-models: Remove the "default" CPU alias

QEMU emulates a *lot* of PowerPC-based machines - having a CPU
that is named "default" and cannot be used with most of those
machines sounds just wrong. Thus let's remove this old and confusing
alias now.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20220705151030.662140-1-thuth@redhat.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: 0b83377f46042529adbbf3a77f7ffb6f1e8a0aaa
      
https://github.com/qemu/qemu/commit/0b83377f46042529adbbf3a77f7ffb6f1e8a0aaa
  Author: Pali Rohár <pali@kernel.org>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M target/ppc/cpu-models.c
    M target/ppc/cpu-models.h

  Log Message:
  -----------
  target/ppc: Fix MPC8555 and MPC8560 core type to e500v1

Commit 80d11f4467c4 ("Add definitions for Freescale PowerPC implementations")
changed core type of MPC8555 and MPC8560 from e500v1 to e500v2.

But both MPC8555 and MPC8560 have just e500v1 cores, there are no features
of e500v2 cores. It can be verified by reading NXP documentations:
https://www.nxp.com/docs/en/data-sheet/MPC8555EEC.pdf
https://www.nxp.com/docs/en/data-sheet/MPC8560EC.pdf
https://www.nxp.com/docs/en/reference-manual/MPC8555ERM.pdf
https://www.nxp.com/docs/en/reference-manual/MPC8560RM.pdf

Therefore fix core type of MPC8555 and MPC8560 back to e500v1.

Just for completeness, here is list of all Motorola/Freescale/NXP
processors which were released and have e500v1 or e500v2 cores:

e500v1: MPC8540 MPC8541 MPC8555 MPC8560

e500v2: BSC9131 BSC9132
        C291 C292 C293
        MPC8533 MPC8535 MPC8536 MPC8543 MPC8544 MPC8545 MPC8547
        MPC8548 MPC8567 MPC8568 MPC8569 MPC8572
        P1010 P1011 P1012 P1013 P1014 P1015 P1016 P1020 P1021
        P1022 P1024 P1025 P2010 P2020

Sorted alphabetically; not by release date / generation / feature set.
All this is from public information available on NXP website.

Seems that qemu has support only for some subset of MPC85xx processors.
Historically processors with e500 cores have mpc85xx family codename and
lot of software have them in mpc85xx architecture subdirectory.

Note that GCC uses -mcpu=8540 option for specifying e500v1 core and
-mcpu=8548 option for specifying e500v2 core.

So sometimes (mpc)8540 is alias for e500v1 and (mpc)8548 is alias for
e500v2.

Fixes: 80d11f4467c4 ("Add definitions for Freescale PowerPC implementations")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220703195029.23793-1-pali@kernel.org>
[danielhb: added more context in the commit msg]
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>


  Commit: 8e9398e3b1a860b8c29c670c1b6c36afe8d87849
      
https://github.com/qemu/qemu/commit/8e9398e3b1a860b8c29c670c1b6c36afe8d87849
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-07-07 (Thu, 07 Jul 2022)

  Changed paths:
    M hw/intc/pnv_xive.c
    M hw/intc/pnv_xive2.c
    M hw/pci-host/pnv_phb3.c
    M hw/pci-host/pnv_phb4.c
    M hw/pci-host/pnv_phb4_pec.c
    M hw/ppc/pnv.c
    M hw/ppc/spapr.c
    M hw/ppc/spapr_iommu.c
    M hw/ppc/spapr_pci.c
    M hw/ppc/spapr_rtas_ddw.c
    M hw/watchdog/meson.build
    A hw/watchdog/spapr_watchdog.c
    M hw/watchdog/trace-events
    M include/hw/pci-host/pnv_phb3_regs.h
    M include/hw/ppc/pnv.h
    M include/hw/ppc/spapr.h
    M target/ppc/cpu-models.c
    M target/ppc/cpu-models.h
    M target/ppc/cpu.h
    M target/ppc/cpu_init.c
    M target/ppc/dfp_helper.c
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/int_helper.c
    M target/ppc/internal.h
    M target/ppc/translate/fixedpoint-impl.c.inc
    M target/ppc/translate/fp-impl.c.inc
    M target/ppc/translate/fp-ops.c.inc
    M target/ppc/translate/vmx-impl.c.inc
    M target/ppc/translate/vmx-ops.c.inc
    M tests/tcg/ppc64/Makefile.target
    M tests/tcg/ppc64le/Makefile.target
    A tests/tcg/ppc64le/mffsce.c

  Log Message:
  -----------
  Merge tag 'pull-ppc-20220706' of https://gitlab.com/danielhb/qemu into staging

ppc patch queue for 2022-07-06:

This queue consists of improvements and bug fixes in TCG, powernv and
pSeries, with some fixes in other areas as well.

- tcg and target/ppc: BCDA and mffscdrn implementations, Remove CONFIG_INT128
conditional code
- fix '-cpu max' alias
- remove '-cpu default' alias
- spapr: fixes in DDW handling, H_WATCHDOG support
- powernv: cleanups in the pnv-phb3/4 models
- fix core type of MPC8555 and MPC8560 models

# -----BEGIN PGP SIGNATURE-----
#
# iHUEABYKAB0WIQQX6/+ZI9AYAK8oOBk82cqW3gMxZAUCYsXrpgAKCRA82cqW3gMx
# ZBe9AP4oqMTFw7r9EQPJU4QFMUeAVABl4o0xNb2wLyYov9CtKAD+LoVERSmtLTJ1
# kFpgBrRTWKVylaLEdZQoTdFlJeBwzQg=
# =GPG1
# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 07 Jul 2022 01:38:06 AM +0530
# gpg:                using EDDSA key 17EBFF9923D01800AF2838193CD9CA96DE033164
# gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>" 
[unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 17EB FF99 23D0 1800 AF28  3819 3CD9 CA96 DE03 3164

* tag 'pull-ppc-20220706' of https://gitlab.com/danielhb/qemu: (34 commits)
  target/ppc: Fix MPC8555 and MPC8560 core type to e500v1
  target/ppc/cpu-models: Remove the "default" CPU alias
  target/ppc: Return default CPU for max CPU
  target/ppc: implement cdtbcd
  target/ppc: implement cbcdtd
  target/ppc: implement addg6s
  target/ppc: Add flag for ISA v2.06 BCDA instructions
  tests/tcg/ppc64: Add mffsce test
  target/ppc: Implement mffscdrn[i] instructions
  target/ppc: Move mffs[.] to decodetree
  target/ppc: Move mffsl to decodetree
  target/ppc: Move mffsce to decodetree
  target/ppc: Move mffscrn[i] to decodetree
  target/ppc: Fix insn32.decode style issues
  ppc/spapr: Implement H_WATCHDOG
  ppc: Define SETFIELD for the ppc target
  target/ppc: use int128.h methods in vsubcuq
  target/ppc: use int128.h methods in vsubecuq and vsubeuqm
  target/ppc: use int128.h methods in vsubuqm
  target/ppc: use int128.h methods in vaddcuq
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Compare: https://github.com/qemu/qemu/compare/0e3723005bfe...8e9398e3b1a8
[Prev in Thread]
Current Thread
[Next in Thread]
[Qemu-commits] [qemu/qemu] 1c69cb: ppc/pnv: move root port attach to pnv_phb4_realize(), Richard Henderson <=
- [Qemu-commits] [qemu/qemu] 1c69cb: ppc/pnv: move root port attach to pnv_phb4_realize(), Richard Henderson, 2022/07/06
Prev by Date: [Qemu-commits] [qemu/qemu] 23f0a6: m68k: use correct variable name in boot info strin...
Next by Date: [Qemu-commits] [qemu/qemu] 1c69cb: ppc/pnv: move root port attach to pnv_phb4_realize()
Previous by thread: [Qemu-commits] [qemu/qemu] 23f0a6: m68k: use correct variable name in boot info strin...
Next by thread: [Qemu-commits] [qemu/qemu] 1c69cb: ppc/pnv: move root port attach to pnv_phb4_realize()
Index(es):
- Date
- Thread