[Qemu-commits] [qemu/qemu] a6bc80: target/mips: Fix WatchHi.M handling

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[Qemu-commits] [qemu/qemu] a6bc80: target/mips: Fix WatchHi.M handling

From:	Richard Henderson
Subject:	[Qemu-commits] [qemu/qemu] a6bc80: target/mips: Fix WatchHi.M handling
Date:	Sat, 11 Jun 2022 08:19:32 -0700
  Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: a6bc80f7b11188d86010a2d511498fba2fe4b629
      
https://github.com/qemu/qemu/commit/a6bc80f7b11188d86010a2d511498fba2fe4b629
  Author: Marcin Nowakowski <marcin.nowakowski@fungible.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M target/mips/cpu.c
    M target/mips/cpu.h
    M target/mips/tcg/sysemu/cp0_helper.c

  Log Message:
  -----------
  target/mips: Fix WatchHi.M handling

bit 31 (M) of WatchHiN register is a read-only register indicating
whether the next WatchHi register is present. It must not be reset
during user writes to the register.

Signed-off-by: Marcin Nowakowski <marcin.nowakowski@fungible.com>
Reviewed-by: David Daney <david.daney@fungible.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@fungible.com>
Message-Id: <20220511212953.74738-1-philmd@fungible.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 954d1658bde4e756e305334836fd86d398803242
      
https://github.com/qemu/qemu/commit/954d1658bde4e756e305334836fd86d398803242
  Author: Ni Hui <shuizhuyuanluo@126.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M target/mips/tcg/msa_translate.c

  Log Message:
  -----------
  target/mips: Fix SAT_S trans helper

Fix the SAT_S and SAT_U trans helper confusion.

Fixes: 4701d23aef ("target/mips: Convert MSA BIT instruction format to 
decodetree")
Signed-off-by: Ni Hui <shuizhuyuanluo@126.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220503130708.272850-1-shuizhuyuanluo@126.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 7fc235c67f6c136ceba2305bcf2609c46a74620d
      
https://github.com/qemu/qemu/commit/7fc235c67f6c136ceba2305bcf2609c46a74620d
  Author: Ni Hui <shuizhuyuanluo@126.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M target/mips/tcg/msa_translate.c

  Log Message:
  -----------
  target/mips: Fix df_extract_val() and df_extract_df() dfe lookup

Actually look into dfe structure data so that df_extract_val() and
df_extract_df() can return immediate and datafield other than BYTE.

Fixes: 4701d23aef ("target/mips: Convert MSA BIT instruction format to 
decodetree")
Signed-off-by: Ni Hui <shuizhuyuanluo@126.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220503130708.272850-2-shuizhuyuanluo@126.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 4b532b4f2be28525fd181e43afe13416c462b135
      
https://github.com/qemu/qemu/commit/4b532b4f2be28525fd181e43afe13416c462b135
  Author: Ni Hui <shuizhuyuanluo@126.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M target/mips/tcg/msa_translate.c

  Log Message:
  -----------
  target/mips: Fix msa checking condition in trans_msa_elm_fn()

Fix issue that condition of check_msa_enabled(ctx) is reversed
that causes segfault when msa elm_fn op encountered.

Fixes: 2f2745c81a ("target/mips: Convert MSA COPY_U opcode to decodetree")
Fixes: 97fe675519 ("target/mips: Convert MSA COPY_S and INSERT opcodes to 
decodetree")
Signed-off-by: Ni Hui <shuizhuyuanluo@126.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220503130708.272850-3-shuizhuyuanluo@126.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: ead0bf0d3349522e9e496a2d3bfe344fafc584dc
      
https://github.com/qemu/qemu/commit/ead0bf0d3349522e9e496a2d3bfe344fafc584dc
  Author: Ni Hui <shuizhuyuanluo@126.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M target/mips/tcg/msa_translate.c

  Log Message:
  -----------
  target/mips: Do not treat msa INSERT as NOP when wd is zero

Only for msa COPY_U/COPY_S with wd zero, we treat it as NOP.

Move this special rule into COPY_U and COPY_S trans function.

Fixes: 97fe675519 ("target/mips: Convert MSA COPY_S and INSERT opcodes to 
decodetree")
Signed-off-by: Ni Hui <shuizhuyuanluo@126.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220503130708.272850-4-shuizhuyuanluo@126.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 857816a42b8436021c00d48ab71366aef561be3c
      
https://github.com/qemu/qemu/commit/857816a42b8436021c00d48ab71366aef561be3c
  Author: Ni Hui <shuizhuyuanluo@126.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M target/mips/tcg/msa_helper.c

  Log Message:
  -----------
  target/mips: Fix store adress of high 64bit in helper_msa_st_b()

This patch fix the issue that helper_msa_st_b() write high 64bit
data to where the low 64bit resides, leaving high 64bit undefined.

Fixes: 68ad9260e0 ("target/mips: Use 8-byte memory ops for msa load/store")
Signed-off-by: Ni Hui <shuizhuyuanluo@126.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220504023319.12923-1-shuizhuyuanluo@126.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 1d29f899e7f2ae9bd1bc3eb0c59e72fe932f53a6
      
https://github.com/qemu/qemu/commit/1d29f899e7f2ae9bd1bc3eb0c59e72fe932f53a6
  Author: Ni Hui <shuizhuyuanluo@126.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M target/mips/tcg/msa_translate.c

  Log Message:
  -----------
  target/mips: Fix FTRUNC_S and FTRUNC_U trans helper

Fix the FTRUNC_S and FTRUNC_U trans helper problem.

Fixes: 5c5b64000c ("target/mips: Convert MSA 2RF instruction format to 
decodetree")
Signed-off-by: nihui <shuizhuyuanluo@126.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220503144241.289239-1-shuizhuyuanluo@126.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: a1b092537ac52b9a19e14ea163cb653149efcbb8
      
https://github.com/qemu/qemu/commit/a1b092537ac52b9a19e14ea163cb653149efcbb8
  Author: Stefan Pejic <stefan.pejic@syrmia.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M target/mips/tcg/nanomips_translate.c.inc

  Log Message:
  -----------
  target/mips: Fix emulation of nanoMIPS MTHLIP instruction

The field ac in nanoMIPS instruction MTHLIP rs, ac is specified in
nanoMIPS documentation as opcode[15..14] (2 bits). However, in the
current QEMU code, the corresponding argument passed to the helper
gen_helper_mthlip() has the value of opcode[15..11] (5 bits). Right
shift the value of this argument by three bits to fix this.

Signed-off-by: Stefan Pejic <stefan.pejic@syrmia.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220504110403.613168-2-stefan.pejic@syrmia.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 9e4f726d4f489e9f1cd675f4e5ce300f7677ed40
      
https://github.com/qemu/qemu/commit/9e4f726d4f489e9f1cd675f4e5ce300f7677ed40
  Author: Dragan Mladjenovic <dragan.mladjenovic@syrmia.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M target/mips/tcg/nanomips_translate.c.inc

  Log Message:
  -----------
  target/mips: Fix emulation of nanoMIPS EXTRV_S.H instruction

The field rs in the instruction EXTRV_S.H rt, ac, rs is specified in
nanoMIPS documentation as opcode[20..16]. It is, however, erroneously
considered as opcode[25..21] in the current QEMU implementation. In
function gen_pool32axf_2_nanomips_insn(), the variable v0_t corresponds
to rt/opcode[25..21], and v1_t corresponds to rs/opcode[20..16]), and
v0_t is by mistake passed to the helper gen_helper_extr_s_h().

Use v1_t rather than v0_t in the invocation of gen_helper_extr_s_h()
to fix this.

Signed-off-by: Dragan Mladjenovic <dragan.mladjenovic@syrmia.com>
Signed-off-by: Stefan Pejic <stefan.pejic@syrmia.com>
Fixes: 8b3698b294 ("target/mips: Add emulation of DSP ASE for nanoMIPS")
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220504110403.613168-3-stefan.pejic@syrmia.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 5de4359b4f303faf5eecc7c37668a6bef77cb656
      
https://github.com/qemu/qemu/commit/5de4359b4f303faf5eecc7c37668a6bef77cb656
  Author: Dragan Mladjenovic <dragan.mladjenovic@syrmia.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M target/mips/cpu.h
    M target/mips/tcg/nanomips_translate.c.inc

  Log Message:
  -----------
  target/mips: Fix emulation of nanoMIPS BPOSGE32C instruction

There are currently two problems related to the emulation of the
instruction BPOSGE32C.

The nanoMIPS instruction BPOSGE32C belongs to DSP R3 instructions
(actually, as of now, it is the only instruction of DSP R3). The
presence of DSP R3 instructions in QEMU is indicated by the flag
MIPS_HFLAG_DSP_R3 (0x20000000). This flag is currently being properly
set in CPUMIPSState's hflags (for example, for I7200 nanoMIPS CPU).
However, it is not propagated to DisasContext's hflags, since the flag
MIPS_HFLAG_DSP_R3 is not set in MIPS_HFLAG_TMASK (while similar flags
MIPS_HFLAG_DSP_R2 and MIPS_HFLAG_DSP are set in this mask, and there
is no problem in functioning check_dsp_r2(), check_dsp()). This means
the function check_dsp_r3() currently does not work properly, and the
emulation of BPOSGE32C can not work properly as well.

Change MIPS_HFLAG_TMASK from 0x1F5807FF to 0x3F5807FF (logical OR
with 0x20000000) to fix this.

Additionally, check_cp1_enabled() is currently incorrectly called
while emulating BPOSGE32C. BPOSGE32C is in the same pool (P.BR1) as
FPU branch instruction BC1EQZC and BC1NEZC, but it not a part of FPU
(CP1) instructions, and check_cp1_enabled() should not be involved
while emulating BPOSGE32C.

Rearrange invocations of check_cp1_enabled() within P.BR1 pool
handling to affect only BC1EQZC and BC1NEZC emulation, and not
BPOSGE32C emulation.

Signed-off-by: Dragan Mladjenovic <dragan.mladjenovic@syrmia.com>
Signed-off-by: Stefan Pejic <stefan.pejic@syrmia.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220504110403.613168-4-stefan.pejic@syrmia.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 14668cfaaf4d6f818d9e6b58dd44b75842654e2a
      
https://github.com/qemu/qemu/commit/14668cfaaf4d6f818d9e6b58dd44b75842654e2a
  Author: Dragan Mladjenovic <dragan.mladjenovic@syrmia.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M target/mips/tcg/nanomips_translate.c.inc

  Log Message:
  -----------
  target/mips: Fix emulation of nanoMIPS BNEC[32] instruction

If both rs and rt are the same register, the nanoMIPS instruction
BNEC[32] rs, rt, address is equivalent to NOP (branch is not taken and
there is no delay slot). This commit provides such behavior. Without
this commit, this scenario results in an incorrect behavior.

Signed-off-by: Dragan Mladjenovic <dragan.mladjenovic@syrmia.com>
Signed-off-by: Stefan Pejic <stefan.pejic@syrmia.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220504110403.613168-5-stefan.pejic@syrmia.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: db7596989a67a8f838416f687431f3a0ccb181a0
      
https://github.com/qemu/qemu/commit/db7596989a67a8f838416f687431f3a0ccb181a0
  Author: Dragan Mladjenovic <dragan.mladjenovic@syrmia.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M target/mips/tcg/translate.c

  Log Message:
  -----------
  target/mips: Fix handling of unaligned memory access for nanoMIPS ISA

nanoMIPS ISA does not support unaligned memory access. Adjust
DisasContext's default_tcg_memop_mask to reflect this.

Signed-off-by: Dragan Mladjenovic <dragan.mladjenovic@syrmia.com>
Signed-off-by: Stefan Pejic <stefan.pejic@syrmia.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220504110403.613168-6-stefan.pejic@syrmia.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: f1663114dfb452acd2abd6585f66779ef6a84010
      
https://github.com/qemu/qemu/commit/f1663114dfb452acd2abd6585f66779ef6a84010
  Author: Stefan Pejic <stefan.pejic@syrmia.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M target/mips/tcg/nanomips_translate.c.inc

  Log Message:
  -----------
  target/mips: Add missing default cases for some nanoMIPS pools

Switch statements for the code segments that handle nanoMIPS
instruction pools P.LL, P.SC, P.SHIFT, P.LS.S1, P.LS.E0, PP.LSXS
do not have proper default case, resulting in not generating
reserved instruction exception for certain illegal opcodes.

Fix this by adding default cases for these switch statements that
trigger reserved instruction exception.

Signed-off-by: Stefan Pejic <stefan.pejic@syrmia.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220504110403.613168-7-stefan.pejic@syrmia.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 8e0e23445acdf1cfbe7714f685c4a7404b3fa467
      
https://github.com/qemu/qemu/commit/8e0e23445acdf1cfbe7714f685c4a7404b3fa467
  Author: Stefan Pejic <stefan.pejic@syrmia.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M MAINTAINERS
    M docs/about/deprecated.rst

  Log Message:
  -----------
  target/mips: Undeprecate nanoMIPS ISA support in QEMU

nanoMIPS ISA support in QEMU is actively used by MediaTek and is
planned to be maintained and potentially extended by MediaTek in
future.

Un-orphan nanoMIPS ISA support in QEMU by setting a maintainer from
MediaTek and remove deprecation notes from documentation as well.

Signed-off-by: Stefan Pejic <stefan.pejic@syrmia.com>
Message-Id: <20220504110403.613168-8-stefan.pejic@syrmia.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 0c285e01280d9bccda36717bad369082356cf8f4
      
https://github.com/qemu/qemu/commit/0c285e01280d9bccda36717bad369082356cf8f4
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/block/fdc-sysbus.c
    M hw/mips/jazz.c
    M include/hw/block/fdc.h

  Log Message:
  -----------
  hw/block/fdc-sysbus: Always mark sysbus floppy controllers as not having DMA

The sysbus floppy controllers (devices sysbus-fdc and sun-fdtwo)
don't support DMA.  The core floppy controller code expects this to
be indicated by setting FDCtrl::dma_chann to -1.  This used to be
done in the device instance_init functions sysbus_fdc_initfn() and
sun4m_fdc_initfn(), but in commit 1430759ec3e we refactored this code
and accidentally lost the setting of dma_chann.

For sysbus-fdc this has no ill effects because we were redundantly
also setting dma_chann in fdctrl_init_sysbus(), but for sun-fdtwo
this means that guests which try to enable DMA on the floppy
controller will cause QEMU to crash because FDCtrl::dma is NULL.

Set dma_chann to -1 in the common instance init, and remove the
redundant code in fdctrl_init_sysbus() that is also setting it.

There is a six-year-old FIXME comment in the jazz board code to the
effect that in theory it should support doing DMA via a custom DMA
controller.  If anybody ever chooses to fix that they can do it by
adding support for setting both FDCtrl::dma_chann and FDCtrl::dma.
(A QOM link property 'dma-controller' on the sysbus device which can
be set to an instance of IsaDmaClass is probably the way to go.)

Fixes: 1430759ec3 ("hw/block/fdc: Extract SysBus floppy controllers to 
fdc-sysbus.c")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/958
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20220505101842.2757905-1-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 3f0efcac43707c02525b5bbaf996c6bf80e2f706
      
https://github.com/qemu/qemu/commit/3f0efcac43707c02525b5bbaf996c6bf80e2f706
  Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/acpi/piix4.c

  Log Message:
  -----------
  hw/acpi/piix4: move xen_enabled() logic from piix4_pm_init() to 
piix4_pm_realize()

This logic can be included as part of piix4_pm_realize() and does not need to
be handled externally.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Ani Sinha <ani@anisinha.ca>
Message-Id: <20220528091934.15520-2-mark.cave-ayland@ilande.co.uk>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 5b07f441022c1114073c05cdffd1bb829cbc31c5
      
https://github.com/qemu/qemu/commit/5b07f441022c1114073c05cdffd1bb829cbc31c5
  Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/acpi/piix4.c
    M include/hw/southbridge/piix.h

  Log Message:
  -----------
  hw/acpi/piix4: change smm_enabled from int to bool

This is in preparation for conversion to a qdev property.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Ani Sinha <ani@anisinha.ca>
Message-Id: <20220528091934.15520-3-mark.cave-ayland@ilande.co.uk>
[PMD: Change simm_enabled from int to bool, suggested by Ani Sinha]
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 7ace6b4f81cffa4595dc94c79583a90c251c9810
      
https://github.com/qemu/qemu/commit/7ace6b4f81cffa4595dc94c79583a90c251c9810
  Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/acpi/piix4.c

  Log Message:
  -----------
  hw/acpi/piix4: convert smm_enabled bool to qdev property

This allows the smm_enabled value to be set using a standard qdev property 
instead
of being referenced directly in piix4_pm_init().

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Ani Sinha <ani@anisinha.ca>
Message-Id: <20220528091934.15520-4-mark.cave-ayland@ilande.co.uk>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 2bfd0845f076fbec9e1dc17b1f4630b46a401a8a
      
https://github.com/qemu/qemu/commit/2bfd0845f076fbec9e1dc17b1f4630b46a401a8a
  Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/acpi/piix4.c
    M hw/i386/acpi-build.c
    A include/hw/acpi/piix4.h
    M include/hw/southbridge/piix.h

  Log Message:
  -----------
  hw/acpi/piix4: move PIIX4PMState into separate piix4.h header

This allows the QOM types in hw/acpi/piix4.c to be used elsewhere by simply 
including
hw/acpi/piix4.h.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220528091934.15520-5-mark.cave-ayland@ilande.co.uk>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 19eb2a0da272289e8879fb2780522f37630ac651
      
https://github.com/qemu/qemu/commit/19eb2a0da272289e8879fb2780522f37630ac651
  Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/acpi/piix4.c
    M hw/i386/pc_piix.c
    M hw/isa/piix4.c
    M include/hw/southbridge/piix.h

  Log Message:
  -----------
  hw/acpi/piix4: alter piix4_pm_init() to return PIIX4PMState

This exposes the PIIX4_PM device to the caller to allow any qdev gpios to be
mapped outside of piix4_pm_init().

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220528091934.15520-6-mark.cave-ayland@ilande.co.uk>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: d0af99ac12d381f3dcf451c69a6cef760fdc8252
      
https://github.com/qemu/qemu/commit/d0af99ac12d381f3dcf451c69a6cef760fdc8252
  Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/acpi/piix4.c
    M hw/i386/pc_piix.c
    M hw/isa/piix4.c
    M include/hw/southbridge/piix.h

  Log Message:
  -----------
  hw/acpi/piix4: rename piix4_pm_init() to piix4_pm_initfn()

When QOMifying a device it is typical to use _init() as the suffix for an
instance_init function, however this name is already in use by the legacy
piix4_pm_init() wrapper function. Eventually the wrapper function will be
removed, but for now rename it to piix4_pm_initfn() to avoid a naming
collision.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220528091934.15520-7-mark.cave-ayland@ilande.co.uk>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 29786d42ba4ab6a70d3055083512e0bdd8e2f9ec
      
https://github.com/qemu/qemu/commit/29786d42ba4ab6a70d3055083512e0bdd8e2f9ec
  Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/acpi/piix4.c
    M hw/i386/pc_piix.c
    M hw/isa/piix4.c
    M include/hw/southbridge/piix.h

  Log Message:
  -----------
  hw/acpi/piix4: use qdev gpio to wire up sci_irq

Introduce piix4_pm_init() instance init function and use it to
initialise the separate qdev gpio for the SCI IRQ.

The sci_irq can now be wired up directly using a qdev gpio instead
of having to set the IRQ externally in piix4_pm_initfn().

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220528091934.15520-9-mark.cave-ayland@ilande.co.uk>
[PMD: Partially squash 20220528091934.15520-8-mark.cave-ayland@ilande.co.uk]
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: b49e94424cbdc2f02725dcd37b8916ff64f74dcd
      
https://github.com/qemu/qemu/commit/b49e94424cbdc2f02725dcd37b8916ff64f74dcd
  Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/acpi/piix4.c
    M hw/i386/pc_piix.c
    M hw/isa/piix4.c
    M include/hw/southbridge/piix.h

  Log Message:
  -----------
  hw/acpi/piix4: use qdev gpio to wire up smi_irq

Initialize the SMI IRQ in piix4_pm_init().

The smi_irq can now be wired up directly using a qdev gpio instead
of having to set the IRQ externally in piix4_pm_initfn().

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220528091934.15520-10-mark.cave-ayland@ilande.co.uk>
[PMD: Partially squash 20220528091934.15520-8-mark.cave-ayland@ilande.co.uk]
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: ee7318bc09d25aa250f0e58ac1eebf87abc88b03
      
https://github.com/qemu/qemu/commit/ee7318bc09d25aa250f0e58ac1eebf87abc88b03
  Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/i386/pc_piix.c

  Log Message:
  -----------
  hw/i386/pc_piix: create PIIX4_PM device directly instead of using 
piix4_pm_initfn()

Now that all external logic has been removed from piix4_pm_initfn() the PIIX4_PM
device can be instantiated directly.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220528091934.15520-11-mark.cave-ayland@ilande.co.uk>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 5a9715c26f19675c32a4113867a3a073fa1e8595
      
https://github.com/qemu/qemu/commit/5a9715c26f19675c32a4113867a3a073fa1e8595
  Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/isa/piix4.c

  Log Message:
  -----------
  hw/isa/piix4.c: create PIIX4_PM device directly instead of using 
piix4_pm_initfn()

Now that all external logic has been removed from piix4_pm_initfn() the PIIX4_PM
device can be instantiated directly.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220528091934.15520-12-mark.cave-ayland@ilande.co.uk>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 65417e548ad4277ee6b08443fd06d4d8446ed05e
      
https://github.com/qemu/qemu/commit/65417e548ad4277ee6b08443fd06d4d8446ed05e
  Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/acpi/piix4.c
    M include/hw/southbridge/piix.h

  Log Message:
  -----------
  hw/acpi/piix4: remove unused piix4_pm_initfn() function

This function is now unused and so can be completely removed.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220528091934.15520-13-mark.cave-ayland@ilande.co.uk>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 3963e1398e1b0cbcc0fb21b2cce387ba7f48de5f
      
https://github.com/qemu/qemu/commit/3963e1398e1b0cbcc0fb21b2cce387ba7f48de5f
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/isa/piix3.c
    M include/hw/isa/isa.h
    M include/hw/southbridge/piix.h

  Log Message:
  -----------
  hw/southbridge/piix: Aggregate all PIIX southbridge type names

TYPE_PIIX3_PCI_DEVICE resides there as already, so add the remaining
ones, too.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220603185045.143789-2-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 14f94725c91fb9aebbc8d13241c52ba8b30b39d4
      
https://github.com/qemu/qemu/commit/14f94725c91fb9aebbc8d13241c52ba8b30b39d4
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/isa/piix4.c

  Log Message:
  -----------
  hw/isa/piix4: Use object_initialize_child() for embedded struct

Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20220603185045.143789-3-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 87e010d6d630470de81039c3dfb614fa79d759bc
      
https://github.com/qemu/qemu/commit/87e010d6d630470de81039c3dfb614fa79d759bc
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/isa/piix4.c

  Log Message:
  -----------
  hw/isa/piix4: Move pci_map_irq_fn' near pci_set_irq_fn

The pci_map_irq_fn was implemented below type_init() which made it
inaccessible to QOM functions. So move it up.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220603185045.143789-4-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: c397a2d3e45ea72d2513d95c4e5d148fbc301131
      
https://github.com/qemu/qemu/commit/c397a2d3e45ea72d2513d95c4e5d148fbc301131
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/isa/piix4.c

  Log Message:
  -----------
  hw/isa/piix4: QOM'ify PCI device creation and wiring

PCI interrupt wiring and device creation were performed in create()
functions which are obsolete. Move these tasks into QOM functions to
modernize the code.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20220603185045.143789-5-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: e3d198eed1a2f6cc34f781fb3fe5c57caa66cc7c
      
https://github.com/qemu/qemu/commit/e3d198eed1a2f6cc34f781fb3fe5c57caa66cc7c
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/isa/piix4.c
    M hw/mips/malta.c
    M include/hw/southbridge/piix.h

  Log Message:
  -----------
  hw/isa/piix4: Factor out ISABus retrieval from piix4_create()

Modernizes the code.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220603185045.143789-6-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 19e375db22461b255d32704ad289508e0f1d9947
      
https://github.com/qemu/qemu/commit/19e375db22461b255d32704ad289508e0f1d9947
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/isa/piix4.c
    M hw/mips/malta.c
    M include/hw/southbridge/piix.h

  Log Message:
  -----------
  hw/isa/piix4: QOM'ify PIIX4 PM creation

Just like the real hardware, create the PIIX4 ACPI controller as part of
the PIIX4 southbridge. This also mirrors how the IDE and USB functions
are already created.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20220603185045.143789-7-shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: e8ebf54936fcaa0da1ccd60f2c20df93f5aa68d1
      
https://github.com/qemu/qemu/commit/e8ebf54936fcaa0da1ccd60f2c20df93f5aa68d1
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/isa/piix4.c
    M hw/mips/malta.c
    M include/hw/southbridge/piix.h

  Log Message:
  -----------
  hw/isa/piix4: Inline and remove piix4_create()

During the previous changesets piix4_create() became a trivial
wrapper around more generic functions. Modernize the code.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20220603185045.143789-8-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 5bf26b9393cc223dedd51cbe045aebc7afaf34ff
      
https://github.com/qemu/qemu/commit/5bf26b9393cc223dedd51cbe045aebc7afaf34ff
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/isa/piix3.c

  Log Message:
  -----------
  hw/isa/piix3: Move pci_map_irq_fn near pci_set_irq_fn

The pci_map_irq_fn was implemented below type_init() which made it
inaccessible to QOM functions. So move it up.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220603185045.143789-9-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: fe3055d2929f52c20b37385e2dd039675191bf17
      
https://github.com/qemu/qemu/commit/fe3055d2929f52c20b37385e2dd039675191bf17
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/isa/piix3.c

  Log Message:
  -----------
  hw/isa/piix3: QOM'ify PCI device creation and wiring

PCI interrupt wiring was performed in create() functions which are
obsolete. Move these tasks into QOM functions to modernize the code.

In order to avoid duplicate checking for xen_enabled() the realize
methods are now split.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20220603185045.143789-10-shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 6e8791fb6170a3eca90485056813e8eccb9080a9
      
https://github.com/qemu/qemu/commit/6e8791fb6170a3eca90485056813e8eccb9080a9
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/i386/pc_piix.c
    M hw/isa/piix3.c
    M include/hw/southbridge/piix.h

  Log Message:
  -----------
  hw/isa/piix3: Factor out ISABus retrieval from piix3_create()

Modernizes the code.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20220603185045.143789-11-shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 988fb613215993dd0ce642b89ca8182c479d39dd
      
https://github.com/qemu/qemu/commit/988fb613215993dd0ce642b89ca8182c479d39dd
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/i386/pc_piix.c
    M hw/isa/piix3.c
    M include/hw/southbridge/piix.h

  Log Message:
  -----------
  hw/isa/piix3: Inline and remove piix3_create()

During the previous changesets piix3_create() became a trivial
wrapper around more generic functions. Modernize the code.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20220603185045.143789-12-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 94c720f39ede609ca659e9e351d634711656dbb4
      
https://github.com/qemu/qemu/commit/94c720f39ede609ca659e9e351d634711656dbb4
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/i386/microvm-dt.c

  Log Message:
  -----------
  hw/i386/microvm-dt: Force explicit failure if retrieving QOM property fails

New code will be added where this is best practice. So update existing code
as well.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220529184006.10712-2-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 8f3428cc8555c5226711f3b32073070d2481f5c8
      
https://github.com/qemu/qemu/commit/8f3428cc8555c5226711f3b32073070d2481f5c8
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/i386/microvm-dt.c

  Log Message:
  -----------
  hw/i386/microvm-dt: Determine mc146818rtc's IRQ number from QOM property

Since commit 3b004a16540aa41f2aa6a1ceb0bf306716766914 'hw/rtc/
mc146818rtc: QOM'ify IRQ number' mc146818rtc's IRQ number is
configurable. Fix microvm-dt to respect its value.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220529184006.10712-3-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 5b21b331beaa20225b481ea068e21dcb65aba598
      
https://github.com/qemu/qemu/commit/5b21b331beaa20225b481ea068e21dcb65aba598
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/i386/microvm-dt.c
    M hw/rtc/mc146818rtc.c
    M include/hw/rtc/mc146818rtc.h

  Log Message:
  -----------
  hw/rtc/mc146818rtc: QOM'ify io_base offset

Exposing the io_base offset as a QOM property not only allows it to be
configurable but also to be displayed in HMP:

Before:

(qemu) info qtree
       ...
          dev: mc146818rtc, id ""
            gpio-out "" 1
            base_year = 0 (0x0)
            irq = 8 (0x8)
            lost_tick_policy = "discard"

After:

          dev: mc146818rtc, id ""
            gpio-out "" 1
            base_year = 0 (0x0)
            iobase = 112 (0x70)
            irq = 8 (0x8)
            lost_tick_policy = "discard"

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220529184006.10712-4-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: aa2e535c82eaf090dda5373c276598e4694c9273
      
https://github.com/qemu/qemu/commit/aa2e535c82eaf090dda5373c276598e4694c9273
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/i386/pc.c
    M hw/sparc64/sun4u.c

  Log Message:
  -----------
  hw: Reuse TYPE_I8042 define

TYPE_I8042 is exported, so reuse it for consistency.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20220520180109.8224-2-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: bae17e7483de896a1d1922e07c6727ad0536e64c
      
https://github.com/qemu/qemu/commit/bae17e7483de896a1d1922e07c6727ad0536e64c
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/audio/cs4231a.c

  Log Message:
  -----------
  hw/audio/cs4231a: Const'ify global tables

The tables contain spcifically crafted constants for algorithms, so make
them immutable.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20220520180109.8224-3-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: fc5f89236874bc5af1fa0674da876236cf710774
      
https://github.com/qemu/qemu/commit/fc5f89236874bc5af1fa0674da876236cf710774
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/i386/pc.c
    M include/hw/i386/pc.h

  Log Message:
  -----------
  hw/i386/pc: Unexport PC_CPU_MODEL_IDS macro

The macro seems to be used only internally, so remove it.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20220520180109.8224-4-shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: cb76321ecce55cddc7fd86c1c2b705f919c4cb7e
      
https://github.com/qemu/qemu/commit/cb76321ecce55cddc7fd86c1c2b705f919c4cb7e
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/i386/pc.c
    M include/hw/i386/pc.h

  Log Message:
  -----------
  hw/i386/pc: Unexport functions used only internally

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20220520180109.8224-5-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 68d58770d761d585002580856c4916e31a3efb3e
      
https://github.com/qemu/qemu/commit/68d58770d761d585002580856c4916e31a3efb3e
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M include/hw/i386/pc.h

  Log Message:
  -----------
  hw/i386/pc: Remove orphan declarations

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20220520180109.8224-6-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 3d9641509ad88eb326f9ea5a9270c9f27e4ddc5f
      
https://github.com/qemu/qemu/commit/3d9641509ad88eb326f9ea5a9270c9f27e4ddc5f
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M hw/net/fsl_etsec/etsec.c
    M hw/net/fsl_etsec/etsec.h

  Log Message:
  -----------
  hw/net/fsl_etsec/etsec: Remove obsolete and unused etsec_create()

etsec_create() wraps qdev API which is outdated. It is also unused,
so remove it.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20220520180109.8224-8-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 7112ffd93abd075a60e3848d0b9ff4ecaf72a653
      
https://github.com/qemu/qemu/commit/7112ffd93abd075a60e3848d0b9ff4ecaf72a653
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M accel/tcg/cpu-exec.c
    M include/exec/cpu-all.h

  Log Message:
  -----------
  accel/tcg/cpu-exec: Unexport dump_drift_info()

Commit 3a841ab53f165910224dc4bebabf1a8f1d04200c 'qapi: introduce
x-query-jit QMP command' basically moved the only function using
dump_drift_info() to cpu-exec.c. Therefore, dump_drift_info() doesn't
need to be exported any longer.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20220520180109.8224-9-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: b01841fa85a607aa289d312da892aa444c29e942
      
https://github.com/qemu/qemu/commit/b01841fa85a607aa289d312da892aa444c29e942
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M accel/tcg/cpu-exec.c
    M accel/tcg/translate-all.c
    M include/exec/cpu-all.h

  Log Message:
  -----------
  accel/tcg: Inline dump_opcount_info() and remove it

dump_opcount_info() is a one-line wrapper around tcg_dump_op_count()
which is also exported. So use the latter directly.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20220520180109.8224-10-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 37da3bcf01ccd19336fd8f43bedcd0841d71bb6a
      
https://github.com/qemu/qemu/commit/37da3bcf01ccd19336fd8f43bedcd0841d71bb6a
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M docs/devel/submitting-a-patch.rst

  Log Message:
  -----------
  docs/devel: Fix link to developer mailing lists

Ammends commit 9f73de8df0335c9387f4ee39e207a65a1615676f 'docs: rSTify
the "SubmitAPatch" wiki'.

Cc: qemu-stable@nongnu.org
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20220520180109.8224-11-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 8b7f856e9dca75255af5037b68df385928616dab
      
https://github.com/qemu/qemu/commit/8b7f856e9dca75255af5037b68df385928616dab
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-06-11 (Sat, 11 Jun 2022)

  Changed paths:
    M MAINTAINERS
    M accel/tcg/cpu-exec.c
    M accel/tcg/translate-all.c
    M docs/about/deprecated.rst
    M docs/devel/submitting-a-patch.rst
    M hw/acpi/piix4.c
    M hw/audio/cs4231a.c
    M hw/block/fdc-sysbus.c
    M hw/i386/acpi-build.c
    M hw/i386/microvm-dt.c
    M hw/i386/pc.c
    M hw/i386/pc_piix.c
    M hw/isa/piix3.c
    M hw/isa/piix4.c
    M hw/mips/jazz.c
    M hw/mips/malta.c
    M hw/net/fsl_etsec/etsec.c
    M hw/net/fsl_etsec/etsec.h
    M hw/rtc/mc146818rtc.c
    M hw/sparc64/sun4u.c
    M include/exec/cpu-all.h
    A include/hw/acpi/piix4.h
    M include/hw/block/fdc.h
    M include/hw/i386/pc.h
    M include/hw/isa/isa.h
    M include/hw/rtc/mc146818rtc.h
    M include/hw/southbridge/piix.h
    M target/mips/cpu.c
    M target/mips/cpu.h
    M target/mips/tcg/msa_helper.c
    M target/mips/tcg/msa_translate.c
    M target/mips/tcg/nanomips_translate.c.inc
    M target/mips/tcg/sysemu/cp0_helper.c
    M target/mips/tcg/translate.c

  Log Message:
  -----------
  Merge tag 'mips-20220611' of https://github.com/philmd/qemu into staging

MIPS patches queue

- Various TCG fixes (Marcin Nowakowski, Ni Hui, Stefan Pejic, Stefan Pejic)
- Sysbus floppy controller fix (Peter Maydell)
- QOM'ification of PIIX southbridge (Mark Cave-Ayland, Bernhard Beschow)
- Various fixes on ISA devices commonly used by x86/mips machines (Bernhard)
- Few cleanups in accel/tcg & documentation (Bernhard)

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[full]

* tag 'mips-20220611' of https://github.com/philmd/qemu: (49 commits)
  docs/devel: Fix link to developer mailing lists
  accel/tcg: Inline dump_opcount_info() and remove it
  accel/tcg/cpu-exec: Unexport dump_drift_info()
  hw/net/fsl_etsec/etsec: Remove obsolete and unused etsec_create()
  hw/i386/pc: Remove orphan declarations
  hw/i386/pc: Unexport functions used only internally
  hw/i386/pc: Unexport PC_CPU_MODEL_IDS macro
  hw/audio/cs4231a: Const'ify global tables
  hw: Reuse TYPE_I8042 define
  hw/rtc/mc146818rtc: QOM'ify io_base offset
  hw/i386/microvm-dt: Determine mc146818rtc's IRQ number from QOM property
  hw/i386/microvm-dt: Force explicit failure if retrieving QOM property fails
  hw/isa/piix3: Inline and remove piix3_create()
  hw/isa/piix3: Factor out ISABus retrieval from piix3_create()
  hw/isa/piix3: QOM'ify PCI device creation and wiring
  hw/isa/piix3: Move pci_map_irq_fn near pci_set_irq_fn
  hw/isa/piix4: Inline and remove piix4_create()
  hw/isa/piix4: QOM'ify PIIX4 PM creation
  hw/isa/piix4: Factor out ISABus retrieval from piix4_create()
  hw/isa/piix4: QOM'ify PCI device creation and wiring
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Compare: https://github.com/qemu/qemu/compare/30796f556790...8b7f856e9dca
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