[Qemu-commits] [qemu/qemu] 64baad: target/loongarch: Add README

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[Qemu-commits] [qemu/qemu] 64baad: target/loongarch: Add README

From:	Richard Henderson
Subject:	[Qemu-commits] [qemu/qemu] 64baad: target/loongarch: Add README
Date:	Mon, 06 Jun 2022 16:16:36 -0700
  Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: 64baad62cd3d9f2e57f65a8f3be7b5639a77e0b4
      
https://github.com/qemu/qemu/commit/64baad62cd3d9f2e57f65a8f3be7b5639a77e0b4
  Author: Song Gao <gaosong@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M MAINTAINERS
    A target/loongarch/README

  Log Message:
  -----------
  target/loongarch: Add README

This patch gives an introduction to the LoongArch target.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-2-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 228021f05ebfd89a3abc225d47a0d0e6c139dade
      
https://github.com/qemu/qemu/commit/228021f05ebfd89a3abc225d47a0d0e6c139dade
  Author: Song Gao <gaosong@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    A target/loongarch/cpu-param.h
    A target/loongarch/cpu.c
    A target/loongarch/cpu.h
    A target/loongarch/internals.h

  Log Message:
  -----------
  target/loongarch: Add core definition

This patch adds target state header, target definitions
and initialization routines.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220606124333.2060567-3-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: f8da88d78f71da751f089913784fa884df31bd03
      
https://github.com/qemu/qemu/commit/f8da88d78f71da751f089913784fa884df31bd03
  Author: Song Gao <gaosong@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    A target/loongarch/helper.h
    A target/loongarch/op_helper.c
    A target/loongarch/translate.c
    A target/loongarch/translate.h

  Log Message:
  -----------
  target/loongarch: Add main translation routines

This patch adds main translation routines and
basic functions for translation.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-4-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 143d6785ef725aff6d09bc112c21119c32d9d0ae
      
https://github.com/qemu/qemu/commit/143d6785ef725aff6d09bc112c21119c32d9d0ae
  Author: Song Gao <gaosong@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    A target/loongarch/insn_trans/trans_arith.c.inc
    A target/loongarch/insns.decode
    M target/loongarch/translate.c
    M target/loongarch/translate.h

  Log Message:
  -----------
  target/loongarch: Add fixed point arithmetic instruction translation

This includes:
- ADD.{W/D}, SUB.{W/D}
- ADDI.{W/D}, ADDU16ID
- ALSL.{W[U]/D}
- LU12I.W, LU32I.D LU52I.D
- SLT[U], SLT[U]I
- PCADDI, PCADDU12I, PCADDU18I, PCALAU12I
- AND, OR, NOR, XOR, ANDN, ORN
- MUL.{W/D}, MULH.{W[U]/D[U]}
- MULW.D.W[U]
- DIV.{W[U]/D[U]}, MOD.{W[U]/D[U]}
- ANDI, ORI, XORI

Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-5-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 63cfcd47d70de7b3133da894edd06d5bf0a5ad93
      
https://github.com/qemu/qemu/commit/63cfcd47d70de7b3133da894edd06d5bf0a5ad93
  Author: Song Gao <gaosong@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    A target/loongarch/insn_trans/trans_shift.c.inc
    M target/loongarch/insns.decode
    M target/loongarch/translate.c

  Log Message:
  -----------
  target/loongarch: Add fixed point shift instruction translation

This includes:
- SLL.W, SRL.W, SRA.W, ROTR.W
- SLLI.W, SRLI.W, SRAI.W, ROTRI.W
- SLL.D, SRL.D, SRA.D, ROTR.D
- SLLI.D, SRLI.D, SRAI.D, ROTRI.D

Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-6-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: ad08cb3f9728caf83fff7958e308ef7f1ad03fae
      
https://github.com/qemu/qemu/commit/ad08cb3f9728caf83fff7958e308ef7f1ad03fae
  Author: Song Gao <gaosong@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M target/loongarch/helper.h
    A target/loongarch/insn_trans/trans_bit.c.inc
    M target/loongarch/insns.decode
    M target/loongarch/op_helper.c
    M target/loongarch/translate.c

  Log Message:
  -----------
  target/loongarch: Add fixed point bit instruction translation

This includes:
- EXT.W.{B/H}
- CL{O/Z}.{W/D}, CT{O/Z}.{W/D}
- BYTEPICK.{W/D}
- REVB.{2H/4H/2W/D}
- REVH.{2W/D}
- BITREV.{4B/8B}, BITREV.{W/D}
- BSTRINS.{W/D}, BSTRPICK.{W/D}
- MASKEQZ, MASKNEZ

Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-7-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: bb79174d4e191dc83414072e1a7859095faed567
      
https://github.com/qemu/qemu/commit/bb79174d4e191dc83414072e1a7859095faed567
  Author: Song Gao <gaosong@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M target/loongarch/helper.h
    A target/loongarch/insn_trans/trans_memory.c.inc
    M target/loongarch/insns.decode
    M target/loongarch/op_helper.c
    M target/loongarch/translate.c

  Log Message:
  -----------
  target/loongarch: Add fixed point load/store instruction translation

This includes:
- LD.{B[U]/H[U]/W[U]/D}, ST.{B/H/W/D}
- LDX.{B[U]/H[U]/W[U]/D}, STX.{B/H/W/D}
- LDPTR.{W/D}, STPTR.{W/D}
- PRELD
- LD{GT/LE}.{B/H/W/D}, ST{GT/LE}.{B/H/W/D}
- DBAR, IBAR

Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-8-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 94b02d57b09eeb2dcb07a2a196b91310420bd0bf
      
https://github.com/qemu/qemu/commit/94b02d57b09eeb2dcb07a2a196b91310420bd0bf
  Author: Song Gao <gaosong@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    A target/loongarch/insn_trans/trans_atomic.c.inc
    M target/loongarch/insn_trans/trans_memory.c.inc
    M target/loongarch/insns.decode
    M target/loongarch/translate.c

  Log Message:
  -----------
  target/loongarch: Add fixed point atomic instruction translation

This includes:
- LL.{W/D}, SC.{W/D}
- AM{SWAP/ADD/AND/OR/XOR/MAX/MIN}[_DB].{W/D}
- AM{MAX/MIN}[_DB].{WU/DU}

Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-9-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 8708a04a6145b4c9289fed28358fb1273dcd6aea
      
https://github.com/qemu/qemu/commit/8708a04a6145b4c9289fed28358fb1273dcd6aea
  Author: Song Gao <gaosong@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M target/loongarch/helper.h
    A target/loongarch/insn_trans/trans_extra.c.inc
    M target/loongarch/insns.decode
    M target/loongarch/op_helper.c
    M target/loongarch/translate.c

  Log Message:
  -----------
  target/loongarch: Add fixed point extra instruction translation

This includes:
- CRC[C].W.{B/H/W/D}.W
- SYSCALL
- BREAK
- ASRT{LE/GT}.D
- RDTIME{L/H}.W, RDTIME.D
- CPUCFG

Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-10-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: d578ca6cbba6056f17901c869a6325d571bb124d
      
https://github.com/qemu/qemu/commit/d578ca6cbba6056f17901c869a6325d571bb124d
  Author: Song Gao <gaosong@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M target/loongarch/cpu.c
    A target/loongarch/fpu_helper.c
    M target/loongarch/helper.h
    A target/loongarch/insn_trans/trans_farith.c.inc
    M target/loongarch/insns.decode
    M target/loongarch/internals.h
    M target/loongarch/translate.c

  Log Message:
  -----------
  target/loongarch: Add floating point arithmetic instruction translation

This includes:
- F{ADD/SUB/MUL/DIV}.{S/D}
- F{MADD/MSUB/NMADD/NMSUB}.{S/D}
- F{MAX/MIN}.{S/D}
- F{MAXA/MINA}.{S/D}
- F{ABS/NEG}.{S/D}
- F{SQRT/RECIP/RSQRT}.{S/D}
- F{SCALEB/LOGB/COPYSIGN}.{S/D}
- FCLASS.{S/D}

Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-11-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 9b7410763aedcd99b7f2302c564c8778179ef347
      
https://github.com/qemu/qemu/commit/9b7410763aedcd99b7f2302c564c8778179ef347
  Author: Song Gao <gaosong@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M target/loongarch/fpu_helper.c
    M target/loongarch/helper.h
    A target/loongarch/insn_trans/trans_fcmp.c.inc
    M target/loongarch/insns.decode
    M target/loongarch/internals.h
    M target/loongarch/translate.c

  Log Message:
  -----------
  target/loongarch: Add floating point comparison instruction translation

This includes:
- FCMP.cond.{S/D}

Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-12-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 7c1f88703d216cc6b2e30689fbc295423ca13d40
      
https://github.com/qemu/qemu/commit/7c1f88703d216cc6b2e30689fbc295423ca13d40
  Author: Song Gao <gaosong@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M target/loongarch/fpu_helper.c
    M target/loongarch/helper.h
    A target/loongarch/insn_trans/trans_fcnv.c.inc
    M target/loongarch/insns.decode
    M target/loongarch/translate.c

  Log Message:
  -----------
  target/loongarch: Add floating point conversion instruction translation

This includes:
- FCVT.S.D, FCVT.D.S
- FFINT.{S/D}.{W/L}, FTINT.{W/L}.{S/D}
- FTINT{RM/RP/RZ/RNE}.{W/L}.{S/D}
- FRINT.{S/D}

Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-13-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: b7dabd5624326b116d6147c659de22037f357cf8
      
https://github.com/qemu/qemu/commit/b7dabd5624326b116d6147c659de22037f357cf8
  Author: Song Gao <gaosong@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M target/loongarch/fpu_helper.c
    M target/loongarch/helper.h
    A target/loongarch/insn_trans/trans_fmov.c.inc
    M target/loongarch/insns.decode
    M target/loongarch/translate.c

  Log Message:
  -----------
  target/loongarch: Add floating point move instruction translation

This includes:
- FMOV.{S/D}
- FSEL
- MOVGR2FR.{W/D}, MOVGR2FRH.W
- MOVFR2GR.{S/D}, MOVFRH2GR.S
- MOVGR2FCSR, MOVFCSR2GR
- MOVFR2CF, MOVCF2FR
- MOVGR2CF, MOVCF2GR

Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-14-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: e616bdfd0159965bd65f12be83ebf28dc8c44bae
      
https://github.com/qemu/qemu/commit/e616bdfd0159965bd65f12be83ebf28dc8c44bae
  Author: Song Gao <gaosong@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    A target/loongarch/insn_trans/trans_fmemory.c.inc
    M target/loongarch/insns.decode
    M target/loongarch/translate.c

  Log Message:
  -----------
  target/loongarch: Add floating point load/store instruction translation

This includes:
- FLD.{S/D}, FST.{S/D}
- FLDX.{S/D}, FSTX.{S/D}
- FLD{GT/LE}.{S/D}, FST{GT/LE}.{S/D}

Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-15-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: ee86bd58b85ce9afe727b6664ba597acc371bdf2
      
https://github.com/qemu/qemu/commit/ee86bd58b85ce9afe727b6664ba597acc371bdf2
  Author: Song Gao <gaosong@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    A target/loongarch/insn_trans/trans_branch.c.inc
    M target/loongarch/insns.decode
    M target/loongarch/translate.c

  Log Message:
  -----------
  target/loongarch: Add branch instruction translation

This includes:
- BEQ, BNE, BLT[U], BGE[U]
- BEQZ, BNEZ
- B
- BL
- JIRL
- BCEQZ, BCNEZ

Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-16-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: aae1746c726d6cc54e555bcca21e1eb5b56c21bf
      
https://github.com/qemu/qemu/commit/aae1746c726d6cc54e555bcca21e1eb5b56c21bf
  Author: Song Gao <gaosong@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M include/disas/dis-asm.h
    M meson.build
    A target/loongarch/disas.c

  Log Message:
  -----------
  target/loongarch: Add disassembler

This patch adds support for disassembling via option '-d in_asm'.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-17-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 14f2b0b74188582c6f016f8659b24baa340d765a
      
https://github.com/qemu/qemu/commit/14f2b0b74188582c6f016f8659b24baa340d765a
  Author: Song Gao <gaosong@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    A target/loongarch/meson.build
    M target/meson.build

  Log Message:
  -----------
  target/loongarch: Add target build suport

Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220606124333.2060567-18-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: d88b51dc26c0e29d012f52d0215ebef29329ca87
      
https://github.com/qemu/qemu/commit/d88b51dc26c0e29d012f52d0215ebef29329ca87
  Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M MAINTAINERS
    A docs/system/loongarch/loongson3.rst
    M target/loongarch/README

  Log Message:
  -----------
  target/loongarch: Add system emulation introduction

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-19-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 398cecb9c3e756afcbf5c5f2bfa9796be0324e2c
      
https://github.com/qemu/qemu/commit/398cecb9c3e756afcbf5c5f2bfa9796be0324e2c
  Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    A target/loongarch/cpu-csr.h
    M target/loongarch/cpu.c
    M target/loongarch/cpu.h

  Log Message:
  -----------
  target/loongarch: Add CSRs definition

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-20-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 67ebd42a4884b5d6f29391beada050823108bd4f
      
https://github.com/qemu/qemu/commit/67ebd42a4884b5d6f29391beada050823108bd4f
  Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M target/loongarch/cpu.c
    M target/loongarch/internals.h
    A target/loongarch/machine.c
    M target/loongarch/meson.build

  Log Message:
  -----------
  target/loongarch: Add basic vmstate description of CPU.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-21-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 425876f5d8110d5c004843d104a1cb1b90b35542
      
https://github.com/qemu/qemu/commit/425876f5d8110d5c004843d104a1cb1b90b35542
  Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M qapi/machine-target.json
    M target/loongarch/cpu.c

  Log Message:
  -----------
  target/loongarch: Implement qmp_query_cpu_definitions()

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-22-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 7e1c521e2a108a4ffceecd8bec846625c956c8f8
      
https://github.com/qemu/qemu/commit/7e1c521e2a108a4ffceecd8bec846625c956c8f8
  Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M target/loongarch/cpu-param.h
    M target/loongarch/cpu.c
    M target/loongarch/cpu.h
    M target/loongarch/internals.h
    M target/loongarch/machine.c
    M target/loongarch/meson.build
    A target/loongarch/tlb_helper.c

  Log Message:
  -----------
  target/loongarch: Add MMU support for LoongArch CPU.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-23-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: f757a2cd6948344b8303e375f6f9d72887abf1f4
      
https://github.com/qemu/qemu/commit/f757a2cd6948344b8303e375f6f9d72887abf1f4
  Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M target/loongarch/cpu.c
    M target/loongarch/cpu.h
    M target/loongarch/internals.h

  Log Message:
  -----------
  target/loongarch: Add LoongArch interrupt and exception handle

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-24-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: dd615fa48da89b2308a907cc4e4956771c75d68f
      
https://github.com/qemu/qemu/commit/dd615fa48da89b2308a907cc4e4956771c75d68f
  Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    A target/loongarch/constant_timer.c
    M target/loongarch/cpu.c
    M target/loongarch/cpu.h
    M target/loongarch/internals.h
    M target/loongarch/meson.build

  Log Message:
  -----------
  target/loongarch: Add constant timer support

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-25-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 5b1dedfe848b61521aa5b46b81a4cc676e9e7c1b
      
https://github.com/qemu/qemu/commit/5b1dedfe848b61521aa5b46b81a4cc676e9e7c1b
  Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    A target/loongarch/csr_helper.c
    M target/loongarch/disas.c
    M target/loongarch/helper.h
    A target/loongarch/insn_trans/trans_privileged.c.inc
    M target/loongarch/insns.decode
    M target/loongarch/meson.build
    M target/loongarch/translate.c

  Log Message:
  -----------
  target/loongarch: Add LoongArch CSR instruction

This includes:
- CSRRD
- CSRWR
- CSRXCHG

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-26-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: f84a2aacf5d1679b1d1cceabb6006e02864232f3
      
https://github.com/qemu/qemu/commit/f84a2aacf5d1679b1d1cceabb6006e02864232f3
  Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M target/loongarch/cpu.c
    M target/loongarch/cpu.h
    M target/loongarch/disas.c
    M target/loongarch/helper.h
    M target/loongarch/insn_trans/trans_privileged.c.inc
    M target/loongarch/insns.decode
    A target/loongarch/iocsr_helper.c
    M target/loongarch/meson.build

  Log Message:
  -----------
  target/loongarch: Add LoongArch IOCSR instruction

This includes:
- IOCSR{RD/WR}.{B/H/W/D}

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-27-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: fcbbeb8ecd8b755e9244e12f2f0d7579350ab23e
      
https://github.com/qemu/qemu/commit/fcbbeb8ecd8b755e9244e12f2f0d7579350ab23e
  Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M target/loongarch/disas.c
    M target/loongarch/helper.h
    M target/loongarch/insn_trans/trans_privileged.c.inc
    M target/loongarch/insns.decode
    M target/loongarch/tlb_helper.c

  Log Message:
  -----------
  target/loongarch: Add TLB instruction support

This includes:
- TLBSRCH
- TLBRD
- TLBWR
- TLBFILL
- TLBCLR
- TLBFLUSH
- INVTLB

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-28-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: d2cba6f7cea9d55aa0567fa8efdeaf2028e1de5e
      
https://github.com/qemu/qemu/commit/d2cba6f7cea9d55aa0567fa8efdeaf2028e1de5e
  Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M target/loongarch/disas.c
    M target/loongarch/helper.h
    M target/loongarch/insn_trans/trans_privileged.c.inc
    M target/loongarch/insns.decode
    M target/loongarch/internals.h
    M target/loongarch/op_helper.c
    M target/loongarch/tlb_helper.c

  Log Message:
  -----------
  target/loongarch: Add other core instructions support

This includes:
-CACOP
-LDDIR
-LDPTE
-ERTN
-DBCL
-IDLE

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-29-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: f9bf50745f29c85e531857898ed7927b6db7c763
      
https://github.com/qemu/qemu/commit/f9bf50745f29c85e531857898ed7927b6db7c763
  Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M target/loongarch/disas.c
    M target/loongarch/helper.h
    M target/loongarch/insn_trans/trans_extra.c.inc
    M target/loongarch/insns.decode
    M target/loongarch/op_helper.c
    M target/loongarch/translate.c

  Log Message:
  -----------
  target/loongarch: Add timer related instructions support.

This includes:
-RDTIME{L/H}.W
-RDTIME.D

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-30-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: a8a506c3907093a064dd2d475564e677fb1bf148
      
https://github.com/qemu/qemu/commit/a8a506c3907093a064dd2d475564e677fb1bf148
  Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M MAINTAINERS
    A configs/devices/loongarch64-softmmu/default.mak
    A configs/targets/loongarch64-softmmu.mak
    M hw/Kconfig
    A hw/loongarch/Kconfig
    A hw/loongarch/loongson3.c
    A hw/loongarch/meson.build
    M hw/meson.build
    M include/exec/poison.h
    A include/hw/loongarch/virt.h
    M include/sysemu/arch_init.h
    M qapi/machine.json
    M target/Kconfig
    A target/loongarch/Kconfig
    M target/loongarch/cpu.c

  Log Message:
  -----------
  hw/loongarch: Add support loongson3 virt machine type.

Emulate a 3A5000 board use the new loongarch instruction.
3A5000 belongs to the Loongson3 series processors.
The board consists of a 3A5000 cpu model and the virt
bridge. The host 3A5000 board is really complicated and
contains many functions.Now for the tcg softmmu mode
only part functions are emulated.

More detailed info you can see
https://github.com/loongson/LoongArch-Documentation

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-31-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: f6783e34380955e9ec0656c7b9fb8936b9733a6a
      
https://github.com/qemu/qemu/commit/f6783e34380955e9ec0656c7b9fb8936b9733a6a
  Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M MAINTAINERS
    M hw/intc/Kconfig
    A hw/intc/loongarch_ipi.c
    M hw/intc/meson.build
    M hw/intc/trace-events
    M hw/loongarch/Kconfig
    A include/hw/intc/loongarch_ipi.h
    M include/hw/loongarch/virt.h

  Log Message:
  -----------
  hw/loongarch: Add LoongArch ipi interrupt support(IPI)

This patch realize the IPI interrupt controller.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-32-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 0f4fcf1845fe188901d4ff4cc807bd78690dddd0
      
https://github.com/qemu/qemu/commit/0f4fcf1845fe188901d4ff4cc807bd78690dddd0
  Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M MAINTAINERS
    M hw/intc/Kconfig
    A hw/intc/loongarch_pch_pic.c
    M hw/intc/meson.build
    M hw/intc/trace-events
    M hw/loongarch/Kconfig
    A include/hw/intc/loongarch_pch_pic.h
    A include/hw/pci-host/ls7a.h

  Log Message:
  -----------
  hw/intc: Add LoongArch ls7a interrupt controller support(PCH-PIC)

This patch realize the PCH-PIC interrupt controller.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-33-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 249ad85a4b4ba6e949bba3c5b9932c389e07249c
      
https://github.com/qemu/qemu/commit/249ad85a4b4ba6e949bba3c5b9932c389e07249c
  Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M hw/intc/Kconfig
    A hw/intc/loongarch_pch_msi.c
    M hw/intc/meson.build
    M hw/intc/trace-events
    M hw/loongarch/Kconfig
    A include/hw/intc/loongarch_pch_msi.h
    M include/hw/pci-host/ls7a.h

  Log Message:
  -----------
  hw/intc: Add LoongArch ls7a msi interrupt controller support(PCH-MSI)

This patch realize PCH-MSI interrupt controller.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-34-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: cbff2db1e92f8759db0f0716a41a3e11b18f2eee
      
https://github.com/qemu/qemu/commit/cbff2db1e92f8759db0f0716a41a3e11b18f2eee
  Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M hw/intc/Kconfig
    A hw/intc/loongarch_extioi.c
    M hw/intc/meson.build
    M hw/intc/trace-events
    M hw/loongarch/Kconfig
    A include/hw/intc/loongarch_extioi.h

  Log Message:
  -----------
  hw/intc: Add LoongArch extioi interrupt controller(EIOINTC)

This patch realize the EIOINTC interrupt controller.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-35-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 69d9c74fa9143b58073772cd5a8a7dd2b1d8ffcf
      
https://github.com/qemu/qemu/commit/69d9c74fa9143b58073772cd5a8a7dd2b1d8ffcf
  Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M hw/loongarch/loongson3.c

  Log Message:
  -----------
  hw/loongarch: Add irq hierarchy for the system

This patch add the irq hierarchy for the virt board.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-36-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 256309e1884898a9cedb44abab0f15c4843e06f6
      
https://github.com/qemu/qemu/commit/256309e1884898a9cedb44abab0f15c4843e06f6
  Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M softmmu/qdev-monitor.c

  Log Message:
  -----------
  Enable common virtio pci support for LoongArch

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-37-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: dc93b8df8a166d2df0c007affd49bcfd93e77391
      
https://github.com/qemu/qemu/commit/dc93b8df8a166d2df0c007affd49bcfd93e77391
  Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M hw/loongarch/Kconfig
    M hw/loongarch/loongson3.c
    M include/hw/pci-host/ls7a.h

  Log Message:
  -----------
  hw/loongarch: Add some devices support for 3A5000.

1.Add uart,virtio-net,vga and usb for 3A5000.
2.Add irq set and map for the pci host. Non pci device
use irq 0-16, pci device use 16-64.
3.Add some unimplented device to emulate guest unused
memory space.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-38-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: c117f68a46f4b3fa363635fd610873707d4899fa
      
https://github.com/qemu/qemu/commit/c117f68a46f4b3fa363635fd610873707d4899fa
  Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M MAINTAINERS
    M hw/loongarch/Kconfig
    M hw/loongarch/loongson3.c
    M hw/rtc/Kconfig
    A hw/rtc/ls7a_rtc.c
    M hw/rtc/meson.build
    M include/hw/pci-host/ls7a.h

  Log Message:
  -----------
  hw/loongarch: Add LoongArch ls7a rtc device support

This patch add ls7a rtc device support.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-39-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 6a6f26f481204bb95d855aa0427389ef10073e62
      
https://github.com/qemu/qemu/commit/6a6f26f481204bb95d855aa0427389ef10073e62
  Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M hw/loongarch/loongson3.c
    M target/loongarch/cpu.h

  Log Message:
  -----------
  hw/loongarch: Add LoongArch load elf function.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-40-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 9e6602d65704dc8d2a3fbcd76bfad1bb22fc3d72
      
https://github.com/qemu/qemu/commit/9e6602d65704dc8d2a3fbcd76bfad1bb22fc3d72
  Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M hw/loongarch/loongson3.c

  Log Message:
  -----------
  hw/loongarch: Add LoongArch virt power manager support.

This is a placeholder for missing ACPI, and will eventually be replaced.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-41-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: ca61e75071c647cf93b3161a228c6a54178cd58c
      
https://github.com/qemu/qemu/commit/ca61e75071c647cf93b3161a228c6a54178cd58c
  Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M MAINTAINERS
    M configs/targets/loongarch64-softmmu.mak
    A gdb-xml/loongarch-base64.xml
    A gdb-xml/loongarch-fpu64.xml
    M target/loongarch/cpu.c
    A target/loongarch/gdbstub.c
    M target/loongarch/internals.h
    M target/loongarch/meson.build

  Log Message:
  -----------
  target/loongarch: Add gdb support.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-42-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: c4293333982e9303699dab25140b2d63dfc9a179
      
https://github.com/qemu/qemu/commit/c4293333982e9303699dab25140b2d63dfc9a179
  Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M MAINTAINERS
    A tests/tcg/loongarch64/Makefile.softmmu-target
    A tests/tcg/loongarch64/system/boot.S
    A tests/tcg/loongarch64/system/kernel.ld
    A tests/tcg/loongarch64/system/regdef.h

  Log Message:
  -----------
  tests/tcg/loongarch64: Add hello/memory test in loongarch64 system

- We write a very minimal softmmu harness.
- This is a very simple smoke test with no need to run a full Linux/kernel.
- The Makefile.softmmu-target record the rule to run.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-43-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 34bb43b074906a7cd642ccf03e2b7bea63b53d95
      
https://github.com/qemu/qemu/commit/34bb43b074906a7cd642ccf03e2b7bea63b53d95
  Author: Song Gao <gaosong@loongson.cn>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M configure

  Log Message:
  -----------
  target/loongarch: 'make check-tcg' support

Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220606124333.2060567-44-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 9b1f58854959c5a9bdb347e3e04c252ab7fc9ef5
      
https://github.com/qemu/qemu/commit/9b1f58854959c5a9bdb347e3e04c252ab7fc9ef5
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M MAINTAINERS
    A configs/devices/loongarch64-softmmu/default.mak
    A configs/targets/loongarch64-softmmu.mak
    M configure
    A docs/system/loongarch/loongson3.rst
    A gdb-xml/loongarch-base64.xml
    A gdb-xml/loongarch-fpu64.xml
    M hw/Kconfig
    M hw/intc/Kconfig
    A hw/intc/loongarch_extioi.c
    A hw/intc/loongarch_ipi.c
    A hw/intc/loongarch_pch_msi.c
    A hw/intc/loongarch_pch_pic.c
    M hw/intc/meson.build
    M hw/intc/trace-events
    A hw/loongarch/Kconfig
    A hw/loongarch/loongson3.c
    A hw/loongarch/meson.build
    M hw/meson.build
    M hw/rtc/Kconfig
    A hw/rtc/ls7a_rtc.c
    M hw/rtc/meson.build
    M include/disas/dis-asm.h
    M include/exec/poison.h
    A include/hw/intc/loongarch_extioi.h
    A include/hw/intc/loongarch_ipi.h
    A include/hw/intc/loongarch_pch_msi.h
    A include/hw/intc/loongarch_pch_pic.h
    A include/hw/loongarch/virt.h
    A include/hw/pci-host/ls7a.h
    M include/sysemu/arch_init.h
    M meson.build
    M qapi/machine-target.json
    M qapi/machine.json
    M softmmu/qdev-monitor.c
    M target/Kconfig
    A target/loongarch/Kconfig
    A target/loongarch/README
    A target/loongarch/constant_timer.c
    A target/loongarch/cpu-csr.h
    A target/loongarch/cpu-param.h
    A target/loongarch/cpu.c
    A target/loongarch/cpu.h
    A target/loongarch/csr_helper.c
    A target/loongarch/disas.c
    A target/loongarch/fpu_helper.c
    A target/loongarch/gdbstub.c
    A target/loongarch/helper.h
    A target/loongarch/insn_trans/trans_arith.c.inc
    A target/loongarch/insn_trans/trans_atomic.c.inc
    A target/loongarch/insn_trans/trans_bit.c.inc
    A target/loongarch/insn_trans/trans_branch.c.inc
    A target/loongarch/insn_trans/trans_extra.c.inc
    A target/loongarch/insn_trans/trans_farith.c.inc
    A target/loongarch/insn_trans/trans_fcmp.c.inc
    A target/loongarch/insn_trans/trans_fcnv.c.inc
    A target/loongarch/insn_trans/trans_fmemory.c.inc
    A target/loongarch/insn_trans/trans_fmov.c.inc
    A target/loongarch/insn_trans/trans_memory.c.inc
    A target/loongarch/insn_trans/trans_privileged.c.inc
    A target/loongarch/insn_trans/trans_shift.c.inc
    A target/loongarch/insns.decode
    A target/loongarch/internals.h
    A target/loongarch/iocsr_helper.c
    A target/loongarch/machine.c
    A target/loongarch/meson.build
    A target/loongarch/op_helper.c
    A target/loongarch/tlb_helper.c
    A target/loongarch/translate.c
    A target/loongarch/translate.h
    M target/meson.build
    A tests/tcg/loongarch64/Makefile.softmmu-target
    A tests/tcg/loongarch64/system/boot.S
    A tests/tcg/loongarch64/system/kernel.ld
    A tests/tcg/loongarch64/system/regdef.h

  Log Message:
  -----------
  Merge tag 'pull-la-20220606' of https://gitlab.com/rth7680/qemu into staging

Initial LoongArch support.

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# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" 
[ultimate]

* tag 'pull-la-20220606' of https://gitlab.com/rth7680/qemu: (43 commits)
  target/loongarch: 'make check-tcg' support
  tests/tcg/loongarch64: Add hello/memory test in loongarch64 system
  target/loongarch: Add gdb support.
  hw/loongarch: Add LoongArch virt power manager support.
  hw/loongarch: Add LoongArch load elf function.
  hw/loongarch: Add LoongArch ls7a rtc device support
  hw/loongarch: Add some devices support for 3A5000.
  Enable common virtio pci support for LoongArch
  hw/loongarch: Add irq hierarchy for the system
  hw/intc: Add LoongArch extioi interrupt controller(EIOINTC)
  hw/intc: Add LoongArch ls7a msi interrupt controller support(PCH-MSI)
  hw/intc: Add LoongArch ls7a interrupt controller support(PCH-PIC)
  hw/loongarch: Add LoongArch ipi interrupt support(IPI)
  hw/loongarch: Add support loongson3 virt machine type.
  target/loongarch: Add timer related instructions support.
  target/loongarch: Add other core instructions support
  target/loongarch: Add TLB instruction support
  target/loongarch: Add LoongArch IOCSR instruction
  target/loongarch: Add LoongArch CSR instruction
  target/loongarch: Add constant timer support
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Compare: https://github.com/qemu/qemu/compare/57c9363c452a...9b1f58854959
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