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[Qemu-commits] [qemu/qemu] 12629f: target/m68k: Clear mach in m68k_cpu_d


From: Richard Henderson
Subject: [Qemu-commits] [qemu/qemu] 12629f: target/m68k: Clear mach in m68k_cpu_disas_set_info
Date: Thu, 02 Jun 2022 06:31:09 -0700

  Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: 12629fcf4df783f67e84173a18c9a511d37eb62d
      
https://github.com/qemu/qemu/commit/12629fcf4df783f67e84173a18c9a511d37eb62d
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-05-26 (Thu, 26 May 2022)

  Changed paths:
    M target/m68k/cpu.c

  Log Message:
  -----------
  target/m68k: Clear mach in m68k_cpu_disas_set_info

Zero selects all cpu features in disas/m68k.c,
which is really what we want -- not limited to 68040.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20220430170225.326447-2-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>


  Commit: abc098351e533de5ca0ed9c90901f9f4dac348fc
      
https://github.com/qemu/qemu/commit/abc098351e533de5ca0ed9c90901f9f4dac348fc
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-05-26 (Thu, 26 May 2022)

  Changed paths:
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: Enable halt insn for 68060

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20220430170225.326447-3-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>


  Commit: 79e1d527e13d35b976c947c48a70c23ef3586e76
      
https://github.com/qemu/qemu/commit/79e1d527e13d35b976c947c48a70c23ef3586e76
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-06-02 (Thu, 02 Jun 2022)

  Changed paths:
    M linux-user/m68k/cpu_loop.c
    M target/m68k/op_helper.c
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: Raise the TRAPn exception with the correct pc

Rather than adjust the PC in all of the consumers, raise
the exception with the correct PC in the first place.

Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220602013401.303699-2-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>


  Commit: 02ea42b36ddcd34739c9320ae2262b1d1e814a6d
      
https://github.com/qemu/qemu/commit/02ea42b36ddcd34739c9320ae2262b1d1e814a6d
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-06-02 (Thu, 02 Jun 2022)

  Changed paths:
    M target/m68k/op_helper.c

  Log Message:
  -----------
  target/m68k: Switch over exception type in m68k_interrupt_all

Replace an if ladder with a switch for clarity.

Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220602013401.303699-3-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>


  Commit: eeb8f7b0f84f86b5fa1e17aed851d758e1c7ee0f
      
https://github.com/qemu/qemu/commit/eeb8f7b0f84f86b5fa1e17aed851d758e1c7ee0f
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-06-02 (Thu, 02 Jun 2022)

  Changed paths:
    M target/m68k/op_helper.c

  Log Message:
  -----------
  target/m68k: Fix coding style in m68k_interrupt_all

Add parenthesis around & vs &&.

Remove assignment to sr in function call argument -- note that
sr is unused after the call, so the assignment was never needed,
only the result of the & expression.

Suggested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220602013401.303699-4-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>


  Commit: cf213dacf8d9bc37889aeaebc781f5f55d705f0d
      
https://github.com/qemu/qemu/commit/cf213dacf8d9bc37889aeaebc781f5f55d705f0d
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-06-02 (Thu, 02 Jun 2022)

  Changed paths:
    M linux-user/m68k/cpu_loop.c

  Log Message:
  -----------
  linux-user/m68k: Handle EXCP_TRAP1 through EXCP_TRAP15

These are raised by guest instructions, and should not
fall through into the default abort case.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220602013401.303699-5-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>


  Commit: 035c6e7b5d86edee9e96423a590ee3ee0546c921
      
https://github.com/qemu/qemu/commit/035c6e7b5d86edee9e96423a590ee3ee0546c921
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-06-02 (Thu, 02 Jun 2022)

  Changed paths:
    M target/m68k/op_helper.c

  Log Message:
  -----------
  target/m68k: Remove retaddr in m68k_interrupt_all

The only value this variable holds is now env->pc.

Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220602013401.303699-6-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>


  Commit: ad5a5cf97d80501be95f5d255d2ce133e0623b50
      
https://github.com/qemu/qemu/commit/ad5a5cf97d80501be95f5d255d2ce133e0623b50
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-06-02 (Thu, 02 Jun 2022)

  Changed paths:
    M linux-user/m68k/cpu_loop.c
    M target/m68k/cpu.h
    M target/m68k/op_helper.c

  Log Message:
  -----------
  target/m68k: Fix address argument for EXCP_CHK

According to the M68040 Users Manual, section 8.4.3,
Six word stack frame (format 2), CHK, CHK2 (and others)
are supposed to record the next insn in PC and the
address of the trapping instruction in ADDRESS.

Create a raise_exception_format2 function to centralize recording
of the trapping pc in mmu.ar, plus advancing to the next insn.

Update m68k_interrupt_all to pass mmu.ar to do_stack_frame.
Update cpu_loop to pass mmu.ar to siginfo.si_addr, as the
kernel does in trap_c().

Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220602013401.303699-7-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>


  Commit: 710d747b2deaf5f5678aebb1fabbe00224e5cdde
      
https://github.com/qemu/qemu/commit/710d747b2deaf5f5678aebb1fabbe00224e5cdde
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-06-02 (Thu, 02 Jun 2022)

  Changed paths:
    M linux-user/m68k/cpu_loop.c
    M target/m68k/helper.h
    M target/m68k/op_helper.c
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: Fix pc, c flag, and address argument for EXCP_DIV0

According to the M68040 Users Manual, section 8.4.3,
Six word stack frame (format 2), Zero Div (and others)
is supposed to record the next insn in PC and the
address of the trapping instruction in ADDRESS.

While the N, Z and V flags are documented to be undefine on DIV0,
the C flag is documented as always cleared.

Update helper_div* to take the instruction length as an argument
and use raise_exception_format2.  Hoist the reset of the C flag
above the division by zero check.

Update m68k_interrupt_all to pass mmu.ar to do_stack_frame.
Update cpu_loop to pass mmu.ar to siginfo.si_addr, as the
kernel does in trap_c().

Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220602013401.303699-8-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>


  Commit: 8115fc9368e41f91a8bc27a78c2840beda989cb5
      
https://github.com/qemu/qemu/commit/8115fc9368e41f91a8bc27a78c2840beda989cb5
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-06-02 (Thu, 02 Jun 2022)

  Changed paths:
    M linux-user/m68k/cpu_loop.c
    M target/m68k/op_helper.c
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: Fix address argument for EXCP_TRACE

According to the M68040 Users Manual, section 8.4.3,
Six word stack frame (format 2), Trace (and others) is
supposed to record the next insn in PC and the address
of the trapping instruction in ADDRESS.

Create gen_raise_exception_format2 to record the trapping
pc in env->mmu.ar.  Update m68k_interrupt_all to pass the
value to do_stack_frame.  Update cpu_loop to handle EXCP_TRACE.

Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220602013401.303699-9-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>


  Commit: a1aedd6cbdec67c1d47d961144285f4b95af5fc0
      
https://github.com/qemu/qemu/commit/a1aedd6cbdec67c1d47d961144285f4b95af5fc0
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-06-02 (Thu, 02 Jun 2022)

  Changed paths:
    M target/m68k/op_helper.c

  Log Message:
  -----------
  target/m68k: Fix stack frame for EXCP_ILLEGAL

According to the M68040 Users Manual, section 8.4.1, Four word
stack frame (format 0), includes Illegal Instruction.  Use the
correct frame format, which does not use the ADDR argument.

Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220602013401.303699-10-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>


  Commit: aeeb90afcec3e18254bc6ac9c511f3b0a1a3796c
      
https://github.com/qemu/qemu/commit/aeeb90afcec3e18254bc6ac9c511f3b0a1a3796c
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-06-02 (Thu, 02 Jun 2022)

  Changed paths:
    M linux-user/m68k/cpu_loop.c
    M target/m68k/cpu.c
    M target/m68k/cpu.h
    M target/m68k/op_helper.c
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: Implement TRAPcc

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/754
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220602013401.303699-11-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>


  Commit: 815c6dea464c661032c6cc76f42160a6240c930e
      
https://github.com/qemu/qemu/commit/815c6dea464c661032c6cc76f42160a6240c930e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-06-02 (Thu, 02 Jun 2022)

  Changed paths:
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: Implement TPF in terms of TRAPcc

TPF stands for "trap false", and is a long-form nop for ColdFire.
Re-use the immediate consumption code from trapcc; the insn will
already expand to a nop because of the TCG_COND_NEVER test
within do_trapcc.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220602013401.303699-12-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>


  Commit: 43accc4862e0a88710411b205fdaf833dadf9951
      
https://github.com/qemu/qemu/commit/43accc4862e0a88710411b205fdaf833dadf9951
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-06-02 (Thu, 02 Jun 2022)

  Changed paths:
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: Implement TRAPV

Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220602013401.303699-13-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>


  Commit: cc1cc264b14c75c4f3ddd8e33c9dd6f1e497bfdf
      
https://github.com/qemu/qemu/commit/cc1cc264b14c75c4f3ddd8e33c9dd6f1e497bfdf
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-06-02 (Thu, 02 Jun 2022)

  Changed paths:
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: Implement FTRAPcc

Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220602013401.303699-14-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>


  Commit: e105db022715d0a418dbda843fe19eefeb272380
      
https://github.com/qemu/qemu/commit/e105db022715d0a418dbda843fe19eefeb272380
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-06-02 (Thu, 02 Jun 2022)

  Changed paths:
    M tests/tcg/m68k/Makefile.target
    A tests/tcg/m68k/trap.c

  Log Message:
  -----------
  tests/tcg/m68k: Add trap.c

Test various trap instructions: chk, div, trap, trapv, trapcc, ftrapcc,
and the signals and addresses that we expect from them.

Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220602013401.303699-15-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>


  Commit: 7c75571c07def2ded9998a06ad171380a19f6063
      
https://github.com/qemu/qemu/commit/7c75571c07def2ded9998a06ad171380a19f6063
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-06-02 (Thu, 02 Jun 2022)

  Changed paths:
    M linux-user/strace.c

  Log Message:
  -----------
  linux-user/strace: Use is_error in print_syscall_err

Errors are not all negative numbers: use is_error.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220602013401.303699-16-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>


  Commit: dc3e83d5b17ee896be0478d0231a6ed7f966e0e0
      
https://github.com/qemu/qemu/commit/dc3e83d5b17ee896be0478d0231a6ed7f966e0e0
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-06-02 (Thu, 02 Jun 2022)

  Changed paths:
    M linux-user/strace.list

  Log Message:
  -----------
  linux-user/strace: Adjust get_thread_area for m68k

Unlike i386, m68k get_thread_area has no arguments.

Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220602013401.303699-17-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>


  Commit: 36a0ab595f4e24b987e67faa52d4b174f67144b6
      
https://github.com/qemu/qemu/commit/36a0ab595f4e24b987e67faa52d4b174f67144b6
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-06-02 (Thu, 02 Jun 2022)

  Changed paths:
    M target/m68k/helper.h
    M target/m68k/op_helper.c

  Log Message:
  -----------
  target/m68k: Mark helper_raise_exception as noreturn

Also mark raise_exception_ra and raise_exception, lest we
generate a warning about helper_raise_exception returning.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220602013401.303699-18-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>


  Commit: 1e62a82574fc28e64deca589a23cf55ada2e1a7d
      
https://github.com/qemu/qemu/commit/1e62a82574fc28e64deca589a23cf55ada2e1a7d
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-06-02 (Thu, 02 Jun 2022)

  Changed paths:
    M linux-user/m68k/cpu_loop.c
    M linux-user/strace.c
    M linux-user/strace.list
    M target/m68k/cpu.c
    M target/m68k/cpu.h
    M target/m68k/helper.h
    M target/m68k/op_helper.c
    M target/m68k/translate.c
    M tests/tcg/m68k/Makefile.target
    A tests/tcg/m68k/trap.c

  Log Message:
  -----------
  Merge tag 'm68k-for-7.1-pull-request' of https://github.com/vivier/qemu-m68k 
into staging

m68k pull request 20220602

- Fixes and cleanup
- Implement TRAP opcodes
- Enable halt on 68060

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# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [undefined]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [undefined]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" 
[undefined]
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# gpg:          There is no indication that the signature belongs to the owner.
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* tag 'm68k-for-7.1-pull-request' of https://github.com/vivier/qemu-m68k:
  target/m68k: Mark helper_raise_exception as noreturn
  linux-user/strace: Adjust get_thread_area for m68k
  linux-user/strace: Use is_error in print_syscall_err
  tests/tcg/m68k: Add trap.c
  target/m68k: Implement FTRAPcc
  target/m68k: Implement TRAPV
  target/m68k: Implement TPF in terms of TRAPcc
  target/m68k: Implement TRAPcc
  target/m68k: Fix stack frame for EXCP_ILLEGAL
  target/m68k: Fix address argument for EXCP_TRACE
  target/m68k: Fix pc, c flag, and address argument for EXCP_DIV0
  target/m68k: Fix address argument for EXCP_CHK
  target/m68k: Remove retaddr in m68k_interrupt_all
  linux-user/m68k: Handle EXCP_TRAP1 through EXCP_TRAP15
  target/m68k: Fix coding style in m68k_interrupt_all
  target/m68k: Switch over exception type in m68k_interrupt_all
  target/m68k: Raise the TRAPn exception with the correct pc
  target/m68k: Enable halt insn for 68060
  target/m68k: Clear mach in m68k_cpu_disas_set_info

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Compare: https://github.com/qemu/qemu/compare/e2c2d575991c...1e62a82574fc



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