qemu-commits
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-commits] [qemu/qemu] f000bc: WHPX: fixed TPR/CR8 translation issue


From: Richard Henderson
Subject: [Qemu-commits] [qemu/qemu] f000bc: WHPX: fixed TPR/CR8 translation issues affecting V...
Date: Mon, 16 May 2022 16:30:19 -0700

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: f000bc74589247244943085b210cee32bac28c89
      
https://github.com/qemu/qemu/commit/f000bc74589247244943085b210cee32bac28c89
  Author: Ivan Shcherbakov <ivan@sysprogs.com>
  Date:   2022-05-14 (Sat, 14 May 2022)

  Changed paths:
    M target/i386/whpx/whpx-all.c

  Log Message:
  -----------
  WHPX: fixed TPR/CR8 translation issues affecting VM debugging

This patch fixes the following error that would occur when trying to resume
a WHPX-accelerated VM from a breakpoint:

    qemu: WHPX: Failed to set interrupt state registers, hr=c0350005

The error arises from an incorrect CR8 value being passed to
WHvSetVirtualProcessorRegisters() that doesn't match the
value set via WHvSetVirtualProcessorInterruptControllerState2().

Signed-off-by: Ivan Shcherbakov <ivan@sysprogs.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>


  Commit: 580ea136eb37b9a059bdba9c20260dc825bcc2de
      
https://github.com/qemu/qemu/commit/580ea136eb37b9a059bdba9c20260dc825bcc2de
  Author: Konstantin Kostiuk <kkostiuk@redhat.com>
  Date:   2022-05-14 (Sat, 14 May 2022)

  Changed paths:
    M qga/vss-win32/meson.build

  Log Message:
  -----------
  qga-vss: Add auto generated headers to dependencies

Signed-off-by: Konstantin Kostiuk <kkostiuk@redhat.com>
Message-Id: <20220512154906.331399-1-kkostiuk@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>


  Commit: 6c1d88c72bd740cc431a13a02145168cf87866fc
      
https://github.com/qemu/qemu/commit/6c1d88c72bd740cc431a13a02145168cf87866fc
  Author: Konstantin Kostiuk <kkostiuk@redhat.com>
  Date:   2022-05-14 (Sat, 14 May 2022)

  Changed paths:
    M qga/vss-win32/requester.cpp

  Log Message:
  -----------
  qga-vss: Use the proper operator to free memory

volume_name_wchar is allocated by 'void* operator new [](long long unsigned int)

Signed-off-by: Konstantin Kostiuk <kkostiuk@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20220512154909.331481-1-kkostiuk@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>


  Commit: 6df39f5e583ca0f67bd934d1327f9ead2e3bd49c
      
https://github.com/qemu/qemu/commit/6df39f5e583ca0f67bd934d1327f9ead2e3bd49c
  Author: Robert Hoo <robert.hu@linux.intel.com>
  Date:   2022-05-14 (Sat, 14 May 2022)

  Changed paths:
    M docs/about/deprecated.rst
    M docs/about/removed-features.rst
    M target/i386/cpu.c

  Log Message:
  -----------
  i386/cpu: Remove the deprecated cpu model 'Icelake-Client'

Icelake, is the codename for Intel 3rd generation Xeon Scalable server
processors. There isn't ever client variants. This "Icelake-Client" CPU
model was added wrongly and imaginarily.

It has been deprecated since v5.2, now it's time to remove it completely
from code.

Signed-off-by: Robert Hoo <robert.hu@linux.intel.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <1647247859-4947-1-git-send-email-robert.hu@linux.intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>


  Commit: 18c22d7112a76fabeee5022a3bdd9e8c3a37c8d2
      
https://github.com/qemu/qemu/commit/18c22d7112a76fabeee5022a3bdd9e8c3a37c8d2
  Author: Yang Weijiang <weijiang.yang@intel.com>
  Date:   2022-05-14 (Sat, 14 May 2022)

  Changed paths:
    M hw/core/qdev-properties.c
    M include/hw/qdev-properties.h

  Log Message:
  -----------
  qdev-properties: Add a new macro with bitmask check for uint64_t property

The DEFINE_PROP_UINT64_CHECKMASK maro applies certain mask check agaist
user-supplied property value, reject the value if it violates the bitmask.

Co-developed-by: Like Xu <like.xu@linux.intel.com>
Signed-off-by: Like Xu <like.xu@linux.intel.com>
Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
Message-Id: <20220215195258.29149-2-weijiang.yang@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>


  Commit: f06d8a18abc9d29d052f628eefd1d4a86c99fcea
      
https://github.com/qemu/qemu/commit/f06d8a18abc9d29d052f628eefd1d4a86c99fcea
  Author: Yang Weijiang <weijiang.yang@intel.com>
  Date:   2022-05-14 (Sat, 14 May 2022)

  Changed paths:
    M target/i386/cpu.c
    M target/i386/cpu.h

  Log Message:
  -----------
  target/i386: Add lbr-fmt vPMU option to support guest LBR

The Last Branch Recording (LBR) is a performance monitor unit (PMU)
feature on Intel processors which records a running trace of the most
recent branches taken by the processor in the LBR stack. This option
indicates the LBR format to enable for guest perf.

The LBR feature is enabled if below conditions are met:
1) KVM is enabled and the PMU is enabled.
2) msr-based-feature IA32_PERF_CAPABILITIES is supporterd on KVM.
3) Supported returned value for lbr_fmt from above msr is non-zero.
4) Guest vcpu model does support FEAT_1_ECX.CPUID_EXT_PDCM.
5) User-provided lbr-fmt value doesn't violate its bitmask (0x3f).
6) Target guest LBR format matches that of host.

Co-developed-by: Like Xu <like.xu@linux.intel.com>
Signed-off-by: Like Xu <like.xu@linux.intel.com>
Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
Message-Id: <20220215195258.29149-3-weijiang.yang@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>


  Commit: 5a778a5f820fdd907b95e93560637a61f6ea3c71
      
https://github.com/qemu/qemu/commit/5a778a5f820fdd907b95e93560637a61f6ea3c71
  Author: Yang Weijiang <weijiang.yang@intel.com>
  Date:   2022-05-14 (Sat, 14 May 2022)

  Changed paths:
    M target/i386/kvm/kvm.c

  Log Message:
  -----------
  target/i386: Add kvm_get_one_msr helper

When try to get one msr from KVM, I found there's no such kind of
existing interface while kvm_put_one_msr() is there. So here comes
the patch. It'll remove redundant preparation code before finally
call KVM_GET_MSRS IOCTL.

No functional change intended.

Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
Message-Id: <20220215195258.29149-4-weijiang.yang@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>


  Commit: 301e90675c3fed6cdc48682021a1ab42bc0e0d76
      
https://github.com/qemu/qemu/commit/301e90675c3fed6cdc48682021a1ab42bc0e0d76
  Author: Yang Weijiang <weijiang.yang@intel.com>
  Date:   2022-05-14 (Sat, 14 May 2022)

  Changed paths:
    M target/i386/cpu.c
    M target/i386/cpu.h

  Log Message:
  -----------
  target/i386: Enable support for XSAVES based features

There're some new features, including Arch LBR, depending
on XSAVES/XRSTORS support, the new instructions will
save/restore data based on feature bits enabled in XCR0 | XSS.
This patch adds the basic support for related CPUID enumeration
and meanwhile changes the name from FEAT_XSAVE_COMP_{LO|HI} to
FEAT_XSAVE_XCR0_{LO|HI} to differentiate clearly the feature
bits in XCR0 and those in XSS.

Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
Message-Id: <20220215195258.29149-5-weijiang.yang@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>


  Commit: 10f0abcb3b8a74a4db1412e844b9192dc9768e94
      
https://github.com/qemu/qemu/commit/10f0abcb3b8a74a4db1412e844b9192dc9768e94
  Author: Yang Weijiang <weijiang.yang@intel.com>
  Date:   2022-05-14 (Sat, 14 May 2022)

  Changed paths:
    M target/i386/cpu.c
    M target/i386/cpu.h

  Log Message:
  -----------
  target/i386: Add XSAVES support for Arch LBR

Define Arch LBR bit in XSS and save/restore structure
for XSAVE area size calculation.

Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
Message-Id: <20220215195258.29149-6-weijiang.yang@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>


  Commit: 12703d4e7523a7841764200e1a7838736495da10
      
https://github.com/qemu/qemu/commit/12703d4e7523a7841764200e1a7838736495da10
  Author: Yang Weijiang <weijiang.yang@intel.com>
  Date:   2022-05-14 (Sat, 14 May 2022)

  Changed paths:
    M target/i386/cpu.h
    M target/i386/kvm/kvm.c

  Log Message:
  -----------
  target/i386: Add MSR access interface for Arch LBR

In the first generation of Arch LBR, the max support
Arch LBR depth is 32, both host and guest use the value
to set depth MSR. This can simplify the implementation
of patch given the side-effect of mismatch of host/guest
depth MSR: XRSTORS will reset all recording MSRs to 0s
if the saved depth mismatches MSR_ARCH_LBR_DEPTH.

In most of the cases Arch LBR is not in active status,
so check the control bit before save/restore the big
chunck of Arch LBR MSRs.

Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
Message-Id: <20220215195258.29149-7-weijiang.yang@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>


  Commit: f2e7c2fc8945943699f745c405be82ac7e698275
      
https://github.com/qemu/qemu/commit/f2e7c2fc8945943699f745c405be82ac7e698275
  Author: Yang Weijiang <weijiang.yang@intel.com>
  Date:   2022-05-14 (Sat, 14 May 2022)

  Changed paths:
    M target/i386/machine.c

  Log Message:
  -----------
  target/i386: Enable Arch LBR migration states in vmstate

The Arch LBR record MSRs and control MSRs will be migrated
to destination guest if the vcpus were running with Arch
LBR active.

Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
Message-Id: <20220215195258.29149-8-weijiang.yang@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>


  Commit: d19d6ffa07100f5015dc1c708d6c811354a13d7f
      
https://github.com/qemu/qemu/commit/d19d6ffa07100f5015dc1c708d6c811354a13d7f
  Author: Paolo Bonzini <pbonzini@redhat.com>
  Date:   2022-05-14 (Sat, 14 May 2022)

  Changed paths:
    M target/i386/cpu.c

  Log Message:
  -----------
  target/i386: introduce helper to access supported CPUID

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>


  Commit: c3c67679f65903b7d1fe25da8fc4e163878ab2b9
      
https://github.com/qemu/qemu/commit/c3c67679f65903b7d1fe25da8fc4e163878ab2b9
  Author: Yang Weijiang <weijiang.yang@intel.com>
  Date:   2022-05-14 (Sat, 14 May 2022)

  Changed paths:
    M target/i386/cpu.c

  Log Message:
  -----------
  target/i386: Support Arch LBR in CPUID enumeration

If CPUID.(EAX=07H, ECX=0):EDX[19] is set to 1, the processor
supports Architectural LBRs. In this case, CPUID leaf 01CH
indicates details of the Architectural LBRs capabilities.
XSAVE support for Architectural LBRs is enumerated in
CPUID.(EAX=0DH, ECX=0FH).

Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
Message-Id: <20220215195258.29149-9-weijiang.yang@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>


  Commit: 0310641c06dd5f7ea031b2b6170cb2edc63e4cea
      
https://github.com/qemu/qemu/commit/0310641c06dd5f7ea031b2b6170cb2edc63e4cea
  Author: Paolo Bonzini <pbonzini@redhat.com>
  Date:   2022-05-14 (Sat, 14 May 2022)

  Changed paths:
    M crypto/secret_common.c
    M crypto/tlscredsanon.c
    M crypto/tlscredspsk.c
    M crypto/tlscredsx509.c
    M docs/about/deprecated.rst
    M docs/about/removed-features.rst

  Log Message:
  -----------
  crypto: make loaded property read-only

The ``loaded=on`` option in the command line or QMP ``object-add`` either had
no effect (if ``loaded`` was the last option) or caused options to be
effectively ignored as if they were not given.  The property is therefore
useless and was deprecated in 6.0; make it read-only now.

The patch is best reviewed with "-b".

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>


  Commit: 6e577937485080f2dcebc6a3e5a4a9e8db841762
      
https://github.com/qemu/qemu/commit/6e577937485080f2dcebc6a3e5a4a9e8db841762
  Author: Paolo Bonzini <pbonzini@redhat.com>
  Date:   2022-05-14 (Sat, 14 May 2022)

  Changed paths:
    M backends/rng.c
    M docs/about/deprecated.rst
    M docs/about/removed-features.rst

  Log Message:
  -----------
  rng: make opened property read-only

The ``opened=on`` option in the command line or QMP ``object-add`` either had
no effect (if ``opened`` was the last option) or caused errors.  The property
is therefore useless and was deprecated in 6.0; make it read-only now.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>


  Commit: 9c50b8aae2b411b253edaee77d76d297e5fa2fab
      
https://github.com/qemu/qemu/commit/9c50b8aae2b411b253edaee77d76d297e5fa2fab
  Author: Paolo Bonzini <pbonzini@redhat.com>
  Date:   2022-05-14 (Sat, 14 May 2022)

  Changed paths:
    M hw/audio/soundhw.c

  Log Message:
  -----------
  soundhw: remove ability to create multiple soundcards

The usefulness of enabling a dozen soundcards is dubious.  Simplify the
code by allowing a single instance of -soundhw, with no support for
parsing either comma-separated values or 'soundhw all'.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>


  Commit: eef5fdf3d57dccc25505179f717adf636764ba02
      
https://github.com/qemu/qemu/commit/eef5fdf3d57dccc25505179f717adf636764ba02
  Author: Paolo Bonzini <pbonzini@redhat.com>
  Date:   2022-05-14 (Sat, 14 May 2022)

  Changed paths:
    M hw/audio/soundhw.c
    M include/hw/audio/soundhw.h

  Log Message:
  -----------
  soundhw: extract soundhw help to a separate function

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>


  Commit: bf521c5655f7f821603d921e6de77e4e05fa44b9
      
https://github.com/qemu/qemu/commit/bf521c5655f7f821603d921e6de77e4e05fa44b9
  Author: Paolo Bonzini <pbonzini@redhat.com>
  Date:   2022-05-14 (Sat, 14 May 2022)

  Changed paths:
    M hw/audio/soundhw.c

  Log Message:
  -----------
  soundhw: unify initialization for ISA and PCI soundhw

Use qdev_new instead of distinguishing isa_create_simple/pci_create_simple.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>


  Commit: 67aaa96ae451913ffd25766dc59341fe6b63619d
      
https://github.com/qemu/qemu/commit/67aaa96ae451913ffd25766dc59341fe6b63619d
  Author: Paolo Bonzini <pbonzini@redhat.com>
  Date:   2022-05-14 (Sat, 14 May 2022)

  Changed paths:
    M hw/audio/soundhw.c
    M softmmu/vl.c

  Log Message:
  -----------
  soundhw: move help handling to vl.c

This will allow processing "-audio model=help" even if the backend
part of the option is missing.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>


  Commit: 039a68373c4544ff94871f945a733928b6dcfe93
      
https://github.com/qemu/qemu/commit/039a68373c4544ff94871f945a733928b6dcfe93
  Author: Paolo Bonzini <pbonzini@redhat.com>
  Date:   2022-05-14 (Sat, 14 May 2022)

  Changed paths:
    M audio/audio.c
    M audio/audio.h
    M docs/about/deprecated.rst
    M docs/about/removed-features.rst
    M hw/audio/intel-hda.c
    M hw/audio/soundhw.c
    M include/hw/audio/soundhw.h
    M qemu-options.hx
    M softmmu/vl.c

  Log Message:
  -----------
  introduce -audio as a replacement for -soundhw

-audio is used like "-audio pa,model=sb16".  It is almost as simple as
-soundhw, but it reuses the -audiodev parsing machinery and attaches an
audiodev to the newly-created device.  The main 'feature' is that
it knows about adding the codec device for model=intel-hda, and adding
the audiodev to the codec device.

In the future, it could be extended to support default models or
builtin devices, just like -nic, or even a default backend.  For now,
keep it simple.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>


  Commit: 40b3ea76425435ee18395d619e4b3f8f652e25b0
      
https://github.com/qemu/qemu/commit/40b3ea76425435ee18395d619e4b3f8f652e25b0
  Author: Paolo Bonzini <pbonzini@redhat.com>
  Date:   2022-05-14 (Sat, 14 May 2022)

  Changed paths:
    M Makefile

  Log Message:
  -----------
  build: remove useless dependency

qemu-plugins.symbols is now processed in Meson.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>


  Commit: 008f6f20a544cbffe6152aacb69b2774978b49e0
      
https://github.com/qemu/qemu/commit/008f6f20a544cbffe6152aacb69b2774978b49e0
  Author: Paolo Bonzini <pbonzini@redhat.com>
  Date:   2022-05-14 (Sat, 14 May 2022)

  Changed paths:
    M configure

  Log Message:
  -----------
  configure: remove another dead variable

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>


  Commit: 8eccdb9eb84615291faef1257d5779ebfef7a0d0
      
https://github.com/qemu/qemu/commit/8eccdb9eb84615291faef1257d5779ebfef7a0d0
  Author: Paolo Bonzini <pbonzini@redhat.com>
  Date:   2022-05-14 (Sat, 14 May 2022)

  Changed paths:
    M configure

  Log Message:
  -----------
  configure: remove duplicate help messages

These messages are already emitted by scripts/meson-parse-buildoptions.sh.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>


  Commit: afdb415e67e13e8726edc21238c9883447b2c704
      
https://github.com/qemu/qemu/commit/afdb415e67e13e8726edc21238c9883447b2c704
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-05-16 (Mon, 16 May 2022)

  Changed paths:
    M Makefile
    M audio/audio.c
    M audio/audio.h
    M backends/rng.c
    M configure
    M crypto/secret_common.c
    M crypto/tlscredsanon.c
    M crypto/tlscredspsk.c
    M crypto/tlscredsx509.c
    M docs/about/deprecated.rst
    M docs/about/removed-features.rst
    M hw/audio/intel-hda.c
    M hw/audio/soundhw.c
    M hw/core/qdev-properties.c
    M include/hw/audio/soundhw.h
    M include/hw/qdev-properties.h
    M qemu-options.hx
    M qga/vss-win32/meson.build
    M qga/vss-win32/requester.cpp
    M softmmu/vl.c
    M target/i386/cpu.c
    M target/i386/cpu.h
    M target/i386/kvm/kvm.c
    M target/i386/machine.c
    M target/i386/whpx/whpx-all.c

  Log Message:
  -----------
  Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* fix WHPX debugging
* misc qga-vss fixes
* remove the deprecated CPU model 'Icelake-Client'
* support for x86 architectural LBR
* remove deprecated properties
* replace deprecated -soundhw with -audio

# -----BEGIN PGP SIGNATURE-----
#
# iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmJ/hZ4UHHBib256aW5p
# QHJlZGhhdC5jb20ACgkQv/vSX3jHroN2Igf/bFs+yluOikt0eFNmXYnshrGBWPXr
# oam0iumPox34vTzZnjpSjF6tJGxHWOgi+wbgIvbwOYHA/ONxx8akW580j+1VhEWa
# X29VyUzjZBffgFtmlF4fM74/ELYm7s4c1a1/D9TpVP6Dr0fSWbMujbx4dfeVstvf
# sONN+A8sVxaNdV9QKPE6BvqfMlPLoCiigrOetf6iY1KuUtkQDF8xDB0MdzdutqAQ
# szAtQ0rrzjxDx9EuGN1SECFM1/riDUbtOOoA9g2C7gGKrx3/iUc6pzrkIcAfWLFK
# xXbH7+6Wynia0cbUxnrvRdY4daMIxm4N3wUvN7szXgF9kxYxeQcsdgGsNA==
# =n4lu
# -----END PGP SIGNATURE-----
# gpg: Signature made Sat 14 May 2022 03:34:06 AM PDT
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [undefined]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (23 commits)
  configure: remove duplicate help messages
  configure: remove another dead variable
  build: remove useless dependency
  introduce -audio as a replacement for -soundhw
  soundhw: move help handling to vl.c
  soundhw: unify initialization for ISA and PCI soundhw
  soundhw: extract soundhw help to a separate function
  soundhw: remove ability to create multiple soundcards
  rng: make opened property read-only
  crypto: make loaded property read-only
  target/i386: Support Arch LBR in CPUID enumeration
  target/i386: introduce helper to access supported CPUID
  target/i386: Enable Arch LBR migration states in vmstate
  target/i386: Add MSR access interface for Arch LBR
  target/i386: Add XSAVES support for Arch LBR
  target/i386: Enable support for XSAVES based features
  target/i386: Add kvm_get_one_msr helper
  target/i386: Add lbr-fmt vPMU option to support guest LBR
  qdev-properties: Add a new macro with bitmask check for uint64_t property
  i386/cpu: Remove the deprecated cpu model 'Icelake-Client'
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Compare: https://github.com/qemu/qemu/compare/54b592c427ca...afdb415e67e1



reply via email to

[Prev in Thread] Current Thread [Next in Thread]