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[Qemu-commits] [qemu/qemu] cda86e: target/arm: Enable SCTLR_EL1.BT0 for
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From: |
Richard Henderson |
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Subject: |
[Qemu-commits] [qemu/qemu] cda86e: target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux... |
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Date: |
Thu, 05 May 2022 10:54:10 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: cda86e2b46de857e8b6e16ecd13bb85d81e07899
https://github.com/qemu/qemu/commit/cda86e2b46de857e8b6e16ecd13bb85d81e07899
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-05-05 (Thu, 05 May 2022)
Changed paths:
M target/arm/cpu.c
M tests/tcg/aarch64/Makefile.target
A tests/tcg/aarch64/bti-3.c
Log Message:
-----------
target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user
This controls whether the PACI{A,B}SP instructions trap with BTYPE=3
(indirect branch from register other than x16/x17). The linux kernel
sets this in bti_enable().
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/998
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220427042312.294300-1-richard.henderson@linaro.org
[PMM: remove stray change to makefile comment]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: cf7c6d1004eaaae85fd6156556e2f38ff493ef48
https://github.com/qemu/qemu/commit/cf7c6d1004eaaae85fd6156556e2f38ff493ef48
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-05-05 (Thu, 05 May 2022)
Changed paths:
M hw/arm/pxa2xx.c
M hw/arm/pxa2xx_pic.c
M hw/intc/arm_gicv3_cpuif.c
M hw/intc/arm_gicv3_kvm.c
A target/arm/cpregs.h
M target/arm/cpu.c
M target/arm/cpu.h
M target/arm/cpu64.c
M target/arm/cpu_tcg.c
M target/arm/gdbstub.c
M target/arm/helper.c
M target/arm/op_helper.c
M target/arm/translate-a64.c
M target/arm/translate.c
Log Message:
-----------
target/arm: Split out cpregs.h
Move ARMCPRegInfo and all related declarations to a new
internal header, out of the public cpu.h.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220501055028.646596-2-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 330477eae9416828c098513f36bd2f33f5f270fe
https://github.com/qemu/qemu/commit/330477eae9416828c098513f36bd2f33f5f270fe
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-05-05 (Thu, 05 May 2022)
Changed paths:
M target/arm/cpregs.h
M target/arm/op_helper.c
Log Message:
-----------
target/arm: Reorg CPAccessResult and access_check_cp_reg
Rearrange the values of the enumerators of CPAccessResult
so that we may directly extract the target el. For the two
special cases in access_check_cp_reg, use CPAccessResult.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220501055028.646596-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 5809ac5709645b341eaca979715a32ced2e4d432
https://github.com/qemu/qemu/commit/5809ac5709645b341eaca979715a32ced2e4d432
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-05-05 (Thu, 05 May 2022)
Changed paths:
M hw/arm/pxa2xx.c
M hw/arm/pxa2xx_pic.c
M hw/intc/arm_gicv3_cpuif.c
M hw/intc/arm_gicv3_kvm.c
M target/arm/cpregs.h
M target/arm/cpu64.c
M target/arm/cpu_tcg.c
M target/arm/helper.c
Log Message:
-----------
target/arm: Replace sentinels with ARRAY_SIZE in cpregs.h
Remove a possible source of error by removing REGINFO_SENTINEL
and using ARRAY_SIZE (convinently hidden inside a macro) to
find the end of the set of regs being registered or modified.
The space saved by not having the extra array element reduces
the executable's .data.rel.ro section by about 9k.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220501055028.646596-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 10b0220e45a93410206c270b0642870e20e69d09
https://github.com/qemu/qemu/commit/10b0220e45a93410206c270b0642870e20e69d09
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-05-05 (Thu, 05 May 2022)
Changed paths:
M target/arm/helper.c
Log Message:
-----------
target/arm: Make some more cpreg data static const
These particular data structures are not modified at runtime.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220501055028.646596-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 87c3f0f2f791094adce2b8643d9103dac1b59702
https://github.com/qemu/qemu/commit/87c3f0f2f791094adce2b8643d9103dac1b59702
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-05-05 (Thu, 05 May 2022)
Changed paths:
M target/arm/cpregs.h
M target/arm/cpu.c
M target/arm/helper.c
M target/arm/translate-a64.c
M target/arm/translate.c
Log Message:
-----------
target/arm: Reorg ARMCPRegInfo type field bits
Instead of defining ARM_CP_FLAG_MASK to remove flags,
define ARM_CP_SPECIAL_MASK to isolate special cases.
Sort the specials to the low bits. Use an enum.
Split the large comment block so as to document each
value separately.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220501055028.646596-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: d385a60571487d9409f247d07aac94d1ee40f9fe
https://github.com/qemu/qemu/commit/d385a60571487d9409f247d07aac94d1ee40f9fe
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-05-05 (Thu, 05 May 2022)
Changed paths:
M target/arm/helper.c
M target/arm/hvf/hvf.c
M target/arm/kvm-stub.c
M target/arm/kvm.c
M target/arm/machine.c
M target/arm/translate-a64.c
M target/arm/translate-neon.c
M target/arm/translate.c
Log Message:
-----------
target/arm: Avoid bare abort() or assert(0)
Standardize on g_assert_not_reached() for "should not happen".
Retain abort() when preceeded by fprintf or error_report.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220501055028.646596-7-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 39107337181e0cfcbd92e67d10dce3acd5a13f0a
https://github.com/qemu/qemu/commit/39107337181e0cfcbd92e67d10dce3acd5a13f0a
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-05-05 (Thu, 05 May 2022)
Changed paths:
M target/arm/cpregs.h
M target/arm/helper.c
Log Message:
-----------
target/arm: Change cpreg access permissions to enum
Create a typedef as well, and use it in ARMCPRegInfo.
This won't be perfect for debugging, but it'll nicely
display the most common cases.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220501055028.646596-8-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: d95101d6026641e9116225b5a22bbe6c4621828d
https://github.com/qemu/qemu/commit/d95101d6026641e9116225b5a22bbe6c4621828d
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-05-05 (Thu, 05 May 2022)
Changed paths:
M target/arm/cpregs.h
M target/arm/helper.c
Log Message:
-----------
target/arm: Name CPState type
Give this enum a name and use in ARMCPRegInfo,
add_cpreg_to_hashtable and define_one_arm_cp_reg_with_opaque.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220501055028.646596-9-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: cbe645856fb17ca0f2395fa4a75d80bdd0421614
https://github.com/qemu/qemu/commit/cbe645856fb17ca0f2395fa4a75d80bdd0421614
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-05-05 (Thu, 05 May 2022)
Changed paths:
M target/arm/cpregs.h
M target/arm/helper.c
Log Message:
-----------
target/arm: Name CPSecureState type
Give this enum a name and use in ARMCPRegInfo and add_cpreg_to_hashtable.
Add the enumerator ARM_CP_SECSTATE_BOTH to clarify how 0
is handled in define_one_arm_cp_reg_with_opaque.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220501055028.646596-10-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 9da35a40fda3b577e7251d39f1b4aad42348cc08
https://github.com/qemu/qemu/commit/9da35a40fda3b577e7251d39f1b4aad42348cc08
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-05-05 (Thu, 05 May 2022)
Changed paths:
M target/arm/helper.c
Log Message:
-----------
target/arm: Drop always-true test in define_arm_vh_e2h_redirects_aliases
The new_key field is always non-zero -- drop the if.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220501055028.646596-11-richard.henderson@linaro.org
[PMM: reinstated dropped PL3_RW mask]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 5860362d25f3afa99364d60295c09147a07055f1
https://github.com/qemu/qemu/commit/5860362d25f3afa99364d60295c09147a07055f1
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-05-05 (Thu, 05 May 2022)
Changed paths:
M target/arm/cpu.c
M target/arm/gdbstub.c
M target/arm/helper.c
Log Message:
-----------
target/arm: Store cpregs key in the hash table directly
Cast the uint32_t key into a gpointer directly, which
allows us to avoid allocating storage for each key.
Use g_hash_table_lookup when we already have a gpointer
(e.g. for callbacks like count_cpreg), or when using
get_arm_cp_reginfo would require casting away const.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220501055028.646596-12-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: c27f5d3a83ed2959a6a1947708b588a6774a2aec
https://github.com/qemu/qemu/commit/c27f5d3a83ed2959a6a1947708b588a6774a2aec
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-05-05 (Thu, 05 May 2022)
Changed paths:
M target/arm/cpu.c
M target/arm/helper.c
Log Message:
-----------
target/arm: Merge allocation of the cpreg and its name
Simplify freeing cp_regs hash table entries by using a single
allocation for the entire value.
This fixes a theoretical bug if we were to ever free the entire
hash table, because we've been installing string literal constants
into the cpreg structure in define_arm_vh_e2h_redirects_aliases.
However, at present we only free entries created for AArch32
wildcard cpregs which get overwritten by more specific cpregs,
so this bug is never exposed.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220501055028.646596-13-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: cac65299a403b34e57a2230c2b695bdb6d84f396
https://github.com/qemu/qemu/commit/cac65299a403b34e57a2230c2b695bdb6d84f396
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-05-05 (Thu, 05 May 2022)
Changed paths:
M target/arm/helper.c
Log Message:
-----------
target/arm: Hoist computation of key in add_cpreg_to_hashtable
Move the computation of key to the top of the function.
Hoist the resolution of cp as well, as an input to the
computation of key.
This will be required by a subsequent patch.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220501055028.646596-14-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: cc946d96694e47d30c59dbf20f79f53522cc8265
https://github.com/qemu/qemu/commit/cc946d96694e47d30c59dbf20f79f53522cc8265
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-05-05 (Thu, 05 May 2022)
Changed paths:
M target/arm/helper.c
Log Message:
-----------
target/arm: Consolidate cpreg updates in add_cpreg_to_hashtable
Put most of the value writeback to the same place,
and improve the comment that goes with them.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220501055028.646596-15-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 4c8c4541156c957498183f1ce1d5f3d97e3576c2
https://github.com/qemu/qemu/commit/4c8c4541156c957498183f1ce1d5f3d97e3576c2
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-05-05 (Thu, 05 May 2022)
Changed paths:
M target/arm/helper.c
Log Message:
-----------
target/arm: Use bool for is64 and ns in add_cpreg_to_hashtable
Bool is a more appropriate type for these variables.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220501055028.646596-16-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 10748a965279aaaccf98ddeb253653421735e916
https://github.com/qemu/qemu/commit/10748a965279aaaccf98ddeb253653421735e916
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-05-05 (Thu, 05 May 2022)
Changed paths:
M target/arm/helper.c
Log Message:
-----------
target/arm: Hoist isbanked computation in add_cpreg_to_hashtable
Computing isbanked only once makes the code
a bit easier to read.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220501055028.646596-17-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: dc44545b0df696fd89e7a9634094cbf33ae9006c
https://github.com/qemu/qemu/commit/dc44545b0df696fd89e7a9634094cbf33ae9006c
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-05-05 (Thu, 05 May 2022)
Changed paths:
M target/arm/helper.c
Log Message:
-----------
target/arm: Perform override check early in add_cpreg_to_hashtable
Perform the override check early, so that it is still done
even when we decide to discard an unreachable cpreg.
Use assert not printf+abort.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220501055028.646596-18-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 1859f8c35abd06de15e58f0996ae11ae366f50d8
https://github.com/qemu/qemu/commit/1859f8c35abd06de15e58f0996ae11ae366f50d8
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-05-05 (Thu, 05 May 2022)
Changed paths:
M target/arm/helper.c
Log Message:
-----------
target/arm: Reformat comments in add_cpreg_to_hashtable
Put the block comments into the current coding style.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220501055028.646596-19-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 7d00b4d8d382558f61a168180be6230cda0905d6
https://github.com/qemu/qemu/commit/7d00b4d8d382558f61a168180be6230cda0905d6
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-05-05 (Thu, 05 May 2022)
Changed paths:
M target/arm/helper.c
Log Message:
-----------
target/arm: Remove HOST_BIG_ENDIAN ifdef in add_cpreg_to_hashtable
Since e03b56863d2bc, our host endian indicator is unconditionally
set, which means that we can use a normal C condition.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220501055028.646596-20-richard.henderson@linaro.org
[PMM: quote correct git hash in commit message]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: ca56aac59f6ca936b60f7f6bea5ab54e3f70e379
https://github.com/qemu/qemu/commit/ca56aac59f6ca936b60f7f6bea5ab54e3f70e379
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-05-05 (Thu, 05 May 2022)
Changed paths:
M target/arm/cpu.h
Log Message:
-----------
target/arm: Add isar predicates for FEAT_Debugv8p2
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220501055028.646596-24-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 25e168ab70627bf3368944cf5b1d97490c853007
https://github.com/qemu/qemu/commit/25e168ab70627bf3368944cf5b1d97490c853007
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-05-05 (Thu, 05 May 2022)
Changed paths:
M target/arm/cpu.h
Log Message:
-----------
target/arm: Add isar_feature_{aa64,any}_ras
Add the aa64 predicate for detecting RAS support from id registers.
We already have the aa32 version from the M-profile work.
Add the 'any' predicate for testing both aa64 and aa32.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220501055028.646596-34-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 99a50d1a67c602126fc2b3a4812d3000eba9bf34
https://github.com/qemu/qemu/commit/99a50d1a67c602126fc2b3a4812d3000eba9bf34
Author: Alex Zuepke <alex.zuepke@tum.de>
Date: 2022-05-05 (Thu, 05 May 2022)
Changed paths:
M target/arm/helper.c
Log Message:
-----------
target/arm: read access to performance counters from EL0
The ARMv8 manual defines that PMUSERENR_EL0.ER enables read-access
to both PMXEVCNTR_EL0 and PMEVCNTR<n>_EL0 registers, however,
we only use it for PMXEVCNTR_EL0. Extend to PMEVCNTR<n>_EL0 as well.
Signed-off-by: Alex Zuepke <alex.zuepke@tum.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220428132717.84190-1-alex.zuepke@tum.de
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: e91b8994115d2f093e7556c9af2d051a26a98cfb
https://github.com/qemu/qemu/commit/e91b8994115d2f093e7556c9af2d051a26a98cfb
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-05-05 (Thu, 05 May 2022)
Changed paths:
M hw/arm/pxa2xx.c
M hw/arm/pxa2xx_pic.c
M hw/intc/arm_gicv3_cpuif.c
M hw/intc/arm_gicv3_kvm.c
A target/arm/cpregs.h
M target/arm/cpu.c
M target/arm/cpu.h
M target/arm/cpu64.c
M target/arm/cpu_tcg.c
M target/arm/gdbstub.c
M target/arm/helper.c
M target/arm/hvf/hvf.c
M target/arm/kvm-stub.c
M target/arm/kvm.c
M target/arm/machine.c
M target/arm/op_helper.c
M target/arm/translate-a64.c
M target/arm/translate-neon.c
M target/arm/translate.c
M tests/tcg/aarch64/Makefile.target
A tests/tcg/aarch64/bti-3.c
Log Message:
-----------
Merge tag 'pull-target-arm-20220505' of
https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue:
* Enable read access to performance counters from EL0
* Enable SCTLR_EL1.BT0 for aarch64-linux-user
* Refactoring of cpreg handling
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# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 05 May 2022 04:10:46 AM CDT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
[full]
* tag 'pull-target-arm-20220505' of
https://git.linaro.org/people/pmaydell/qemu-arm: (23 commits)
target/arm: read access to performance counters from EL0
target/arm: Add isar_feature_{aa64,any}_ras
target/arm: Add isar predicates for FEAT_Debugv8p2
target/arm: Remove HOST_BIG_ENDIAN ifdef in add_cpreg_to_hashtable
target/arm: Reformat comments in add_cpreg_to_hashtable
target/arm: Perform override check early in add_cpreg_to_hashtable
target/arm: Hoist isbanked computation in add_cpreg_to_hashtable
target/arm: Use bool for is64 and ns in add_cpreg_to_hashtable
target/arm: Consolidate cpreg updates in add_cpreg_to_hashtable
target/arm: Hoist computation of key in add_cpreg_to_hashtable
target/arm: Merge allocation of the cpreg and its name
target/arm: Store cpregs key in the hash table directly
target/arm: Drop always-true test in define_arm_vh_e2h_redirects_aliases
target/arm: Name CPSecureState type
target/arm: Name CPState type
target/arm: Change cpreg access permissions to enum
target/arm: Avoid bare abort() or assert(0)
target/arm: Reorg ARMCPRegInfo type field bits
target/arm: Make some more cpreg data static const
target/arm: Replace sentinels with ARRAY_SIZE in cpregs.h
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Compare: https://github.com/qemu/qemu/compare/5d5104260222...e91b8994115d