[Qemu-commits] [qemu/qemu] 35be15: target/arm: Use tcg_constant in gen

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[Qemu-commits] [qemu/qemu] 35be15: target/arm: Use tcg_constant in gen_p

From:	Richard Henderson
Subject:	[Qemu-commits] [qemu/qemu] 35be15: target/arm: Use tcg_constant in gen_probe_access
Date:	Thu, 28 Apr 2022 08:39:45 -0700
  Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: 35be15069dc1c26e58597592fb84e4af28092de9
      
https://github.com/qemu/qemu/commit/35be15069dc1c26e58597592fb84e4af28092de9
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in gen_probe_access

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-2-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 82d08e901ffe7d02593580bf782b8ec7422cd365
      
https://github.com/qemu/qemu/commit/82d08e901ffe7d02593580bf782b8ec7422cd365
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in gen_mte_check*

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: dd935b06979e9aed9e58bc3765911487dcacccae
      
https://github.com/qemu/qemu/commit/dd935b06979e9aed9e58bc3765911487dcacccae
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in gen_exception*

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: bc9eb3a367b39614d0c287a7e7342970faa3a567
      
https://github.com/qemu/qemu/commit/bc9eb3a367b39614d0c287a7e7342970faa3a567
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in gen_adc_CC

Note that tmp was doing double-duty as zero
and then later as a temporary in its own right.
Split the use of 0 to a new variable 'zero'.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 181115d906bf31cf3db724a4cd45e63c4146a23f
      
https://github.com/qemu/qemu/commit/181115d906bf31cf3db724a4cd45e63c4146a23f
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in handle_msr_i

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: d7eeaa095671fc14415c59ae442266b6db4dfcf9
      
https://github.com/qemu/qemu/commit/d7eeaa095671fc14415c59ae442266b6db4dfcf9
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in handle_sys

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-7-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 820b357a49507f943287a8019e891f527db6f729
      
https://github.com/qemu/qemu/commit/820b357a49507f943287a8019e891f527db6f729
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in disas_exc

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-8-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: c433065c4559ec3d4d0f725809d3e461b6116ae1
      
https://github.com/qemu/qemu/commit/c433065c4559ec3d4d0f725809d3e461b6116ae1
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in gen_compare_and_swap_pair

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-9-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: d43c8232bd7f81514d3acceace40a46a6d57a46d
      
https://github.com/qemu/qemu/commit/d43c8232bd7f81514d3acceace40a46a6d57a46d
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in disas_ld_lit

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-10-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 182320a7a5de19c3e1a1d76c8f5d4ac1849c6c71
      
https://github.com/qemu/qemu/commit/182320a7a5de19c3e1a1d76c8f5d4ac1849c6c71
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in disas_ldst_*

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-11-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 2e9917194d0711b19f276c2e9091503c7beb11e2
      
https://github.com/qemu/qemu/commit/2e9917194d0711b19f276c2e9091503c7beb11e2
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in disas_add_sum_imm*

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-12-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 12f1d809e6c0c6ef2466a2629d71e68549dd545e
      
https://github.com/qemu/qemu/commit/12f1d809e6c0c6ef2466a2629d71e68549dd545e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in disas_movw_imm

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-13-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 858943f0e27f73eb9c7485f3c241941d19e960f4
      
https://github.com/qemu/qemu/commit/858943f0e27f73eb9c7485f3c241941d19e960f4
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in shift_reg_imm

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-14-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: a8b05af13325485bb17f47100c7de6993f8a3771
      
https://github.com/qemu/qemu/commit/a8b05af13325485bb17f47100c7de6993f8a3771
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in disas_cond_select

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-15-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 728963ea97b65ccf19247f5d55968d4a65ddcd05
      
https://github.com/qemu/qemu/commit/728963ea97b65ccf19247f5d55968d4a65ddcd05
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in handle_{rev16,crc32}

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-16-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 4cb05eb74c9137911aaac47e56ee62c6e3bc7991
      
https://github.com/qemu/qemu/commit/4cb05eb74c9137911aaac47e56ee62c6e3bc7991
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in disas_data_proc_2src

Existing temp usage treats t1 as both zero and as a
temporary.  Rearrange to only require one temporary,
so remove t1 and rename t2.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-17-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: e45b2013489a46ec48d851f46bc27c6483f06bc9
      
https://github.com/qemu/qemu/commit/e45b2013489a46ec48d851f46bc27c6483f06bc9
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in disas_fp*

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-18-richard.henderson@linaro.org
[PMM: Restore incorrectly removed free of t_false in disas_fp_csel()]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 39228a1787a2cba89bd0fc82a0fd683b8188fc96
      
https://github.com/qemu/qemu/commit/39228a1787a2cba89bd0fc82a0fd683b8188fc96
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in simd shift expanders

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-19-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: d26fc8643ef40a0e3a63d178e5edace8ca9432c8
      
https://github.com/qemu/qemu/commit/d26fc8643ef40a0e3a63d178e5edace8ca9432c8
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in simd fp/int conversion

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-20-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 90e2d33ff9c7bf0e335892cf9790ef3c00a0dc89
      
https://github.com/qemu/qemu/commit/90e2d33ff9c7bf0e335892cf9790ef3c00a0dc89
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in 2misc expanders

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-21-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: abf68195978ee3936a3c421a6fa68d56fcfc5eb0
      
https://github.com/qemu/qemu/commit/abf68195978ee3936a3c421a6fa68d56fcfc5eb0
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in balance of translate-a64.c

Finish conversion of the file to tcg_constant_*.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-22-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 3dd066142ca81345468c9923e1bdd4fdda9bc50e
      
https://github.com/qemu/qemu/commit/3dd066142ca81345468c9923e1bdd4fdda9bc50e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate.c

  Log Message:
  -----------
  target/arm: Use tcg_constant for aa32 exceptions

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-23-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: c49a6f0d5247e00dfd3ee1f561c608c51b023788
      
https://github.com/qemu/qemu/commit/c49a6f0d5247e00dfd3ee1f561c608c51b023788
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate.c

  Log Message:
  -----------
  target/arm: Use tcg_constant for disas_iwmmxt_insn

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-24-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 1a8598e03883d6eb6fae0e8e93b4748cfca5403d
      
https://github.com/qemu/qemu/commit/1a8598e03883d6eb6fae0e8e93b4748cfca5403d
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate.c

  Log Message:
  -----------
  target/arm: Use tcg_constant for gen_{msr,mrs}

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-25-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: f5fd5f64b474b6765540f4ec894e89e4e8365096
      
https://github.com/qemu/qemu/commit/f5fd5f64b474b6765540f4ec894e89e4e8365096
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate.c

  Log Message:
  -----------
  target/arm: Use tcg_constant for vector shift expanders

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-26-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: dfbbf5e1f94341989f85f34c009df5ee7a511e30
      
https://github.com/qemu/qemu/commit/dfbbf5e1f94341989f85f34c009df5ee7a511e30
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate.c

  Log Message:
  -----------
  target/arm: Use tcg_constant for do_coproc_insn

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-27-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: cca80462598c93858d7b07136e8d163ce8278566
      
https://github.com/qemu/qemu/commit/cca80462598c93858d7b07136e8d163ce8278566
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate.c

  Log Message:
  -----------
  target/arm: Use tcg_constant for gen_srs

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-28-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: dfe36d24aa3b1ba92b6f798ea4d8c5ce75918276
      
https://github.com/qemu/qemu/commit/dfe36d24aa3b1ba92b6f798ea4d8c5ce75918276
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate.c

  Log Message:
  -----------
  target/arm: Use tcg_constant for op_s_{rri,rxi}_rot

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-29-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 302d3343dfbe3c2c5b293a801fae64e05cae3e48
      
https://github.com/qemu/qemu/commit/302d3343dfbe3c2c5b293a801fae64e05cae3e48
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate.c

  Log Message:
  -----------
  target/arm: Use tcg_constant for MOVW, UMAAL, CRC32

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-30-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 2f28a5b3acd04b2e26a0988f27a453454f51ab89
      
https://github.com/qemu/qemu/commit/2f28a5b3acd04b2e26a0988f27a453454f51ab89
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate.c

  Log Message:
  -----------
  target/arm: Use tcg_constant for v7m MRS, MSR

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-31-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 38ca784f7c2b11397ef012842e57fbc6b5b3dea5
      
https://github.com/qemu/qemu/commit/38ca784f7c2b11397ef012842e57fbc6b5b3dea5
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate.c

  Log Message:
  -----------
  target/arm: Use tcg_constant for TT, SAT, SMMLA

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-32-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 84d6f343641e9f599b814d13fed1bb0031d81a0e
      
https://github.com/qemu/qemu/commit/84d6f343641e9f599b814d13fed1bb0031d81a0e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in LDM, STM

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-33-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 7c5bc402fc38672fc747caf899965b244fa44b7d
      
https://github.com/qemu/qemu/commit/7c5bc402fc38672fc747caf899965b244fa44b7d
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in CLRM, DLS, WLS, LE

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-34-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 5b95562c50379ee7263fe60cc26ab05dce66ab49
      
https://github.com/qemu/qemu/commit/5b95562c50379ee7263fe60cc26ab05dce66ab49
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in trans_CPS_v7m

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-35-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 0b188ea05acb57b32604706a6f22d82121414ec9
      
https://github.com/qemu/qemu/commit/0b188ea05acb57b32604706a6f22d82121414ec9
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in trans_CSEL

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-36-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: b0c3aece6f7546a3b44cfce0c84d86106dc10849
      
https://github.com/qemu/qemu/commit/b0c3aece6f7546a3b44cfce0c84d86106dc10849
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-sve.c

  Log Message:
  -----------
  target/arm: Use tcg_constant for trans_INDEX_*

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-37-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: d681f1258b69917f6f6c413c47898bcca047e5f3
      
https://github.com/qemu/qemu/commit/d681f1258b69917f6f6c413c47898bcca047e5f3
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-sve.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in SINCDEC, INCDEC

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-38-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: e152b48b07e3fa765273196c739ae9f9278e5947
      
https://github.com/qemu/qemu/commit/e152b48b07e3fa765273196c739ae9f9278e5947
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-sve.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in FCPY, CPY

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-39-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 4b308bd5f72857375df79a99b837cc30a30b3966
      
https://github.com/qemu/qemu/commit/4b308bd5f72857375df79a99b837cc30a30b3966
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-sve.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in {incr, wrap}_last_active

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-40-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 053552d367e4333b07f4d7a99b232af7e77528d0
      
https://github.com/qemu/qemu/commit/053552d367e4333b07f4d7a99b232af7e77528d0
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-sve.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in do_clast_scalar

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-41-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 4481bbf25e4f232456970c0e54cf5ba9cf47d05c
      
https://github.com/qemu/qemu/commit/4481bbf25e4f232456970c0e54cf5ba9cf47d05c
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-sve.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in WHILE

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-42-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 2ccdf94fe7f1642def95daafb8a77585d7e9fb89
      
https://github.com/qemu/qemu/commit/2ccdf94fe7f1642def95daafb8a77585d7e9fb89
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-sve.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in LD1, ST1

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-43-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 9fff3fcc4c55ad4e757ed297bb0845bf6b8a6573
      
https://github.com/qemu/qemu/commit/9fff3fcc4c55ad4e757ed297bb0845bf6b8a6573
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-sve.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in SUBR

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-44-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 138a1f7b3f5fa93c8debc94bf06c8a8e5815cba9
      
https://github.com/qemu/qemu/commit/138a1f7b3f5fa93c8debc94bf06c8a8e5815cba9
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-sve.c

  Log Message:
  -----------
  target/arm: Use tcg_constant in do_zzi_{sat, ool}, do_fp_imm

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-45-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 392acacc1eccb05b0f3c98c75fd03e9a4c1aa884
      
https://github.com/qemu/qemu/commit/392acacc1eccb05b0f3c98c75fd03e9a4c1aa884
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-sve.c

  Log Message:
  -----------
  target/arm: Use tcg_constant for predicate descriptors

In these cases, 't' did double-duty as zero source and
temporary destination.  Split the two uses.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-46-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 93418f1ce98e2278881f4c47833a788ef07f4767
      
https://github.com/qemu/qemu/commit/93418f1ce98e2278881f4c47833a788ef07f4767
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-sve.c

  Log Message:
  -----------
  target/arm: Use tcg_constant for do_brk{2,3}

In these cases, 't' did double-duty as zero source and
temporary destination.  Split the two uses and narrow
the scope of the temp.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-47-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: c6a59b559b6c669e582057fe390809a76f86490a
      
https://github.com/qemu/qemu/commit/c6a59b559b6c669e582057fe390809a76f86490a
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/translate-sve.c

  Log Message:
  -----------
  target/arm: Use tcg_constant for vector descriptor

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-48-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: eb851c1151252158ab5b5917c5d386e1d69de3a2
      
https://github.com/qemu/qemu/commit/eb851c1151252158ab5b5917c5d386e1d69de3a2
  Author: Damien Hedde <damien.hedde@greensocs.com>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/cpu.c

  Log Message:
  -----------
  target/arm: Disable cryptographic instructions when neon is disabled

As of now, cryptographic instructions ISAR fields are never cleared so
we can end up with a cpu with cryptographic instructions but no
floating-point/neon instructions which is not a possible configuration
according to Arm specifications.

In QEMU, we have 3 kinds of cpus regarding cryptographic instructions:
+ no support
+ cortex-a57/a72: cryptographic extension is optional,
  floating-point/neon is not.
+ cortex-a53: crytographic extension is optional as well as
  floating-point/neon. But cryptographic requires
  floating-point/neon support.

Therefore we can safely clear the ISAR fields when neon is disabled.

Note that other Arm cpus seem to follow this. For example cortex-a55 is
like cortex-a53 and cortex-a76/cortex-a710 are like cortex-a57/a72.

Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220427090117.6954-1-damien.hedde@greensocs.com
[PMM: fixed commit message typos]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 8b7a5bbecff7d2128ddf81fe9886692c820b742e
      
https://github.com/qemu/qemu/commit/8b7a5bbecff7d2128ddf81fe9886692c820b742e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M target/arm/debug_helper.c
    M target/arm/helper.c
    M target/arm/internals.h
    M target/arm/kvm64.c

  Log Message:
  -----------
  target/arm: Use field names for accessing DBGWCRn

While defining these names, use the correct field width of 5 not 4 for
DBGWCR.MASK.  This typo prevented setting a watchpoint larger than 32k.

Reported-by: Chris Howard <cvz185@web.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20220427051926.295223-1-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: ced716942a6646594f23674a9462bfe98c29e2e9
      
https://github.com/qemu/qemu/commit/ced716942a6646594f23674a9462bfe98c29e2e9
  Author: Jean-Philippe Brucker <jean-philippe@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M hw/arm/smmuv3-internal.h
    M hw/arm/smmuv3.c
    M include/hw/arm/smmu-common.h

  Log Message:
  -----------
  hw/arm/smmuv3: Cache event fault record

The Record bit in the Context Descriptor tells the SMMU to report fault
events to the event queue. Since we don't cache the Record bit at the
moment, access faults from a cached Context Descriptor are never
reported. Store the Record bit in the cached SMMUTransCfg.

Fixes: 9bde7f0674fe ("hw/arm/smmuv3: Implement translate callback")
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20220427111543.124620-1-jean-philippe@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 264a3b2eba3381980d17f23a7374edac691fd39a
      
https://github.com/qemu/qemu/commit/264a3b2eba3381980d17f23a7374edac691fd39a
  Author: Jean-Philippe Brucker <jean-philippe@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M hw/arm/smmuv3.c

  Log Message:
  -----------
  hw/arm/smmuv3: Add space in guest error message

Make the translation error message prettier by adding a missing space
before the parenthesis.

Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20220427111543.124620-2-jean-philippe@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: f81c60c24497e912d2fcf9d250c6f3de01db68b9
      
https://github.com/qemu/qemu/commit/f81c60c24497e912d2fcf9d250c6f3de01db68b9
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M docs/system/arm/emulation.rst
    M target/arm/cpu64.c

  Log Message:
  -----------
  target/arm: Advertise support for FEAT_TTL

The Arm FEAT_TTL architectural feature allows the guest to provide an
optional hint in an AArch64 TLB invalidate operation about which
translation table level holds the leaf entry for the address being
invalidated.  QEMU's TLB implementation doesn't need that hint, and
we correctly ignore the (previously RES0) bits in TLB invalidate
operation values that are now used for the TTL field.  So we can
simply advertise support for it in our 'max' CPU.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220426160422.2353158-2-peter.maydell@linaro.org


  Commit: 75d08a407240754e2ca35caa5852d1d33763856c
      
https://github.com/qemu/qemu/commit/75d08a407240754e2ca35caa5852d1d33763856c
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M docs/system/arm/emulation.rst
    M target/arm/cpu64.c

  Log Message:
  -----------
  target/arm: Advertise support for FEAT_BBM level 2

The description in the Arm ARM of the requirements of FEAT_BBM is
admirably clear on the guarantees it provides software, but slightly
more obscure on what that means for implementations.  The description
of the equivalent SMMU feature in the SMMU specification (IHI0070D.b
section 3.21.1) is perhaps a bit more detailed and includes some
example valid implementation choices. (The SMMU version of this
feature is slightly tighter than the CPU version: the CPU is permitted
to raise TLB Conflict aborts in some situations that the SMMU may
not. This doesn't matter for QEMU because we don't want to do TLB
Conflict aborts anyway.)

The informal summary of FEAT_BBM is that it is about permitting an OS
to switch a range of memory between "covered by a huge page" and
"covered by a sequence of normal pages" without having to engage in
the 'break-before-make' dance that has traditionally been
necessary. The 'break-before-make' sequence is:

 * replace the old translation table entry with an invalid entry
 * execute a DSB insn
 * execute a broadcast TLB invalidate insn
 * execute a DSB insn
 * write the new translation table entry
 * execute a DSB insn

The point of this is to ensure that no TLB can simultaneously contain
TLB entries for the old and the new entry, which would traditionally
be UNPREDICTABLE (allowing the CPU to generate a TLB Conflict fault
or to use a random mishmash of values from the old and the new
entry).  FEAT_BBM level 2 says "for the specific case where the only
thing that changed is the size of the block, the TLB is guaranteed
not to do weird things even if there are multiple entries for an
address", which means that software can now do:

 * replace old translation table entry with new entry
 * DSB
 * broadcast TLB invalidate
 * DSB

As the SMMU spec notes, valid ways to do this include:

 * if there are multiple entries in the TLB for an address,
   choose one of them and use it, ignoring the others
 * if there are multiple entries in the TLB for an address,
   throw them all out and do a page table walk to get a new one

QEMU's page table walk implementation for Arm CPUs already meets the
requirements for FEAT_BBM level 2. When we cache an entry in our TCG
TLB, we do so only for the specific (non-huge) page that the address
is in, and there is no way for the TLB data structure to ever have
more than one TLB entry for that page. (We handle huge pages only in
that we track what part of the address space is covered by huge pages
so that a TLB invalidate operation for an address in a huge page
results in an invalidation of the whole TLB.) We ignore the Contiguous
bit in page table entries, so we don't have to do anything for the
parts of FEAT_BBM that deal with changis to the Contiguous bit.

FEAT_BBM level 2 also requires that the nT bit in block descriptors
must be ignored; since commit 39a1fd25287f5dece5 we do this.

It's therefore safe for QEMU to advertise FEAT_BBM level 2 by
setting ID_AA64MMFR2_EL1.BBM to 2.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220426160422.2353158-3-peter.maydell@linaro.org


  Commit: f8e7163d9e6740b5cef02bf73a17a59d0bef8bdb
      
https://github.com/qemu/qemu/commit/f8e7163d9e6740b5cef02bf73a17a59d0bef8bdb
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M hw/arm/smmuv3-internal.h
    M hw/arm/smmuv3.c

  Log Message:
  -----------
  hw/arm/smmuv3: Advertise support for SMMUv3.2-BBML2

The Arm SMMUv3 includes an optional feature equivalent to the CPU
FEAT_BBM, which permits an OS to switch a range of memory between
"covered by a huge page" and "covered by a sequence of normal pages"
without having to engage in the traditional 'break-before-make'
dance. (This is particularly important for the SMMU, because devices
performing I/O through an SMMU are less likely to be able to cope with
the window in the sequence where an access results in a translation
fault.)  The SMMU spec explicitly notes that one of the valid ways to
be a BBM level 2 compliant implementation is:
 * if there are multiple entries in the TLB for an address,
   choose one of them and use it, ignoring the others

Our SMMU TLB implementation (unlike our CPU TLB) does allow multiple
TLB entries for an address, because the translation table level is
part of the SMMUIOTLBKey, and so our IOTLB hashtable can include
entries for the same address where the leaf was at different levels
(i.e. both hugepage and normal page). Our TLB lookup implementation in
smmu_iotlb_lookup() will always find the entry with the lowest level
(i.e. it prefers the hugepage over the normal page) and ignore any
others. TLB invalidation correctly removes all TLB entries matching
the specified address or address range (unless the guest specifies the
leaf level explicitly, in which case it gets what it asked for). So we
can validly advertise support for BBML level 2.

Note that we still can't yet advertise ourselves as an SMMU v3.2,
because v3.2 requires support for the S2FWB feature, which we don't
yet implement.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20220426160422.2353158-4-peter.maydell@linaro.org


  Commit: f22833602095b05733bceaddeb20f3edfced3c07
      
https://github.com/qemu/qemu/commit/f22833602095b05733bceaddeb20f3edfced3c07
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-04-28 (Thu, 28 Apr 2022)

  Changed paths:
    M docs/system/arm/emulation.rst
    M hw/arm/smmuv3-internal.h
    M hw/arm/smmuv3.c
    M include/hw/arm/smmu-common.h
    M target/arm/cpu.c
    M target/arm/cpu64.c
    M target/arm/debug_helper.c
    M target/arm/helper.c
    M target/arm/internals.h
    M target/arm/kvm64.c
    M target/arm/translate-a64.c
    M target/arm/translate-sve.c
    M target/arm/translate.c

  Log Message:
  -----------
  Merge tag 'pull-target-arm-20220428' of 
https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
 * refactor to use tcg_constant where appropriate
 * Advertise support for FEAT_TTL and FEAT_BBM level 2
 * smmuv3: Cache event fault record
 * smmuv3: Add space in guest error message
 * smmuv3: Advertise support for SMMUv3.2-BBML2

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# gpg: Signature made Thu 28 Apr 2022 07:38:38 AM PDT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" 
[full]

* tag 'pull-target-arm-20220428' of 
https://git.linaro.org/people/pmaydell/qemu-arm: (54 commits)
  hw/arm/smmuv3: Advertise support for SMMUv3.2-BBML2
  target/arm: Advertise support for FEAT_BBM level 2
  target/arm: Advertise support for FEAT_TTL
  hw/arm/smmuv3: Add space in guest error message
  hw/arm/smmuv3: Cache event fault record
  target/arm: Use field names for accessing DBGWCRn
  target/arm: Disable cryptographic instructions when neon is disabled
  target/arm: Use tcg_constant for vector descriptor
  target/arm: Use tcg_constant for do_brk{2,3}
  target/arm: Use tcg_constant for predicate descriptors
  target/arm: Use tcg_constant in do_zzi_{sat, ool}, do_fp_imm
  target/arm: Use tcg_constant in SUBR
  target/arm: Use tcg_constant in LD1, ST1
  target/arm: Use tcg_constant in WHILE
  target/arm: Use tcg_constant in do_clast_scalar
  target/arm: Use tcg_constant in {incr, wrap}_last_active
  target/arm: Use tcg_constant in FCPY, CPY
  target/arm: Use tcg_constant in SINCDEC, INCDEC
  target/arm: Use tcg_constant for trans_INDEX_*
  target/arm: Use tcg_constant in trans_CSEL
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Compare: https://github.com/qemu/qemu/compare/6071ff608720...f22833602095
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