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[Qemu-commits] [qemu/qemu] 892d0f: linux-user/nios2: Hoist pc advance to
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From: |
Richard Henderson |
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Subject: |
[Qemu-commits] [qemu/qemu] 892d0f: linux-user/nios2: Hoist pc advance to the top of E... |
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Date: |
Tue, 26 Apr 2022 14:38:34 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 892d0f4afb2614603157600e9d5d0aaa878b5d31
https://github.com/qemu/qemu/commit/892d0f4afb2614603157600e9d5d0aaa878b5d31
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M linux-user/nios2/cpu_loop.c
Log Message:
-----------
linux-user/nios2: Hoist pc advance to the top of EXCP_TRAP
Note that this advance *should* be done by the translator, as
that's the pc value that's supposed to be generated by hardware.
However, that's a much larger change across sysemu as well.
In the meantime, produce the correct PC for any signals raised
by the trap instruction. Note the special case of TRAP_BRKPT,
which itself is special cased within the kernel.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-2-richard.henderson@linaro.org>
Commit: 42192df83a8eef033b6522989a14fd4a584d6f85
https://github.com/qemu/qemu/commit/42192df83a8eef033b6522989a14fd4a584d6f85
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M linux-user/nios2/target_cpu.h
Log Message:
-----------
linux-user/nios2: Fix clone child return
The child side of clone needs to set the secondary
syscall return value, r7, to indicate syscall success.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-3-richard.henderson@linaro.org>
Commit: 66254caa428d2cf4962c60c2f04959ac32cbf8b3
https://github.com/qemu/qemu/commit/66254caa428d2cf4962c60c2f04959ac32cbf8b3
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M linux-user/nios2/cpu_loop.c
Log Message:
-----------
linux-user/nios2: Drop syscall 0 "workaround"
Syscall 0 is __NR_io_setup for this target; there is nothing
to work around.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Fixes: a0a839b65b6 ("nios2: Add usermode binaries emulation")
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-4-richard.henderson@linaro.org>
Commit: b3a219b70e269b3d22d7f65a895b2af9771a5544
https://github.com/qemu/qemu/commit/b3a219b70e269b3d22d7f65a895b2af9771a5544
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M linux-user/nios2/cpu_loop.c
Log Message:
-----------
linux-user/nios2: Adjust error return
Follow the kernel assembly, which considers all negative
return values to be errors.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-5-richard.henderson@linaro.org>
Commit: b9ef5b31389c3b02b594168f3730f40a9c1bd7b3
https://github.com/qemu/qemu/commit/b9ef5b31389c3b02b594168f3730f40a9c1bd7b3
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M linux-user/nios2/cpu_loop.c
Log Message:
-----------
linux-user/nios2: Handle special qemu syscall return values
Honor QEMU_ESIGRETURN and QEMU_ERESTARTSYS.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-6-richard.henderson@linaro.org>
Commit: dfb810bcaad695f50f2b3e1d105eebeb6a1cea16
https://github.com/qemu/qemu/commit/dfb810bcaad695f50f2b3e1d105eebeb6a1cea16
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M linux-user/nios2/signal.c
Log Message:
-----------
linux-user/nios2: Remove do_sigreturn
There is no sigreturn syscall, only rt_sigreturn.
This function is unused.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-7-richard.henderson@linaro.org>
Commit: 1b5fb4d252c4403cbb893be6e38a26a119d054ef
https://github.com/qemu/qemu/commit/1b5fb4d252c4403cbb893be6e38a26a119d054ef
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M linux-user/nios2/signal.c
Log Message:
-----------
linux-user/nios2: Use QEMU_ESIGRETURN from do_rt_sigreturn
Drop the kernel-specific "pr2" code structure and use
the qemu-specific error return value.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-8-richard.henderson@linaro.org>
Commit: 20e7524ff9f0cab4c9a0306014d6f3d7b467ae1e
https://github.com/qemu/qemu/commit/20e7524ff9f0cab4c9a0306014d6f3d7b467ae1e
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
R tests/tcg/nios2/Makefile.target
Log Message:
-----------
tests/tcg/nios2: Re-enable linux-user tests
Now that threads and signals have been fixed, re-enable tests.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-9-richard.henderson@linaro.org>
Commit: 3c818909b039c0630b2c1c4a6ea25fba97a5c2a3
https://github.com/qemu/qemu/commit/3c818909b039c0630b2c1c4a6ea25fba97a5c2a3
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/helper.c
Log Message:
-----------
target/nios2: Remove user-only nios2_cpu_do_interrupt
Since 78271684719, this function is unused for user-only,
when the TCGCPUOps.do_interrupt hook itself became system-only.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220421151735.31996-10-richard.henderson@linaro.org>
Commit: fb4de9d2357bc42048a3ed3fcd15d8036e4c94a7
https://github.com/qemu/qemu/commit/fb4de9d2357bc42048a3ed3fcd15d8036e4c94a7
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M linux-user/nios2/cpu_loop.c
M target/nios2/cpu.c
M target/nios2/cpu.h
M target/nios2/helper.c
Log Message:
-----------
target/nios2: Remove nios2_cpu_record_sigsegv
Since f5ef0e518d0, we have a real page mapped for kuser,
which means the special casing for SIGSEGV can go away.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220421151735.31996-11-richard.henderson@linaro.org>
Commit: d2a11b40a42051fe3ed846a0014c3a7ac89780bb
https://github.com/qemu/qemu/commit/d2a11b40a42051fe3ed846a0014c3a7ac89780bb
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/helper.c
M target/nios2/meson.build
Log Message:
-----------
target/nios2: Build helper.c for system only
Remove the #ifdef !defined(CONFIG_USER_ONLY) that surrounds
the whole file, and move helper.c to nios2_softmmu_ss.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220421151735.31996-12-richard.henderson@linaro.org>
Commit: 3a0a43ec3c9c4c26f5a1a948e78311468e2930d6
https://github.com/qemu/qemu/commit/3a0a43ec3c9c4c26f5a1a948e78311468e2930d6
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M linux-user/nios2/cpu_loop.c
Log Message:
-----------
linux-user/nios2: Use force_sig_fault for EXCP_DEBUG
Use the simpler signal interface, which forces us to supply
the missing PC value to si_addr.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220421151735.31996-13-richard.henderson@linaro.org>
Commit: b106e7b7e48e5b1ab8e13165f28451f6ebf1fe3b
https://github.com/qemu/qemu/commit/b106e7b7e48e5b1ab8e13165f28451f6ebf1fe3b
Author: Amir Gonnen <amir.gonnen@neuroblade.ai>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Check supervisor on eret
eret instruction is only allowed in supervisor mode.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Amir Gonnen <amir.gonnen@neuroblade.ai>
Message-Id: <20220303153906.2024748-2-amir.gonnen@neuroblade.ai>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-14-richard.henderson@linaro.org>
Commit: 48b7eac2078f2a85aca094eac10afa1844e5d156
https://github.com/qemu/qemu/commit/48b7eac2078f2a85aca094eac10afa1844e5d156
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Stop generating code if gen_check_supervisor fails
Whether the cpu is in user-mode or not is something that we
know at translation-time. We do not need to generate code
after having raised an exception.
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-15-richard.henderson@linaro.org>
Commit: 5ea3e9975b901dc85be3a30931cfa57830f1bd00
https://github.com/qemu/qemu/commit/5ea3e9975b901dc85be3a30931cfa57830f1bd00
Author: Amir Gonnen <amir.gonnen@neuroblade.ai>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/cpu.h
Log Message:
-----------
target/nios2: Add NUM_GP_REGS and NUM_CP_REGS
Split NUM_CORE_REGS into components that can be used elsewhere.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Amir Gonnen <amir.gonnen@neuroblade.ai>
Message-Id: <20220303153906.2024748-3-amir.gonnen@neuroblade.ai>
[rth: Split out of a larger patch for shadow register sets.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-16-richard.henderson@linaro.org>
Commit: 17a406eec574e6e97fa7d5c70047026502a358cb
https://github.com/qemu/qemu/commit/17a406eec574e6e97fa7d5c70047026502a358cb
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M linux-user/elfload.c
M linux-user/nios2/cpu_loop.c
M linux-user/nios2/signal.c
M target/nios2/cpu.c
M target/nios2/cpu.h
M target/nios2/helper.c
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Split PC out of env->regs[]
It is cleaner to have a separate name for this variable.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-17-richard.henderson@linaro.org>
Commit: 8d855c89d1030ddf3d9093d6775fbc338a0b89cb
https://github.com/qemu/qemu/commit/8d855c89d1030ddf3d9093d6775fbc338a0b89cb
Author: Amir Gonnen <amir.gonnen@neuroblade.ai>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/helper.h
M target/nios2/op_helper.c
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Split out helper for eret instruction
The implementation of eret will become much more complex
with the introduction of shadow registers.
[rth: Split out of a larger patch for shadow register sets.
Directly exit to the cpu loop from the helper.]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Amir Gonnen <amir.gonnen@neuroblade.ai>
Message-Id: <20220303153906.2024748-3-amir.gonnen@neuroblade.ai>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-18-richard.henderson@linaro.org>
Commit: 48da43b258d9038d1f093cfd0d2a4d01d3183be9
https://github.com/qemu/qemu/commit/48da43b258d9038d1f093cfd0d2a4d01d3183be9
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Fix BRET instruction
We had failed to copy BSTATUS back to STATUS, and diagnose
supervisor-only. The spec is light on the specifics of the
implementation of bret, but it is an easy assumption that
the restore into STATUS should work the same as eret.
Therefore, reuse the existing helper_eret.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-19-richard.henderson@linaro.org>
Commit: f1ec078f9af0f255ca4ae2b8c0d8d8c98903f7d5
https://github.com/qemu/qemu/commit/f1ec078f9af0f255ca4ae2b8c0d8d8c98903f7d5
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Do not create TCGv for control registers
We don't need to reference them often, and when we do it
is just as easy to load/store from cpu_env directly.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-20-richard.henderson@linaro.org>
Commit: dd4c6ee227202481d93b5329c5bd5d44ecb5c033
https://github.com/qemu/qemu/commit/dd4c6ee227202481d93b5329c5bd5d44ecb5c033
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M linux-user/elfload.c
M linux-user/nios2/cpu_loop.c
Log Message:
-----------
linux-user/nios2: Only initialize SP and PC in target_cpu_copy_regs
Drop the set of estatus in init_thread; it was clearly intended
to be setting the value of CR_STATUS for the application, but we
never actually performed that copy. However, the proper value is
set in nios2_cpu_reset so we don't need to do anything here.
We only initialize SP and EA in init_thread, there's no value in
copying other uninitialized data into ENV.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-21-richard.henderson@linaro.org>
Commit: e237ac34db57078f8c8c167ea24acee71394dc2a
https://github.com/qemu/qemu/commit/e237ac34db57078f8c8c167ea24acee71394dc2a
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/cpu.h
Log Message:
-----------
target/nios2: Remove cpu_interrupts_enabled
This function is unused. The real computation of this value
is located in nios2_cpu_exec_interrupt.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-22-richard.henderson@linaro.org>
Commit: b8f036a9fab6266828546dd127c5535bd535fcda
https://github.com/qemu/qemu/commit/b8f036a9fab6266828546dd127c5535bd535fcda
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/cpu.c
M target/nios2/cpu.h
M target/nios2/helper.c
M target/nios2/mmu.c
M target/nios2/op_helper.c
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Split control registers away from general registers
Place the control registers into their own array, env->ctrl[].
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-23-richard.henderson@linaro.org>
Commit: 5dfb910d918ac5753f05190295cd9e8c612ff3ef
https://github.com/qemu/qemu/commit/5dfb910d918ac5753f05190295cd9e8c612ff3ef
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Clean up nios2_cpu_dump_state
Do not print control registers for user-only mode.
Rename reserved control registers to "resN", where
N is the control register index.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-24-richard.henderson@linaro.org>
Commit: e96568a46141557aa71df877f2222fe9993c127e
https://github.com/qemu/qemu/commit/e96568a46141557aa71df877f2222fe9993c127e
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/cpu.h
Log Message:
-----------
target/nios2: Use hw/registerfields.h for CR_STATUS fields
Add all fields; retain the helper macros for single bit fields.
So far there are no uses of the multi-bit status fields.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-25-richard.henderson@linaro.org>
Commit: bf754c96b24e3e22d80121b63b19eb27067dcea5
https://github.com/qemu/qemu/commit/bf754c96b24e3e22d80121b63b19eb27067dcea5
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/cpu.h
M target/nios2/helper.c
Log Message:
-----------
target/nios2: Use hw/registerfields.h for CR_EXCEPTION fields
Use FIELD_DP32 instead of manual shifting and masking.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-26-richard.henderson@linaro.org>
Commit: 0a1fc63043e485655aa287ad346f05234afaae6e
https://github.com/qemu/qemu/commit/0a1fc63043e485655aa287ad346f05234afaae6e
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/cpu.h
M target/nios2/helper.c
M target/nios2/mmu.c
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Use hw/registerfields.h for CR_TLBADDR fields
Use FIELD_EX32 and FIELD_DP32 instead of manual manipulation
of the fields.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-27-richard.henderson@linaro.org>
Commit: 9d63656354d7cdac6a4b2cafa8243ede4a551a56
https://github.com/qemu/qemu/commit/9d63656354d7cdac6a4b2cafa8243ede4a551a56
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/cpu.h
M target/nios2/mmu.c
Log Message:
-----------
target/nios2: Use hw/registerfields.h for CR_TLBACC fields
Retain the helper macros for single bit fields as aliases to
the longer R_*_MASK names. Use FIELD_EX32 and FIELD_DP32
instead of manually manipulating the fields.
Since we're rewriting the references to CR_TLBACC_IGN_* anyway,
we correct the name of this field to IG, which is its name in
the official CPU documentation.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-28-richard.henderson@linaro.org>
Commit: 8036281527e5bdc2ebeca53a592115dcfa605245
https://github.com/qemu/qemu/commit/8036281527e5bdc2ebeca53a592115dcfa605245
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/cpu.h
M target/nios2/helper.c
M target/nios2/mmu.c
Log Message:
-----------
target/nios2: Rename CR_TLBMISC_WR to CR_TLBMISC_WE
WE is the architectural name of the field, not WR.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-29-richard.henderson@linaro.org>
Commit: 17c20fe3c829341a4100532f32752057d0cd6f6f
https://github.com/qemu/qemu/commit/17c20fe3c829341a4100532f32752057d0cd6f6f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/cpu.h
M target/nios2/helper.c
M target/nios2/mmu.c
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Use hw/registerfields.h for CR_TLBMISC fields
Use FIELD_EX32 and FIELD_DP32 instead of managing the
masking by hand.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-30-richard.henderson@linaro.org>
Commit: bdb307b4d83bf09ae666d7b79388597f840c39d7
https://github.com/qemu/qemu/commit/bdb307b4d83bf09ae666d7b79388597f840c39d7
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/cpu.h
Log Message:
-----------
target/nios2: Move R_FOO and CR_BAR into enumerations
These symbols become available to the debugger.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-31-richard.henderson@linaro.org>
Commit: 24ca31346e41e80166c696dd04b33027b93d8559
https://github.com/qemu/qemu/commit/24ca31346e41e80166c696dd04b33027b93d8559
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/cpu.h
M target/nios2/helper.c
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Create EXCP_SEMIHOST for semi-hosting
Decode 'break 1' during translation, rather than doing
it again during exception processing.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-32-richard.henderson@linaro.org>
Commit: d8c5521cc4ae34e313455bdb1d3c93e51ad88ee6
https://github.com/qemu/qemu/commit/d8c5521cc4ae34e313455bdb1d3c93e51ad88ee6
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/helper.c
Log Message:
-----------
target/nios2: Clean up nios2_cpu_do_interrupt
Split out do_exception and do_iic_irq to handle bulk of the interrupt and
exception processing. Parameterize the changes required to cpu state.
The status.EH bit, which protects some data against double-faults,
is only present with the MMU. Several exception cases did not check
for status.EH being set, as required.
The status.IH bit, which had been set by EXCP_IRQ, is exclusive to
the external interrupt controller, which we do not yet implement.
The internal interrupt controller, when the MMU is also present,
sets the status.EH bit.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-33-richard.henderson@linaro.org>
Commit: 0e0824a1a94e02e15330261e4151faaa7cbb773d
https://github.com/qemu/qemu/commit/0e0824a1a94e02e15330261e4151faaa7cbb773d
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/helper.c
Log Message:
-----------
target/nios2: Hoist CPU_LOG_INT logging
Performing this early means that we can merge more cases
within the non-logging switch statement.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-34-richard.henderson@linaro.org>
Commit: af95a70a06d361fa068f1579e0b206f3a5e5de0f
https://github.com/qemu/qemu/commit/af95a70a06d361fa068f1579e0b206f3a5e5de0f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/helper.c
Log Message:
-----------
target/nios2: Handle EXCP_UNALIGN and EXCP_UNALIGND
While some of the plumbing for misaligned data is present, in the form
of nios2_cpu_do_unaligned_access, the hook will not be called because
TARGET_ALIGNED_ONLY is not set in configs/targets/nios2-softmmu.mak.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220421151735.31996-35-richard.henderson@linaro.org>
Commit: 34cccb7462e12737f04d59dffeea1389aa689d81
https://github.com/qemu/qemu/commit/34cccb7462e12737f04d59dffeea1389aa689d81
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/helper.c
Log Message:
-----------
target/nios2: Cleanup set of CR_EXCEPTION for do_interrupt
The register is entirely read-only for software, and we do not
implement ECC, so we need not deposit the cause into an existing
value; just create a new value from scratch.
Furthermore, exception.CAUSE is not written for break exceptions.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-36-richard.henderson@linaro.org>
Commit: be77e1d5fe1abaaf70d886719a4084ea9c0c5eec
https://github.com/qemu/qemu/commit/be77e1d5fe1abaaf70d886719a4084ea9c0c5eec
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/cpu.h
M target/nios2/helper.c
Log Message:
-----------
target/nios2: Clean up handling of tlbmisc in do_exception
The 4 lower bits, D, PERM, BAD, DBL, are unconditionally set on any
exception with EH=0, or so says Table 42 (Processor Status After
Taking Exception).
We currently do not set PERM or BAD at all, and only set/clear
DBL for tlb miss, and do not clear DBL for any other exception.
It is a bit confusing to set D in tlb_fill and the rest during
do_interrupt, so move the setting of D to do_interrupt as well.
To do this, split EXP_TLBD into two cases, EXCP_TLB_X and EXCP_TLB_D,
which allows us to distinguish them during do_interrupt. Choose
a value for EXCP_TLB_D such that when truncated it produces the
correct value for exception.CAUSE.
Rename EXCP_TLB[RWX] to EXCP_PERM_[RWX], to emphasize that the
exception is permissions related. Rename EXCP_SUPER[AD] to
EXCP_SUPERA_[DX] to emphasize that they are both "supervisor
address" exceptions, data and execute.
Retain the setting of tlbmisc.WE for the fast-tlb-miss path, as it
is being relied upon, but remove it from the permission path.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-37-richard.henderson@linaro.org>
Commit: 796945d596058516f3c66f509e1a4804e4ae198a
https://github.com/qemu/qemu/commit/796945d596058516f3c66f509e1a4804e4ae198a
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/cpu.c
M target/nios2/cpu.h
M target/nios2/op_helper.c
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Prevent writes to read-only or reserved control fields
Create an array of masks which detail the writable and readonly
bits for each control register. Apply them when writing to
control registers, including the write to status during eret.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220421151735.31996-38-richard.henderson@linaro.org>
Commit: b05550af11763cb96fa5b368cc0cebcb837b7846
https://github.com/qemu/qemu/commit/b05550af11763cb96fa5b368cc0cebcb837b7846
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/cpu.c
Log Message:
-----------
target/nios2: Implement cpuid
Copy the existing cpu_index into the space reserved for CR_CPUID.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-39-richard.henderson@linaro.org>
Commit: 2de70d2d967a73c7ae6ad19b69a217da7da98667
https://github.com/qemu/qemu/commit/2de70d2d967a73c7ae6ad19b69a217da7da98667
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/cpu.c
Log Message:
-----------
target/nios2: Implement CR_STATUS.RSIE
Without EIC, this bit is RES1. So set the bit at reset,
and add it to the readonly fields of CR_STATUS.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-40-richard.henderson@linaro.org>
Commit: e8d12542ee5646843c5557db3c78a6c29dc6bf29
https://github.com/qemu/qemu/commit/e8d12542ee5646843c5557db3c78a6c29dc6bf29
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/cpu.c
M target/nios2/cpu.h
Log Message:
-----------
target/nios2: Remove CPU_INTERRUPT_NMI
This interrupt bit is never set, so testing it in
nios2_cpu_has_work is pointless.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-41-richard.henderson@linaro.org>
Commit: 345b7a8757e89a8f70a1fa09c6d51310650ef8be
https://github.com/qemu/qemu/commit/345b7a8757e89a8f70a1fa09c6d51310650ef8be
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M linux-user/nios2/cpu_loop.c
M target/nios2/cpu.c
M target/nios2/cpu.h
M target/nios2/helper.c
M target/nios2/helper.h
M target/nios2/op_helper.c
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Support division error exception
Division may (optionally) raise a division exception.
Since the linux kernel has been prepared for this for
some time, enable it by default.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-42-richard.henderson@linaro.org>
Commit: 718db07714734a89338ae7a1dedcbafa579664eb
https://github.com/qemu/qemu/commit/718db07714734a89338ae7a1dedcbafa579664eb
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Use tcg_constant_tl
Replace current uses of tcg_const_tl, and remove the frees.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-43-richard.henderson@linaro.org>
Commit: 1746338ed613259803f10b0f642149a6c44e0470
https://github.com/qemu/qemu/commit/1746338ed613259803f10b0f642149a6c44e0470
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Split out named structs for [IRJ]_TYPE
Currently the structures are anonymous within the macro.
Pull them out to standalone types.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220421151735.31996-44-richard.henderson@linaro.org>
Commit: 3d1f63d019c7aeaf2d9448ec58eab95c0a1d4a10
https://github.com/qemu/qemu/commit/3d1f63d019c7aeaf2d9448ec58eab95c0a1d4a10
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Split out helpers for gen_i_cmpxx
Do as little work as possible within the macro.
Split out helper functions and pass in arguments instead.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: cd419bc63d8f98b07503511286a28cbedab12cd7
https://github.com/qemu/qemu/commit/cd419bc63d8f98b07503511286a28cbedab12cd7
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Split out helpers for gen_i_math_logic
Do as little work as possible within the macro.
Split out helper functions and pass in arguments instead.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 7c849046af7cec5efbacdb9b3ff14ebef9abebd6
https://github.com/qemu/qemu/commit/7c849046af7cec5efbacdb9b3ff14ebef9abebd6
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Split out helpers for gen_r_math_logic
Split the macro in two, one for reg/imm and one for reg/reg.
Do as little work as possible within the macros; split out
helper functions and pass in arguments instead.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 3099c41bee4d6a882f9f4cc8ed4c4b3e4aa64222
https://github.com/qemu/qemu/commit/3099c41bee4d6a882f9f4cc8ed4c4b3e4aa64222
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Split out helpers for gen_rr_mul_high
Rename the macro from gen_r_mul, because these are the multiply
variants that produce a high-part result. Do as little work as
possible within the macro; split out helper functions and pass
in arguments instead.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 541cb627da1620d8096646dca7e4607fb4746718
https://github.com/qemu/qemu/commit/541cb627da1620d8096646dca7e4607fb4746718
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Split out helpers for gen_rr_shift
Do as little work as possible within the macro.
Split out helper functions and pass in arguments instead.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 7eed8e4003532c49dcd7639086a4895029151f41
https://github.com/qemu/qemu/commit/7eed8e4003532c49dcd7639086a4895029151f41
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Introduce dest_gpr
Constrain all references to cpu_R[] to load_gpr and dest_gpr.
This will be required for supporting shadow register sets.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-46-richard.henderson@linaro.org>
Commit: d2293ebb042b7ca77cdadd1ed6e5d07fcc7a510f
https://github.com/qemu/qemu/commit/d2293ebb042b7ca77cdadd1ed6e5d07fcc7a510f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/cpu.h
Log Message:
-----------
target/nios2: Drop CR_STATUS_EH from tb->flags
There's nothing about EH that affects translation,
so there's no need to include it in tb->flags.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-47-richard.henderson@linaro.org>
Commit: 0706ac0f860896a73299cb4d2de50a9216e2f5bb
https://github.com/qemu/qemu/commit/0706ac0f860896a73299cb4d2de50a9216e2f5bb
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M configs/targets/nios2-softmmu.mak
M target/nios2/helper.c
Log Message:
-----------
target/nios2: Enable unaligned traps for system mode
Unaligned traps are optional, but required with an mmu.
Turn them on always, because the fallback behaviour undefined.
Enable alignment checks in the config file.
Unwind the guest pc properly from do_unaligned_access.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-48-richard.henderson@linaro.org>
Commit: bd9154aa2b7b66e542e243a460912b25c94799de
https://github.com/qemu/qemu/commit/bd9154aa2b7b66e542e243a460912b25c94799de
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Create gen_jumpr
Split out a function to perform an indirect branch.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-49-richard.henderson@linaro.org>
Commit: 3ad5935c5817cd1ff7938183fe31351765a9c5e9
https://github.com/qemu/qemu/commit/3ad5935c5817cd1ff7938183fe31351765a9c5e9
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Hoist set of is_jmp into gen_goto_tb
Rather than force all callers to set this, do it
within the subroutine.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-50-richard.henderson@linaro.org>
Commit: 5b843284d83dafd3c7cb402aecf1e1b25715ac9a
https://github.com/qemu/qemu/commit/5b843284d83dafd3c7cb402aecf1e1b25715ac9a
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Use gen_goto_tb for DISAS_TOO_MANY
Depending on the reason for ending the TB, we can chain
to the next TB because the PC is constant.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-51-richard.henderson@linaro.org>
Commit: 0e6f22c561a5e9e02dcfa535c4573b0344d4b2ba
https://github.com/qemu/qemu/commit/0e6f22c561a5e9e02dcfa535c4573b0344d4b2ba
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Use tcg_gen_lookup_and_goto_ptr
Use lookup_and_goto_ptr for indirect chaining between TBs.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-52-richard.henderson@linaro.org>
Commit: 410c6aaa3b44d5bdd1af7c1a465be7d5df2dfbf0
https://github.com/qemu/qemu/commit/410c6aaa3b44d5bdd1af7c1a465be7d5df2dfbf0
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M linux-user/nios2/cpu_loop.c
M target/nios2/op_helper.c
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Implement Misaligned destination exception
Indirect branches, plus eret and bret optionally raise
an exception when branching to a misaligned address.
The exception is required when an mmu is enabled, but
enable it always because the fallback behaviour is not
documented (though presumably it discards low bits).
For the purposes of the linux-user cpu loop, if EXCP_UNALIGN
(misaligned data) were to arrive, it would be treated the
same as EXCP_UNALIGND (misaligned destination). See the
!defined(CONFIG_NIOS2_ALIGNMENT_TRAP) block in kernel/traps.c.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-53-richard.henderson@linaro.org>
Commit: 945a5bd3f88729960c52393a9eb3ad701e2b6595
https://github.com/qemu/qemu/commit/945a5bd3f88729960c52393a9eb3ad701e2b6595
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/cpu.c
M target/nios2/cpu.h
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Introduce shadow register sets
Do not actually enable them so far, in terms of being able
to change the current register set, but add all of the
plumbing to address them. Do not enable them for user-only.
Add an env->regs pointer that handles the indirection to
the current register set. The naming of the pointer hides
the difference between old and new, user-only and sysemu.
>From the notes on wrprs, which states that r0 must be initialized
before use in shadow register sets, infer that R_ZERO is *not*
hardwired to zero in shadow register sets, but that it is still
read-only. Introduce tbflags bit R0_0 to track that it has been
properly set to zero. Adjust load_gpr to reflect this.
At the same time we might as well special case crs == 0 to avoid
the indirection through env->regs during translation as well; this
is intended to be the most common case for non-interrupt handlers.
Init env->regs at reset.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220421151735.31996-54-richard.henderson@linaro.org>
Commit: 3a03087019ab4a67751570190439d252b39b83c4
https://github.com/qemu/qemu/commit/3a03087019ab4a67751570190439d252b39b83c4
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/cpu.h
M target/nios2/helper.h
M target/nios2/op_helper.c
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Implement rdprs, wrprs
Implement these out of line, so that tcg global temps
(aka the architectural registers) are synced back to
tcg storage as required. This makes sure that we get
the proper results when status.PRS == status.CRS.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-55-richard.henderson@linaro.org>
Commit: 6bcc59cafa271b634009bc92c01c866602ea4c53
https://github.com/qemu/qemu/commit/6bcc59cafa271b634009bc92c01c866602ea4c53
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/cpu.h
M target/nios2/op_helper.c
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Update helper_eret for shadow registers
When CRS = 0, we restore from estatus; otherwise from sstatus.
Update for the new CRS.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-56-richard.henderson@linaro.org>
Commit: a25c4eff32ba6192cff648ccaf0316bd829c80af
https://github.com/qemu/qemu/commit/a25c4eff32ba6192cff648ccaf0316bd829c80af
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M target/nios2/cpu.c
M target/nios2/cpu.h
M target/nios2/helper.c
Log Message:
-----------
target/nios2: Implement EIC interrupt processing
This is the cpu side of the operation. Register one irq line,
called EIC. Split out the rather different processing to a
separate function.
Delay initialization of gpio irqs until realize. We need to
provide a window after init in which the board can set eic_present.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220421151735.31996-57-richard.henderson@linaro.org>
Commit: e84f1768449330a5b4c62a8aaa68f102ba6ec573
https://github.com/qemu/qemu/commit/e84f1768449330a5b4c62a8aaa68f102ba6ec573
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M linux-user/nios2/cpu_loop.c
M target/nios2/cpu.h
M target/nios2/helper.c
M target/nios2/op_helper.c
M target/nios2/translate.c
Log Message:
-----------
target/nios2: Advance pc when raising exceptions
The exception return address for nios2 is the instruction
after the one that was executing at the time of the exception.
We have so far implemented this by advancing the pc during the
process of raising the exception. It is perhaps a little less
confusing to do this advance in the translator (and helpers)
when raising the exception in the first place, so that we may
more closely match kernel sources.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220421151735.31996-58-richard.henderson@linaro.org>
Commit: 3747727aad1841bd07b7c9588b6d9b32182b1121
https://github.com/qemu/qemu/commit/3747727aad1841bd07b7c9588b6d9b32182b1121
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M linux-user/nios2/cpu_loop.c
Log Message:
-----------
linux-user/nios2: Handle various SIGILL exceptions
We missed out on a couple of exception types that may
legitimately be raised by a userland program.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-59-richard.henderson@linaro.org>
Commit: c46cabd4a92ec18f217ad4c61e1af688a355035f
https://github.com/qemu/qemu/commit/c46cabd4a92ec18f217ad4c61e1af688a355035f
Author: Amir Gonnen <amir.gonnen@neuroblade.ai>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M hw/intc/Kconfig
M hw/intc/meson.build
A hw/intc/nios2_vic.c
A include/hw/intc/nios2_vic.h
Log Message:
-----------
hw/intc: Vectored Interrupt Controller (VIC)
Implement nios2 Vectored Interrupt Controller (VIC).
VIC is connected to EIC. It needs to update rha, ril, rrs and rnmi
fields on Nios2CPU before raising an IRQ.
For that purpose, VIC has a "cpu" property which should refer to the
nios2 cpu and set by the board that connects VIC.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Amir Gonnen <amir.gonnen@neuroblade.ai>
Message-Id: <20220303153906.2024748-5-amir.gonnen@neuroblade.ai>
[rth: Split out nios2_vic.h]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-60-richard.henderson@linaro.org>
Commit: 6fc834d5fe3f9fd4f66fa7c9fc5b5b066488c439
https://github.com/qemu/qemu/commit/6fc834d5fe3f9fd4f66fa7c9fc5b5b066488c439
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M hw/nios2/10m50_devboard.c
Log Message:
-----------
hw/nios2: Introduce Nios2MachineState
We want to move data from the heap into Nios2MachineState,
which is not possible with DEFINE_MACHINE.
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-61-richard.henderson@linaro.org>
Commit: e734cedf119700813478cc84511d9d7cc966c1d6
https://github.com/qemu/qemu/commit/e734cedf119700813478cc84511d9d7cc966c1d6
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M hw/nios2/10m50_devboard.c
Log Message:
-----------
hw/nios2: Move memory regions into Nios2Machine
Convert to contiguous allocation, as much as possible so far.
The two timer objects are not exposed for subobject allocation.
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-62-richard.henderson@linaro.org>
Commit: 28a3c1b5f183f765f9ba04fc206807dce07960f8
https://github.com/qemu/qemu/commit/28a3c1b5f183f765f9ba04fc206807dce07960f8
Author: Amir Gonnen <amir.gonnen@neuroblade.ai>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M hw/nios2/10m50_devboard.c
M hw/nios2/Kconfig
Log Message:
-----------
hw/nios2: Machine with a Vectored Interrupt Controller
Demonstrate how to use nios2 VIC on a machine.
Introduce a new machine property to attach a VIC.
When VIC is present, let the CPU know that it should use the
External Interrupt Interface instead of the Internal Interrupt Interface.
The devices on the machine are attached to the VIC and not directly to cpu.
To allow VIC update EIC fields, we set the "cpu" property of the VIC
with a reference to the nios2 cpu.
[rth: Put a property on the 10m50-ghrd machine, rather than
create a new machine class.]
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Amir Gonnen <amir.gonnen@neuroblade.ai>
Message-Id: <20220303153906.2024748-6-amir.gonnen@neuroblade.ai>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-63-richard.henderson@linaro.org>
Commit: ccbaa553a18a2062dd1e208a2f3aa3a59f3737cc
https://github.com/qemu/qemu/commit/ccbaa553a18a2062dd1e208a2f3aa3a59f3737cc
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
A tests/tcg/nios2/10m50-ghrd.ld
A tests/tcg/nios2/Makefile.softmmu-target
A tests/tcg/nios2/boot.S
A tests/tcg/nios2/intr.S
A tests/tcg/nios2/semicall.h
Log Message:
-----------
tests/tcg/nios2: Add semihosting multiarch tests
Add runtime supporting the nios2-semi.c interface.
Execute the hello and memory multiarch tests.
Cc: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-64-richard.henderson@linaro.org>
Commit: 7f176c5a0bcb70492f3b158a36311e75f1eb87d7
https://github.com/qemu/qemu/commit/7f176c5a0bcb70492f3b158a36311e75f1eb87d7
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M tests/tcg/nios2/Makefile.softmmu-target
A tests/tcg/nios2/test-shadow-1.S
Log Message:
-----------
tests/tcg/nios2: Add test-shadow-1
Add a regression test for tcg indirect global lowering.
This appeared with nios2, with cps != 0, so that we use
indirection into the shadow register set. An indirect
call verifies alignment of rA. The use of rA was live
across the brcond leading to a tcg_debug_assert failure.
Cc: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220421151735.31996-65-richard.henderson@linaro.org>
Commit: 88d5814e6b02515f823086abb91dc7cdbb31c9f1
https://github.com/qemu/qemu/commit/88d5814e6b02515f823086abb91dc7cdbb31c9f1
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-04-26 (Tue, 26 Apr 2022)
Changed paths:
M configs/targets/nios2-softmmu.mak
M hw/intc/Kconfig
M hw/intc/meson.build
A hw/intc/nios2_vic.c
M hw/nios2/10m50_devboard.c
M hw/nios2/Kconfig
A include/hw/intc/nios2_vic.h
M linux-user/elfload.c
M linux-user/nios2/cpu_loop.c
M linux-user/nios2/signal.c
M linux-user/nios2/target_cpu.h
M target/nios2/cpu.c
M target/nios2/cpu.h
M target/nios2/helper.c
M target/nios2/helper.h
M target/nios2/meson.build
M target/nios2/mmu.c
M target/nios2/op_helper.c
M target/nios2/translate.c
A tests/tcg/nios2/10m50-ghrd.ld
A tests/tcg/nios2/Makefile.softmmu-target
R tests/tcg/nios2/Makefile.target
A tests/tcg/nios2/boot.S
A tests/tcg/nios2/intr.S
A tests/tcg/nios2/semicall.h
A tests/tcg/nios2/test-shadow-1.S
Log Message:
-----------
Merge tag 'pull-nios2-20220426' of https://gitlab.com/rth7680/qemu into
staging
Fix nios2-linux-user syscalls.
Fix nios2-linux-user sigreturn.
Enable tests for nios2-linux-user.
Remove special handling of SIGSEGV.
Check supervisor for eret, bret.
Split special registers out of env->regs[].
Clean up interrupt processing.
Raise unaligned data and destination exceptions.
Set TLBMISC fields correctly on exceptions.
Prevent writes to read-only or reserved control fields.
Use tcg_constant_tl().
Implement shadow register sets.
Implement external interrupt controller interface.
Implement vectored interrupt controller.
Enable semihosting tests for nios2-softmmu.
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# gpg: Signature made Tue 26 Apr 2022 11:16:04 AM PDT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>"
[ultimate]
* tag 'pull-nios2-20220426' of https://gitlab.com/rth7680/qemu: (68 commits)
tests/tcg/nios2: Add test-shadow-1
tests/tcg/nios2: Add semihosting multiarch tests
hw/nios2: Machine with a Vectored Interrupt Controller
hw/nios2: Move memory regions into Nios2Machine
hw/nios2: Introduce Nios2MachineState
hw/intc: Vectored Interrupt Controller (VIC)
linux-user/nios2: Handle various SIGILL exceptions
target/nios2: Advance pc when raising exceptions
target/nios2: Implement EIC interrupt processing
target/nios2: Update helper_eret for shadow registers
target/nios2: Implement rdprs, wrprs
target/nios2: Introduce shadow register sets
target/nios2: Implement Misaligned destination exception
target/nios2: Use tcg_gen_lookup_and_goto_ptr
target/nios2: Use gen_goto_tb for DISAS_TOO_MANY
target/nios2: Hoist set of is_jmp into gen_goto_tb
target/nios2: Create gen_jumpr
target/nios2: Enable unaligned traps for system mode
target/nios2: Drop CR_STATUS_EH from tb->flags
target/nios2: Introduce dest_gpr
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Compare: https://github.com/qemu/qemu/compare/eab18e4021b8...88d5814e6b02