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[Qemu-commits] [qemu/qemu] c8aeab: target/mips: Fix cycle counter timing


From: Peter Maydell
Subject: [Qemu-commits] [qemu/qemu] c8aeab: target/mips: Fix cycle counter timing calculations
Date: Wed, 09 Mar 2022 01:19:07 -0800

  Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: c8aeab3a09b51f828eaa50b994434dbfb3f626b8
      
https://github.com/qemu/qemu/commit/c8aeab3a09b51f828eaa50b994434dbfb3f626b8
  Author: Simon Burge <simonb@NetBSD.org>
  Date:   2022-03-07 (Mon, 07 Mar 2022)

  Changed paths:
    M target/mips/cpu.c

  Log Message:
  -----------
  target/mips: Fix cycle counter timing calculations

The cp0_count_ns value is calculated from the CP0_COUNT_RATE_DEFAULT
constant in target/mips/cpu.c.  The cycle counter resolution is defined
per-CPU in target/mips/cpu-defs.c.inc; use this value for calculating
cp0_count_ns.  Fixings timing problems on guest OSs for the 20Kc CPU
which has a CCRes of 1.

Signed-off-by: Simon Burge <simonb@NetBSD.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20211213135125.18378-1-simonb@NetBSD.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 5e0c126aada959f1474ab633931e22d92869c44f
      
https://github.com/qemu/qemu/commit/5e0c126aada959f1474ab633931e22d92869c44f
  Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
  Date:   2022-03-07 (Mon, 07 Mar 2022)

  Changed paths:
    M target/mips/cpu.c
    M target/mips/cpu.h
    M target/mips/internal.h

  Log Message:
  -----------
  target/mips: Remove duplicated MIPSCPU::cp0_count_rate

Since the previous commit 9ea89876f9d ("target/mips: Fix cycle
counter timing calculations"), MIPSCPU::cp0_count_rate is not
used anymore. We don't need it since it is already expressed
as mips_def_t::CCRes. Remove the duplicate and clean.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <>20211213102340.1847248-1-f4bug@amsat.org>


  Commit: c291635867a03c9217bd9610fe2a16d997932ec0
      
https://github.com/qemu/qemu/commit/c291635867a03c9217bd9610fe2a16d997932ec0
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-03-08 (Tue, 08 Mar 2022)

  Changed paths:
    M hw/mips/gt64xxx_pci.c

  Log Message:
  -----------
  hw/mips/gt64xxx_pci: Fix PCI IRQ levels to be preserved during migration

Based on commit e735b55a8c11dd455e31ccd4420e6c9485191d0c:

  piix_pci: eliminate PIIX3State::pci_irq_levels

  PIIX3State::pci_irq_levels are redundant which is already tracked by
  PCIBus layer. So eliminate them.

The IRQ levels in the PCIBus layer are already preserved during
migration. By reusing them and rather than having a redundant implementation
the bug is avoided in the first place.

Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220217101924.15347-2-shentey@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: a7fc9880514fcbc96c9825f040296fa59d7b3ccc
      
https://github.com/qemu/qemu/commit/a7fc9880514fcbc96c9825f040296fa59d7b3ccc
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-03-08 (Tue, 08 Mar 2022)

  Changed paths:
    M hw/isa/piix4.c
    M hw/mips/gt64xxx_pci.c
    M hw/mips/malta.c
    M include/hw/mips/mips.h

  Log Message:
  -----------
  malta: Move PCI interrupt handling from gt64xxx_pci to piix4

Handling PCI interrupts in piix4 increases cohesion and reduces differences
between piix4 and piix3.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220217101924.15347-3-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 933ab073be42a49f2e83ff18612ffc4940dfa55e
      
https://github.com/qemu/qemu/commit/933ab073be42a49f2e83ff18612ffc4940dfa55e
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-03-08 (Tue, 08 Mar 2022)

  Changed paths:
    M hw/isa/piix4.c

  Log Message:
  -----------
  hw/isa/piix4: Resolve redundant i8259[] attribute

This is a follow-up on patch "malta: Move PCI interrupt handling from
gt64xxx_pci to piix4" where i8259[] was moved from MaltaState to
PIIX4State to make the code movement more obvious. However, i8259[]
seems redundant to *isa, so remove it.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20220217101924.15347-4-shentey@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 19b82e3e44c8ed7a2e06eb2027f0a2808aa8142b
      
https://github.com/qemu/qemu/commit/19b82e3e44c8ed7a2e06eb2027f0a2808aa8142b
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-03-08 (Tue, 08 Mar 2022)

  Changed paths:
    M hw/isa/piix4.c

  Log Message:
  -----------
  hw/isa/piix4: Pass PIIX4State as opaque parameter for piix4_set_irq()

Passing PIIX4State rather than just the qemu_irq allows for resolving
the global piix4_dev variable.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20220217101924.15347-5-shentey@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 34e57845d078469be94fc108d5fd283f8787bd76
      
https://github.com/qemu/qemu/commit/34e57845d078469be94fc108d5fd283f8787bd76
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-03-08 (Tue, 08 Mar 2022)

  Changed paths:
    M hw/isa/piix4.c
    M include/hw/southbridge/piix.h

  Log Message:
  -----------
  hw/isa/piix4: Resolve global instance variable

Now that piix4_set_irq's opaque parameter references own PIIX4State,
piix4_dev becomes redundant.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20220217101924.15347-6-shentey@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 0e75526e4d7850d33feae69c21f503d795420e2d
      
https://github.com/qemu/qemu/commit/0e75526e4d7850d33feae69c21f503d795420e2d
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-03-08 (Tue, 08 Mar 2022)

  Changed paths:
    M hw/isa/piix4.c

  Log Message:
  -----------
  hw/isa/piix4: Replace some magic IRQ constants

This is a follow-up on patch "malta: Move PCI interrupt handling from
gt64xxx_pci to piix4". gt64xxx_pci used magic constants, and probably
didn't want to use piix4-specific constants. Now that the interrupt
handing resides in piix4, its constants can be used.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20220217101924.15347-7-shentey@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: aa85a461efd5dc2b44102228db373dc77df826d7
      
https://github.com/qemu/qemu/commit/aa85a461efd5dc2b44102228db373dc77df826d7
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-03-08 (Tue, 08 Mar 2022)

  Changed paths:
    M hw/mips/gt64xxx_pci.c
    M hw/mips/malta.c
    M include/hw/mips/mips.h

  Log Message:
  -----------
  hw/mips/gt64xxx_pci: Resolve gt64120_register()

Now that gt64120_register() lost its pic parameter, there is an
opportunity to remove it. gt64120_register() is old style by wrapping
qdev API, and the new style is to use qdev directly. So take the
opportunity and modernize the code.

Suggested-by: BALATON Zoltan <balaton@eik.bme.hu>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <20220217101924.15347-8-shentey@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 3b004a16540aa41f2aa6a1ceb0bf306716766914
      
https://github.com/qemu/qemu/commit/3b004a16540aa41f2aa6a1ceb0bf306716766914
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-03-08 (Tue, 08 Mar 2022)

  Changed paths:
    M hw/isa/piix4.c
    M hw/rtc/mc146818rtc.c
    M include/hw/rtc/mc146818rtc.h

  Log Message:
  -----------
  hw/rtc/mc146818rtc: QOM'ify IRQ number

Exposing the IRQ number as a QOM property not only allows it to be
configurable but also to be displayed in HMP:

Before:

(qemu) info qtree
       ...
          dev: mc146818rtc, id ""
            gpio-out "" 1
            base_year = 0 (0x0)
            lost_tick_policy = "discard"

After:

          dev: mc146818rtc, id ""
            gpio-out "" 1
            base_year = 0 (0x0)
            irq = 8 (0x8)
            lost_tick_policy = "discard"

The reason the IRQ number didn's show up before is that this device does not
call isa_init_irq().

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220301220037.76555-2-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220307134353.1950-9-philippe.mathieu.daude@gmail.com>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>


  Commit: e89d9fa385c040135a2bce94588dbbd2f7e8e55f
      
https://github.com/qemu/qemu/commit/e89d9fa385c040135a2bce94588dbbd2f7e8e55f
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-03-08 (Tue, 08 Mar 2022)

  Changed paths:
    M hw/rtc/m48t59-isa.c

  Log Message:
  -----------
  hw/rtc/m48t59-isa: QOM'ify IRQ number

Exposing the IRQ number as a QOM property not only allows it to be
configurable but also to be printed by standard QOM mechanisms. This allows
isabus_dev_print() to be retired eventually.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220301220037.76555-3-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220307134353.1950-10-philippe.mathieu.daude@gmail.com>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>


  Commit: b86ce7a66af5605a050ab1dec867ec6ef631887f
      
https://github.com/qemu/qemu/commit/b86ce7a66af5605a050ab1dec867ec6ef631887f
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-03-08 (Tue, 08 Mar 2022)

  Changed paths:
    M hw/input/pckbd.c

  Log Message:
  -----------
  hw/input/pckbd: QOM'ify IRQ numbers

Exposing the IRQ numbers as QOM properties not only allows them to be
configurable but also to be printed by standard QOM mechanisms. This
allows isabus_dev_print() to be retired eventually.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220301220037.76555-4-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220307134353.1950-11-philippe.mathieu.daude@gmail.com>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>


  Commit: 27b4cfb94fa1a5d21df92516ef8f34e253f13bbc
      
https://github.com/qemu/qemu/commit/27b4cfb94fa1a5d21df92516ef8f34e253f13bbc
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-03-08 (Tue, 08 Mar 2022)

  Changed paths:
    M hw/isa/isa-bus.c
    M tests/qemu-iotests/172.out

  Log Message:
  -----------
  hw/isa/isa-bus: Remove isabus_dev_print()

All isabus_dev_print() did was to print up to two IRQ numbers per
device. This is redundant if the IRQ numbers are present as QOM
properties (see e.g. the modified tests/qemu-iotests/172.out).

Now that the last devices relying on isabus_dev_print() had their IRQ
numbers QOM'ified, the contribution of this function ultimately became
redundant. Remove it.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220301220037.76555-5-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220307134353.1950-12-philippe.mathieu.daude@gmail.com>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>


  Commit: b2db46e4ca69d155790851cfb2b3a52b42ea6670
      
https://github.com/qemu/qemu/commit/b2db46e4ca69d155790851cfb2b3a52b42ea6670
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-03-08 (Tue, 08 Mar 2022)

  Changed paths:
    M hw/isa/isa-bus.c
    M include/hw/isa/isa.h

  Log Message:
  -----------
  hw/isa: Drop unused attributes from ISADevice

Now that the last users of ISADevice::isairq[] have been resolved during the
previous commits, it can be removed for good.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220301220037.76555-7-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220307134353.1950-13-philippe.mathieu.daude@gmail.com>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>


  Commit: 215caca6bf31913573ac0d5b729efb6ff82e1009
      
https://github.com/qemu/qemu/commit/215caca6bf31913573ac0d5b729efb6ff82e1009
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-03-08 (Tue, 08 Mar 2022)

  Changed paths:
    M hw/audio/cs4231a.c
    M hw/audio/gus.c
    M hw/audio/sb16.c
    M hw/block/fdc-isa.c
    M hw/char/parallel.c
    M hw/char/serial-isa.c
    M hw/ide/isa.c
    M hw/input/pckbd.c
    M hw/ipmi/isa_ipmi_bt.c
    M hw/ipmi/isa_ipmi_kcs.c
    M hw/isa/isa-bus.c
    M hw/isa/piix4.c
    M hw/net/ne2000-isa.c
    M hw/rtc/m48t59-isa.c
    M hw/tpm/tpm_tis_isa.c
    M include/hw/isa/isa.h

  Log Message:
  -----------
  hw/isa: Inline and remove one-line isa_init_irq()

isa_init_irq() has become a trivial one-line wrapper for isa_get_irq().
It can therefore be removed.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> (tpm_tis_isa)
Acked-by: Corey Minyard <cminyard@mvista.com> (isa_ipmi_bt, isa_ipmi_kcs)
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Message-Id: <20220301220037.76555-8-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220307134353.1950-14-philippe.mathieu.daude@gmail.com>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>


  Commit: bc401b97eb55d28b6002de48ff9f877abecb0dcd
      
https://github.com/qemu/qemu/commit/bc401b97eb55d28b6002de48ff9f877abecb0dcd
  Author: Cleber Rosa <crosa@redhat.com>
  Date:   2022-03-08 (Tue, 08 Mar 2022)

  Changed paths:
    M tests/avocado/linux_ssh_mips_malta.py

  Log Message:
  -----------
  tests/avocado/linux_ssh_mips_malta.py: add missing accel (tcg) tag

Being explicit about the accelerator used on these tests is a good
thing in itself, but it will also be used in the filtering rules
applied on "make check-avocado".

Signed-off-by: Cleber Rosa <crosa@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220225210156.2032055-6-crosa@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: f14ad81eed531adc9b3ae2af76cd52cfad5c9ae5
      
https://github.com/qemu/qemu/commit/f14ad81eed531adc9b3ae2af76cd52cfad5c9ae5
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2022-03-09 (Wed, 09 Mar 2022)

  Changed paths:
    M hw/audio/cs4231a.c
    M hw/audio/gus.c
    M hw/audio/sb16.c
    M hw/block/fdc-isa.c
    M hw/char/parallel.c
    M hw/char/serial-isa.c
    M hw/ide/isa.c
    M hw/input/pckbd.c
    M hw/ipmi/isa_ipmi_bt.c
    M hw/ipmi/isa_ipmi_kcs.c
    M hw/isa/isa-bus.c
    M hw/isa/piix4.c
    M hw/mips/gt64xxx_pci.c
    M hw/mips/malta.c
    M hw/net/ne2000-isa.c
    M hw/rtc/m48t59-isa.c
    M hw/rtc/mc146818rtc.c
    M hw/tpm/tpm_tis_isa.c
    M include/hw/isa/isa.h
    M include/hw/mips/mips.h
    M include/hw/rtc/mc146818rtc.h
    M include/hw/southbridge/piix.h
    M target/mips/cpu.c
    M target/mips/cpu.h
    M target/mips/internal.h
    M tests/avocado/linux_ssh_mips_malta.py
    M tests/qemu-iotests/172.out

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/philmd/tags/mips-20220308' into staging

MIPS patches queue

- Fix CP0 cycle counter timing
- Fix VMState of gt64120 IRQs
- Long due PIIX4 QOM cleanups
- ISA IRQ QOM'ification / cleanups

# gpg: Signature made Tue 08 Mar 2022 18:39:42 GMT
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" 
[unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* remotes/philmd/tags/mips-20220308:
  tests/avocado/linux_ssh_mips_malta.py: add missing accel (tcg) tag
  hw/isa: Inline and remove one-line isa_init_irq()
  hw/isa: Drop unused attributes from ISADevice
  hw/isa/isa-bus: Remove isabus_dev_print()
  hw/input/pckbd: QOM'ify IRQ numbers
  hw/rtc/m48t59-isa: QOM'ify IRQ number
  hw/rtc/mc146818rtc: QOM'ify IRQ number
  hw/mips/gt64xxx_pci: Resolve gt64120_register()
  hw/isa/piix4: Replace some magic IRQ constants
  hw/isa/piix4: Resolve global instance variable
  hw/isa/piix4: Pass PIIX4State as opaque parameter for piix4_set_irq()
  hw/isa/piix4: Resolve redundant i8259[] attribute
  malta: Move PCI interrupt handling from gt64xxx_pci to piix4
  hw/mips/gt64xxx_pci: Fix PCI IRQ levels to be preserved during migration
  target/mips: Remove duplicated MIPSCPU::cp0_count_rate
  target/mips: Fix cycle counter timing calculations

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Compare: https://github.com/qemu/qemu/compare/9f0369efb0f2...f14ad81eed53



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