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[Qemu-commits] [qemu/qemu] ced5cf: Use long endian options for ppc64


From: Peter Maydell
Subject: [Qemu-commits] [qemu/qemu] ced5cf: Use long endian options for ppc64
Date: Sun, 06 Mar 2022 03:57:45 -0800

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: ced5cfffeea22ef9003c95a83ce7c31e428702fb
      
https://github.com/qemu/qemu/commit/ced5cfffeea22ef9003c95a83ce7c31e428702fb
  Author: Miroslav Rezanina <mrezanin@redhat.com>
  Date:   2022-03-05 (Sat, 05 Mar 2022)

  Changed paths:
    M configure
    M tests/tcg/configure.sh

  Log Message:
  -----------
  Use long endian options for ppc64

GCC options pairs -mlittle/-mlittle-endian and -mbig/-mbig-endian are
equivalent on ppc64 architecture. However, Clang supports only long
version of the options.

Use longer form in configure to properly support both GCC and Clang
compiler. In addition, fix this issue in tcg test configure.

Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Message-Id: <20220131091714.4825-1-mrezanin@redhat.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: d21939ca8b71a7c5479866e61a40d7b7b28a1bc0
      
https://github.com/qemu/qemu/commit/d21939ca8b71a7c5479866e61a40d7b7b28a1bc0
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-05 (Sat, 05 Mar 2022)

  Changed paths:
    M tests/tcg/ppc64le/mtfsf.c

  Log Message:
  -----------
  tests/tcg/ppc64le: use inline asm instead of __builtin_mtfsf

LLVM/Clang does not support __builtin_mtfsf.

Acked-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220304165417.1981159-2-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 4e4b5a3eacc51e60cdf2dff585702e560d674268
      
https://github.com/qemu/qemu/commit/4e4b5a3eacc51e60cdf2dff585702e560d674268
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-05 (Sat, 05 Mar 2022)

  Changed paths:
    M target/ppc/fpu_helper.c

  Log Message:
  -----------
  target/ppc: change xs[n]madd[am]sp to use float64r32_muladd

Change VSX Scalar Multiply-Add/Subtract Type-A/M Single Precision
helpers to use float64r32_muladd. This method should correctly handle
all rounding modes, so the workaround for float_round_nearest_even can
be dropped.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220304165417.1981159-3-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 8189cb850728fd52cd98f5ee4640b5dc4e40239d
      
https://github.com/qemu/qemu/commit/8189cb850728fd52cd98f5ee4640b5dc4e40239d
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-05 (Sat, 05 Mar 2022)

  Changed paths:
    M tests/tcg/ppc64le/bcdsub.c

  Log Message:
  -----------
  tests/tcg/ppc64le: drop __int128 usage in bcdsub

Using __int128 with inline asm constraints like "v" generates incorrect
code when compiling with LLVM/Clang (e.g., only one doubleword of the
VSR is loaded). Instead, use a GPR pair to pass the 128-bits value and
load the VSR with mtvsrd/xxmrghd.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220304165417.1981159-4-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 63c2b746bebef3ec9de4f29d5beeea4ee809c892
      
https://github.com/qemu/qemu/commit/63c2b746bebef3ec9de4f29d5beeea4ee809c892
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-05 (Sat, 05 Mar 2022)

  Changed paths:
    M tests/tcg/ppc64le/bcdsub.c

  Log Message:
  -----------
  tests/tcg/ppc64le: emit bcdsub with .long when needed

Based on GCC docs[1], we use the '-mpower8-vector' flag at config-time
to detect the toolchain support to the bcdsub instruction. LLVM/Clang
supports this flag since version 3.6[2], but the instruction and related
builtins were only added in LLVM 14[3]. In the absence of other means to
detect this support at config-time, we resort to __has_builtin to
identify the presence of __builtin_bcdsub at compile-time. If the
builtin is not available, the instruction is emitted with a ".long".

[1] 
https://gcc.gnu.org/onlinedocs/gcc-8.3.0/gcc/PowerPC-AltiVec_002fVSX-Built-in-Functions.html
[2] 
https://github.com/llvm/llvm-project/commit/59eb767e11d4ffefb5f55409524e5c8416b2b0db
[3] 
https://github.com/llvm/llvm-project/commit/c933c2eb334660c131f4afc9d194fafb0cec0423

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220304165417.1981159-5-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 68455cf59394267363b090a1828b6c52994a4ee3
      
https://github.com/qemu/qemu/commit/68455cf59394267363b090a1828b6c52994a4ee3
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-05 (Sat, 05 Mar 2022)

  Changed paths:
    M tests/tcg/ppc64le/non_signalling_xscv.c

  Log Message:
  -----------
  tests/tcg/ppc64le: Use Altivec register names in clobber list

LLVM/Clang doesn't know the VSX registers when compiling with
-mabi=elfv1. Use only registers >= 32 and list them with their Altivec
name.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220304165417.1981159-6-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 0241ccb163b65ab568b667884bb99774b7c6fb42
      
https://github.com/qemu/qemu/commit/0241ccb163b65ab568b667884bb99774b7c6fb42
  Author: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
  Date:   2022-03-05 (Sat, 05 Mar 2022)

  Changed paths:
    M target/ppc/translate/vmx-impl.c.inc

  Log Message:
  -----------
  target/ppc: Fix vmul[eo]* instructions marked 2.07

Some ISA v2.03 Vector Multiply instructions marked to be ISA v2.07 only.
This patch fixes it.

Fixes: 80eca687c851 ("target/ppc: moved vector even and odd multiplication to 
decodetree")
Reported-by: Howard Spoelstra <hsp.cat7@gmail.com>
Suggested-by: Fabiano Rosas <farosas@linux.ibm.com>
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220304175156.2012315-2-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 9f264141ec13b69ecaa569190121da4098ec8647
      
https://github.com/qemu/qemu/commit/9f264141ec13b69ecaa569190121da4098ec8647
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-05 (Sat, 05 Mar 2022)

  Changed paths:
    M target/ppc/translate/vmx-impl.c.inc

  Log Message:
  -----------
  target/ppc: use ext32u and deposit in do_vx_vmulhw_i64

Fixes: 29e9dfcf755e ("target/ppc: vmulh* instructions without helpers")
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220304175156.2012315-3-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 5460ca8490ef9be293301e115490e273967011d3
      
https://github.com/qemu/qemu/commit/5460ca8490ef9be293301e115490e273967011d3
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-05 (Sat, 05 Mar 2022)

  Changed paths:
    M target/ppc/translate/vmx-impl.c.inc

  Log Message:
  -----------
  target/ppc: use extract/extract2 to create vrlqnm mask

Fixes: 4e272668406b ("target/ppc: implement vrlqnm")
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220304175156.2012315-4-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 4e4dd9e7caf47ce4fa60985614fcfa60f32729c3
      
https://github.com/qemu/qemu/commit/4e4dd9e7caf47ce4fa60985614fcfa60f32729c3
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-05 (Sat, 05 Mar 2022)

  Changed paths:
    M target/ppc/translate/vmx-impl.c.inc

  Log Message:
  -----------
  target/ppc: use andc in vrlqmi

Fixes: 7e5947df6e94 ("target/ppc: implement vrlqmi")
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220304175156.2012315-5-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 618574ddf79a44ed3f4be7e21cb398beb4bdd294
      
https://github.com/qemu/qemu/commit/618574ddf79a44ed3f4be7e21cb398beb4bdd294
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-05 (Sat, 05 Mar 2022)

  Changed paths:
    M target/ppc/int_helper.c
    M target/ppc/translate/vsx-impl.c.inc

  Log Message:
  -----------
  target/ppc: split XXGENPCV macros for readability

Fixes: b090f4f1e3c9 ("target/ppc: Implement xxgenpcv[bhwd]m instruction")
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220304175156.2012315-6-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: e1428e5b575ffb6e5066d1769b10bd4b47f6770b
      
https://github.com/qemu/qemu/commit/e1428e5b575ffb6e5066d1769b10bd4b47f6770b
  Author: Víctor Colombo <victor.colombo@eldorado.org.br>
  Date:   2022-03-05 (Sat, 05 Mar 2022)

  Changed paths:
    M target/ppc/fpu_helper.c

  Log Message:
  -----------
  target/ppc: Add missing helper_reset_fpstatus to VSX_MAX_MINC

Fixes: da499405aa ("target/ppc: Refactor VSX_MAX_MINC helper")
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220304175156.2012315-7-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: a9eb50376ffb27a3f348b0bccf70a34b26be2a3c
      
https://github.com/qemu/qemu/commit/a9eb50376ffb27a3f348b0bccf70a34b26be2a3c
  Author: Víctor Colombo <victor.colombo@eldorado.org.br>
  Date:   2022-03-05 (Sat, 05 Mar 2022)

  Changed paths:
    M target/ppc/fpu_helper.c

  Log Message:
  -----------
  target/ppc: Add missing helper_reset_fpstatus to helper_XVCVSPBF16

Fixes: 3909ff1fac ("target/ppc: Implement xvcvbf16spn and xvcvspbf16 
instructions")
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220304175156.2012315-8-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 9d662a6b22a0838a85c5432385f35db2488a33a5
      
https://github.com/qemu/qemu/commit/9d662a6b22a0838a85c5432385f35db2488a33a5
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2022-03-05 (Sat, 05 Mar 2022)

  Changed paths:
    M configure
    M target/ppc/fpu_helper.c
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.c.inc
    M target/ppc/translate/vsx-impl.c.inc
    M tests/tcg/configure.sh
    M tests/tcg/ppc64le/bcdsub.c
    M tests/tcg/ppc64le/mtfsf.c
    M tests/tcg/ppc64le/non_signalling_xscv.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/legoater/tags/pull-ppc-20220305' into 
staging

ppc-7.0 queue :

* Clang fixes
* Vector/VSX instruction batch fixes

# gpg: Signature made Sat 05 Mar 2022 08:18:06 GMT
# gpg:                using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B  0B60 51A3 43C7 CFFB ECA1

* remotes/legoater/tags/pull-ppc-20220305:
  target/ppc: Add missing helper_reset_fpstatus to helper_XVCVSPBF16
  target/ppc: Add missing helper_reset_fpstatus to VSX_MAX_MINC
  target/ppc: split XXGENPCV macros for readability
  target/ppc: use andc in vrlqmi
  target/ppc: use extract/extract2 to create vrlqnm mask
  target/ppc: use ext32u and deposit in do_vx_vmulhw_i64
  target/ppc: Fix vmul[eo]* instructions marked 2.07
  tests/tcg/ppc64le: Use Altivec register names in clobber list
  tests/tcg/ppc64le: emit bcdsub with .long when needed
  tests/tcg/ppc64le: drop __int128 usage in bcdsub
  target/ppc: change xs[n]madd[am]sp to use float64r32_muladd
  tests/tcg/ppc64le: use inline asm instead of __builtin_mtfsf
  Use long endian options for ppc64

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Compare: https://github.com/qemu/qemu/compare/2acf5e1d0e0f...9d662a6b22a0



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