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[Qemu-commits] [qemu/qemu] 632fc0: hw/ppc/pnv: Determine ns16550's IRQ n


From: Peter Maydell
Subject: [Qemu-commits] [qemu/qemu] 632fc0: hw/ppc/pnv: Determine ns16550's IRQ number from QO...
Date: Wed, 02 Mar 2022 04:44:23 -0800

  Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: 632fc0b3cee4d519e24af045edb180dc9eca3f69
      
https://github.com/qemu/qemu/commit/632fc0b3cee4d519e24af045edb180dc9eca3f69
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/ppc/pnv.c

  Log Message:
  -----------
  hw/ppc/pnv: Determine ns16550's IRQ number from QOM property

Determine the IRQ number in the same way as for pnv_dt_ipmi_bt(). This
resolves one usage of ISADevice::isairq[] which allows it to be removed
eventually.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220301220037.76555-6-shentey@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 6e7b96750359e17a09dcf8fb7fb5ce02447c3d69
      
https://github.com/qemu/qemu/commit/6e7b96750359e17a09dcf8fb7fb5ce02447c3d69
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/pci-host/pnv_phb4.c

  Log Message:
  -----------
  ppc/pnv: fix default PHB4 QOM hierarchy

Commit 3f4c369ea63e ("ppc/pnv: make PECs create and realize PHB4s")
changed phb4_pec code to create the default PHB4 objects in
pnv_pec_default_phb_realize(). In this process the stacks[] PEC array was
removed and each PHB4 object is tied together with its PEC via the
phb->pec pointer.

This change also broke the previous QOM hierarchy - the PHB4 objects are
being created and not being parented to their respective chips. This can
be verified by 'info pic' in a powernv9 domain with default settings.
pnv_chip_power9_pic_print_info() will fail to find the PHBs because
object_child_foreach_recursive() won't find any.

The solution is to set the parent chip and the parent bus, in the same
way done for user created PHB4 devices, for all PHB4 devices.

Fixes: 3f4c369ea63e ("ppc/pnv: make PECs create and realize PHB4s")
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220218202804.413157-1-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 33edcde7c8e0a94e93dc4fcc47b70e8f90891581
      
https://github.com/qemu/qemu/commit/33edcde7c8e0a94e93dc4fcc47b70e8f90891581
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/cpu_init.c
    M target/ppc/machine.c
    M target/ppc/meson.build
    M target/ppc/power8-pmu.h

  Log Message:
  -----------
  target/ppc: make power8-pmu.c CONFIG_TCG only

This is an exclusive TCG helper. Gating it with CONFIG_TCG and changing
meson.build accordingly will prevent problems --disable-tcg and
--disable-linux-user later on.

We're also changing the uses of !kvm_enabled() to tcg_enabled() to avoid
adding "defined(CONFIG_TCG)" ifdefs, since tcg_enabled() will be
defaulted to false with --disable-tcg and the block will always be
skipped.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220225101140.1054160-2-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: adc4eda10352ff235f29b528220cf2b6dad35759
      
https://github.com/qemu/qemu/commit/adc4eda10352ff235f29b528220cf2b6dad35759
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/power8-pmu.c

  Log Message:
  -----------
  target/ppc: finalize pre-EBB PMU logic

There are still PMU exclusive bits to handle in fire_PMC_interrupt()
before implementing the EBB support. Let's finalize it now to avoid
dealing with PMU and EBB logic at the same time in the next patches.

fire_PMC_interrupt() will fire an Performance Monitor alert depending on
MMCR0_PMAE. If we are required to freeze the timers (MMCR0_FCECE) we'll
also need to update summaries and delete the existing overflow timers.
In all cases we're going to update the cycle counters.

Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220225101140.1054160-3-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: cb76bbc43fda5b2540f438f849e7583293ab3569
      
https://github.com/qemu/qemu/commit/cb76bbc43fda5b2540f438f849e7583293ab3569
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/cpu.h
    M target/ppc/cpu_init.c
    M target/ppc/excp_helper.c

  Log Message:
  -----------
  target/ppc: add PPC_INTERRUPT_EBB and EBB exceptions

PPC_INTERRUPT_EBB is a new interrupt that will be used to deliver EBB
exceptions that had to be postponed because the thread wasn't in problem
state at the time the event-based branch was supposed to occur.

ISA 3.1 also defines two EBB exceptions: Performance Monitor EBB
exception and External EBB exception. They are being added as
POWERPC_EXCP_PERFM_EBB and POWERPC_EXCP_EXTERNAL_EBB.

PPC_INTERRUPT_EBB will check BESCR bits to see the EBB type that
occurred and trigger the appropriate exception. Both exceptions are
doing the same thing in this first implementation: clear BESCR_GE and
enter the branch with env->nip retrieved from SPR_EBBHR.

The checks being done by the interrupt code are msr_pr and BESCR_GE
states. All other checks (EBB facility check, BESCR_PME bit, specific
bits related to the event type) must be done beforehand.

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220225101140.1054160-4-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: d3412df20a321f2c4d98f5759cef2441206d5bd8
      
https://github.com/qemu/qemu/commit/d3412df20a321f2c4d98f5759cef2441206d5bd8
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/cpu.h
    M target/ppc/excp_helper.c
    M target/ppc/power8-pmu.c

  Log Message:
  -----------
  target/ppc: trigger PERFM EBBs from power8-pmu.c

This patch adds the EBB exception support that are triggered by
Performance Monitor alerts. This happens when a Performance Monitor
alert occurs and MMCR0_EBE, BESCR_PME and BESCR_GE are set.

fire_PMC_interrupt() will execute the raise_ebb_perfm_exception() helper
which will check for MMCR0_EBE, BESCR_PME and BESCR_GE bits. If all bits
are set, do_ebb() will attempt to trigger a PERFM EBB event.

If the EBB facility is enabled in both FSCR and HFSCR we consider that
the EBB is valid and set BESCR_PMEO. After that, if we're running in
problem state, fire a POWERPC_EXCP_PERM_EBB immediately. Otherwise we'll
queue a PPC_INTERRUPT_EBB.

Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225101140.1054160-5-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 19f0862dd8fa6510b2f5b3aff4859363602cd0cf
      
https://github.com/qemu/qemu/commit/19f0862dd8fa6510b2f5b3aff4859363602cd0cf
  Author: Luis Pires <luis.pires@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/translate.c
    M target/ppc/translate/vsx-impl.c.inc

  Log Message:
  -----------
  target/ppc: Introduce TRANS*FLAGS macros

New macros that add FLAGS and FLAGS2 checking were added for
both TRANS and TRANS64.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
[ferst: - TRANS_FLAGS2 instead of TRANS_FLAGS_E
        - Use the new macros in load/store vector insns ]
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-2-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 80eca687c8513a7e1611e0441abdd68b0c02a1d6
      
https://github.com/qemu/qemu/commit/80eca687c8513a7e1611e0441abdd68b0c02a1d6
  Author: Lucas Mateus Castro (alqotel) <lucas.castro@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.c.inc
    M target/ppc/translate/vmx-ops.c.inc
    M tcg/ppc/tcg-target.c.inc

  Log Message:
  -----------
  target/ppc: moved vector even and odd multiplication to decodetree

Moved the instructions vmulesb, vmulosb, vmuleub, vmuloub,
vmulesh, vmulosh, vmuleuh, vmulouh, vmulesw, vmulosw,
muleuw and vmulouw from legacy to decodetree. Implemented
the instructions vmulesd, vmulosd, vmuleud, vmuloud.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-3-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: d45da01428c71aeb2cba69d3d458bddfb8ccf530
      
https://github.com/qemu/qemu/commit/d45da01428c71aeb2cba69d3d458bddfb8ccf530
  Author: Lucas Mateus Castro (alqotel) <lucas.castro@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.c.inc
    M target/ppc/translate/vmx-ops.c.inc

  Log Message:
  -----------
  target/ppc: Moved vector multiply high and low to decodetree

Moved instructions vmulld, vmulhuw, vmulhsw, vmulhud and vmulhsd to
decodetree

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-4-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 29e9dfcf755e23db232d54b13ac79a41daf7e802
      
https://github.com/qemu/qemu/commit/29e9dfcf755e23db232d54b13ac79a41daf7e802
  Author: Lucas Mateus Castro (alqotel) <lucas.castro@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.c.inc

  Log Message:
  -----------
  target/ppc: vmulh* instructions without helpers

Changed vmulhuw, vmulhud, vmulhsw, vmulhsd to not
use helpers.

Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225210936.1749575-5-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 5476ef1d40e77b1b556b59a1788a7b1142a0368e
      
https://github.com/qemu/qemu/commit/5476ef1d40e77b1b556b59a1788a7b1142a0368e
  Author: Víctor Colombo <victor.colombo@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/vmx-impl.c.inc

  Log Message:
  -----------
  target/ppc: Implement vmsumcud instruction

Based on [1] by Lijun Pan <ljp@linux.ibm.com>, which was never merged
into master.

[1]: https://lists.gnu.org/archive/html/qemu-ppc/2020-07/msg00419.html

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-6-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 536f9876e25a805be228d9c215e0c4c8e217a39b
      
https://github.com/qemu/qemu/commit/536f9876e25a805be228d9c215e0c4c8e217a39b
  Author: Víctor Colombo <victor.colombo@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/vmx-impl.c.inc

  Log Message:
  -----------
  target/ppc: Implement vmsumudm instruction

Based on [1] by Lijun Pan <ljp@linux.ibm.com>, which was never merged
into master.

[1]: https://lists.gnu.org/archive/html/qemu-ppc/2020-07/msg00419.html

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-7-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 9bfe92135b4f637582df92e24768c2c9739dfb4b
      
https://github.com/qemu/qemu/commit/9bfe92135b4f637582df92e24768c2c9739dfb4b
  Author: Lucas Coutinho <lucas.coutinho@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.c.inc
    M target/ppc/translate/vmx-ops.c.inc

  Log Message:
  -----------
  target/ppc: Move vexts[bhw]2[wd] to decodetree

Move the following instructions to decodetree:
vextsb2w: Vector Extend Sign Byte To Word
vextsh2w: Vector Extend Sign Halfword To Word
vextsb2d: Vector Extend Sign Byte To Doubleword
vextsh2d: Vector Extend Sign Halfword To Doubleword
vextsw2d: Vector Extend Sign Word To Doubleword

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Lucas Coutinho <lucas.coutinho@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-8-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: acf43b34fbb52aa4b989fe0a07c6454b89347b3e
      
https://github.com/qemu/qemu/commit/acf43b34fbb52aa4b989fe0a07c6454b89347b3e
  Author: Lucas Coutinho <lucas.coutinho@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/vmx-impl.c.inc

  Log Message:
  -----------
  target/ppc: Implement vextsd2q

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Lucas Coutinho <lucas.coutinho@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-9-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 6a394290dfaa2fa9977bad3f4589139a853f04aa
      
https://github.com/qemu/qemu/commit/6a394290dfaa2fa9977bad3f4589139a853f04aa
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.c.inc
    M target/ppc/translate/vmx-ops.c.inc

  Log Message:
  -----------
  target/ppc: Move Vector Compare Equal/Not Equal/Greater Than to decodetree

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-10-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: eb936dc0746b5543b8a9601d19e33365220f2305
      
https://github.com/qemu/qemu/commit/eb936dc0746b5543b8a9601d19e33365220f2305
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.c.inc
    M target/ppc/translate/vmx-ops.c.inc

  Log Message:
  -----------
  target/ppc: Move Vector Compare Not Equal or Zero to decodetree

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-11-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 7b3da08e3c7877643e8b19170bccca88d920d11f
      
https://github.com/qemu/qemu/commit/7b3da08e3c7877643e8b19170bccca88d920d11f
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/vmx-impl.c.inc

  Log Message:
  -----------
  target/ppc: Implement Vector Compare Equal Quadword

Implement the following PowerISA v3.1 instructions:
vcmpequq: Vector Compare Equal Quadword

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-12-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 50449ae482ff2c6f985e6f60ebccdff96e64e1bd
      
https://github.com/qemu/qemu/commit/50449ae482ff2c6f985e6f60ebccdff96e64e1bd
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/vmx-impl.c.inc

  Log Message:
  -----------
  target/ppc: Implement Vector Compare Greater Than Quadword

Implement the following PowerISA v3.1 instructions:
vcmpgtsq: Vector Compare Greater Than Signed Quadword
vcmpgtuq: Vector Compare Greater Than Unsigned Quadword

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-13-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: b58f393198117730937983b826de849b220f58d3
      
https://github.com/qemu/qemu/commit/b58f393198117730937983b826de849b220f58d3
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/vmx-impl.c.inc

  Log Message:
  -----------
  target/ppc: Implement Vector Compare Quadword

Implement the following PowerISA v3.1 instructions:
vcmpsq: Vector Compare Signed Quadword
vcmpuq: Vector Compare Unsigned Quadword

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-14-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: fb5303cc05f09145c582af28b35d2663e3479d93
      
https://github.com/qemu/qemu/commit/fb5303cc05f09145c582af28b35d2663e3479d93
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.c.inc

  Log Message:
  -----------
  target/ppc: implement vstri[bh][lr]

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-15-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 08d512e1b972a8993b9ad1829d79804891e68483
      
https://github.com/qemu/qemu/commit/08d512e1b972a8993b9ad1829d79804891e68483
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/vmx-impl.c.inc

  Log Message:
  -----------
  target/ppc: implement vclrlb

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-16-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: fb1b56752fb5e043aef98d62abbd28c036440b07
      
https://github.com/qemu/qemu/commit/fb1b56752fb5e043aef98d62abbd28c036440b07
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/vmx-impl.c.inc

  Log Message:
  -----------
  target/ppc: implement vclrrb

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-17-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 95f1ee288be9437677a85dcf03fa67b6379c23e6
      
https://github.com/qemu/qemu/commit/95f1ee288be9437677a85dcf03fa67b6379c23e6
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/vmx-impl.c.inc

  Log Message:
  -----------
  target/ppc: implement vcntmb[bhwd]

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-18-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: f622ebe7a59f38cd80b53323b4cf2dc2b106f090
      
https://github.com/qemu/qemu/commit/f622ebe7a59f38cd80b53323b4cf2dc2b106f090
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/vmx-impl.c.inc

  Log Message:
  -----------
  target/ppc: implement vgnb

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-19-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 0f05200782872c7ebba26dc44d40a7c988e9399a
      
https://github.com/qemu/qemu/commit/0f05200782872c7ebba26dc44d40a7c988e9399a
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/vmx-impl.c.inc
    M target/ppc/translate/vmx-ops.c.inc

  Log Message:
  -----------
  target/ppc: move vs[lr][a][bhwd] to decodetree

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-20-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 3e39edb688a39cbeabce2ceff6395ddbfe69661a
      
https://github.com/qemu/qemu/commit/3e39edb688a39cbeabce2ceff6395ddbfe69661a
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/vmx-impl.c.inc

  Log Message:
  -----------
  target/ppc: implement vslq

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-21-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 946c3491c6d75b8acfe881a33fa5d6a83c4cf6c3
      
https://github.com/qemu/qemu/commit/946c3491c6d75b8acfe881a33fa5d6a83c4cf6c3
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/vmx-impl.c.inc

  Log Message:
  -----------
  target/ppc: implement vsrq

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-22-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 85085bbc63791ab6fa02441c53b86369d70e4f86
      
https://github.com/qemu/qemu/commit/85085bbc63791ab6fa02441c53b86369d70e4f86
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/vmx-impl.c.inc

  Log Message:
  -----------
  target/ppc: implement vsraq

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-23-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: df489ad69c5fac8f4032d5eff9cc9dcc717253c4
      
https://github.com/qemu/qemu/commit/df489ad69c5fac8f4032d5eff9cc9dcc717253c4
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/vmx-impl.c.inc
    M target/ppc/translate/vmx-ops.c.inc

  Log Message:
  -----------
  target/ppc: move vrl[bhwd] to decodetree

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-24-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 02c74f0efc337e3ffcaaaba2cde5c97738b9f025
      
https://github.com/qemu/qemu/commit/02c74f0efc337e3ffcaaaba2cde5c97738b9f025
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.c.inc
    M target/ppc/translate/vmx-ops.c.inc

  Log Message:
  -----------
  target/ppc: move vrl[bhwd]nm/vrl[bhwd]mi to decodetree

Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225210936.1749575-25-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: aa0f34ec3fc7f2f3a4c523ee8db8181b04f4efbe
      
https://github.com/qemu/qemu/commit/aa0f34ec3fc7f2f3a4c523ee8db8181b04f4efbe
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/vmx-impl.c.inc

  Log Message:
  -----------
  target/ppc: implement vrlq

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-26-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 4e272668406be09ac2fe3df4fbba7f9b57b968ec
      
https://github.com/qemu/qemu/commit/4e272668406be09ac2fe3df4fbba7f9b57b968ec
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/vmx-impl.c.inc

  Log Message:
  -----------
  target/ppc: implement vrlqnm

Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225210936.1749575-27-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 7e5947df6e94e1f1393d9f7a55b77f08e9dce670
      
https://github.com/qemu/qemu/commit/7e5947df6e94e1f1393d9f7a55b77f08e9dce670
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/vmx-impl.c.inc

  Log Message:
  -----------
  target/ppc: implement vrlqmi

Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225210936.1749575-28-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 28347fe2a7648fde2c4798679dcf57e43fb8f7fa
      
https://github.com/qemu/qemu/commit/28347fe2a7648fde2c4798679dcf57e43fb8f7fa
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.c.inc
    M target/ppc/translate/vmx-ops.c.inc

  Log Message:
  -----------
  target/ppc: Move vsel and vperm/vpermr to decodetree

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-29-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 43d55fc23d9019d113a22e8fd304c82b15bc7148
      
https://github.com/qemu/qemu/commit/43d55fc23d9019d113a22e8fd304c82b15bc7148
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/insn64.decode
    M target/ppc/translate/vsx-impl.c.inc
    M target/ppc/translate/vsx-ops.c.inc

  Log Message:
  -----------
  target/ppc: Move xxsel to decodetree

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-30-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 6a94bf196c9b9c26668a3aece8f19206bf2cf0ee
      
https://github.com/qemu/qemu/commit/6a94bf196c9b9c26668a3aece8f19206bf2cf0ee
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/fpu_helper.c
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/translate/vsx-impl.c.inc
    M target/ppc/translate/vsx-ops.c.inc

  Log Message:
  -----------
  target/ppc: move xxperm/xxpermr to decodetree

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-31-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: d31b2c1940629638e211d0c88e3206c74212ba3e
      
https://github.com/qemu/qemu/commit/d31b2c1940629638e211d0c88e3206c74212ba3e
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/vsx-impl.c.inc
    M target/ppc/translate/vsx-ops.c.inc

  Log Message:
  -----------
  target/ppc: Move xxpermdi to decodetree

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-32-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 41c2877f524c7715867c20b4936cf729ccc30996
      
https://github.com/qemu/qemu/commit/41c2877f524c7715867c20b4936cf729ccc30996
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/insn64.decode
    M target/ppc/int_helper.c
    M target/ppc/translate/vsx-impl.c.inc

  Log Message:
  -----------
  target/ppc: Implement xxpermx instruction

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-33-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 9620ae01b888e7d7ffd084782ac4edaa857413b2
      
https://github.com/qemu/qemu/commit/9620ae01b888e7d7ffd084782ac4edaa857413b2
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M include/tcg/tcg-op-gvec.h
    M tcg/tcg-op-gvec.c

  Log Message:
  -----------
  tcg/tcg-op-gvec.c: Introduce tcg_gen_gvec_4i

Following the implementation of tcg_gen_gvec_3i, add a four-vector and
immediate operand expansion method.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-34-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 1015fcab89b5344033fc31a5dc085410fd0f392b
      
https://github.com/qemu/qemu/commit/1015fcab89b5344033fc31a5dc085410fd0f392b
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/insn64.decode
    M target/ppc/int_helper.c
    M target/ppc/translate/vsx-impl.c.inc

  Log Message:
  -----------
  target/ppc: Implement xxeval

Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225210936.1749575-35-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: b090f4f1e3c9f0531e3250e3a9d0a2bcc5b53f7e
      
https://github.com/qemu/qemu/commit/b090f4f1e3c9f0531e3250e3a9d0a2bcc5b53f7e
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/int_helper.c
    M target/ppc/translate/vsx-impl.c.inc

  Log Message:
  -----------
  target/ppc: Implement xxgenpcv[bhwd]m instruction

Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225210936.1749575-36-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: e4318ab2e423c4caf9a88a4e99b5e234096b81a9
      
https://github.com/qemu/qemu/commit/e4318ab2e423c4caf9a88a4e99b5e234096b81a9
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/fpu_helper.c
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/translate/vsx-impl.c.inc
    M target/ppc/translate/vsx-ops.c.inc

  Log Message:
  -----------
  target/ppc: move xs[n]madd[am][ds]p/xs[n]msub[am][ds]p to decodetree

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-37-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 3bb1aed246d7b59ceee625a82628f7369d492a8f
      
https://github.com/qemu/qemu/commit/3bb1aed246d7b59ceee625a82628f7369d492a8f
  Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/fpu_helper.c
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/translate/vsx-impl.c.inc

  Log Message:
  -----------
  target/ppc: implement xs[n]maddqp[o]/xs[n]msubqp[o]

Implement the following PowerISA v3.0 instuctions:
xsmaddqp[o]: VSX Scalar Multiply-Add Quad-Precision [using round to Odd]
xsmsubqp[o]: VSX Scalar Multiply-Subtract Quad-Precision [using round
             to Odd]
xsnmaddqp[o]: VSX Scalar Negative Multiply-Add Quad-Precision [using
              round to Odd]
xsnmsubqp[o]: VSX Scalar Negative Multiply-Subtract Quad-Precision
              [using round to Odd]

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-38-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: d518239b06ca32a180f626e75349169d80b2b404
      
https://github.com/qemu/qemu/commit/d518239b06ca32a180f626e75349169d80b2b404
  Author: Víctor Colombo <victor.colombo@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/vsx-impl.c.inc

  Log Message:
  -----------
  target/ppc: Implement xvtlsbb instruction

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-39-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 0efbb8dc2f7d56e0e1735f8c532d10269451a3ee
      
https://github.com/qemu/qemu/commit/0efbb8dc2f7d56e0e1735f8c532d10269451a3ee
  Author: Víctor Colombo <victor.colombo@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/fpu_helper.c
    M target/ppc/helper.h
    M target/ppc/translate/vsx-impl.c.inc
    M target/ppc/translate/vsx-ops.c.inc

  Log Message:
  -----------
  target/ppc: Remove xscmpnedp instruction

xscmpnedp was added in ISA v3.0 but removed in v3.0B. This patch
removes this instruction as it was not in the final version of v3.0.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Acked-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-40-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 4439586a2b2e860b18999c933bf1763073a817ce
      
https://github.com/qemu/qemu/commit/4439586a2b2e860b18999c933bf1763073a817ce
  Author: Víctor Colombo <victor.colombo@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/fpu_helper.c

  Log Message:
  -----------
  target/ppc: Refactor VSX_SCALAR_CMP_DP

Refactor VSX_SCALAR_CMP_DP, changing its name to VSX_SCALAR_CMP and
prepare the helper to be used for quadword comparisons.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225210936.1749575-41-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 568e7c4d4581aa55ad603ee435a37519aeb4d62c
      
https://github.com/qemu/qemu/commit/568e7c4d4581aa55ad603ee435a37519aeb4d62c
  Author: Víctor Colombo <victor.colombo@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/fpu_helper.c
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/translate/vsx-impl.c.inc

  Log Message:
  -----------
  target/ppc: Implement xscmp{eq,ge,gt}qp

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-42-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 72d24354cac94a31e1f37a264d0a32feec198f48
      
https://github.com/qemu/qemu/commit/72d24354cac94a31e1f37a264d0a32feec198f48
  Author: Víctor Colombo <victor.colombo@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/fpu_helper.c
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/translate/vsx-impl.c.inc
    M target/ppc/translate/vsx-ops.c.inc

  Log Message:
  -----------
  target/ppc: Move xscmp{eq,ge,gt}dp to decodetree

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-43-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 5307df8f3a3004a0b4b9b6923309c7b35d710ff7
      
https://github.com/qemu/qemu/commit/5307df8f3a3004a0b4b9b6923309c7b35d710ff7
  Author: Víctor Colombo <victor.colombo@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/fpu_helper.c
    M target/ppc/helper.h
    M target/ppc/translate/vsx-impl.c.inc

  Log Message:
  -----------
  target/ppc: Move xs{max, min}[cj]dp to use do_helper_XX3

Also, fixes these instructions not being capitalized.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-44-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: da499405aa8af8e6568330f1d7c6c80d6dfeaac8
      
https://github.com/qemu/qemu/commit/da499405aa8af8e6568330f1d7c6c80d6dfeaac8
  Author: Víctor Colombo <victor.colombo@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/fpu_helper.c

  Log Message:
  -----------
  target/ppc: Refactor VSX_MAX_MINC helper

Refactor xs{max,min}cdp VSX_MAX_MINC helper to prepare for
xs{max,min}cqp implementation.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-45-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 7b8d6e3e7991c7dbeb794a1034f11ca1402044b6
      
https://github.com/qemu/qemu/commit/7b8d6e3e7991c7dbeb794a1034f11ca1402044b6
  Author: Víctor Colombo <victor.colombo@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/fpu_helper.c
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/translate/vsx-impl.c.inc

  Log Message:
  -----------
  target/ppc: Implement xs{max,min}cqp

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-46-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 3909ff1facd7d02a879d1a9992ab6dc1efbc927c
      
https://github.com/qemu/qemu/commit/3909ff1facd7d02a879d1a9992ab6dc1efbc927c
  Author: Víctor Colombo <victor.colombo@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/fpu_helper.c
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/translate/vsx-impl.c.inc

  Log Message:
  -----------
  target/ppc: Implement xvcvbf16spn and xvcvspbf16 instructions

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225210936.1749575-47-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 7eec8cbb1b0662e3bead03d48ee5f56c02cbed06
      
https://github.com/qemu/qemu/commit/7eec8cbb1b0662e3bead03d48ee5f56c02cbed06
  Author: Leandro Lupori <leandro.lupori@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/insn64.decode
    M target/ppc/translate.c
    M target/ppc/translate/vsx-impl.c.inc

  Log Message:
  -----------
  target/ppc: implement plxsd/pstxsd

Implement instructions plxsd/pstxsd and port lxsd/stxsd to decode
tree.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Leandro Lupori <leandro.lupori@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-48-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 20e2d04e66cd69f6ffb1ca9509b51a7668953459
      
https://github.com/qemu/qemu/commit/20e2d04e66cd69f6ffb1ca9509b51a7668953459
  Author: Leandro Lupori <leandro.lupori@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/insn64.decode
    M target/ppc/translate.c
    M target/ppc/translate/vsx-impl.c.inc

  Log Message:
  -----------
  target/ppc: implement plxssp/pstxssp

Implement instructions plxssp/pstxssp and port lxssp/stxssp to
decode tree.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Leandro Lupori <leandro.lupori@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-49-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 604d00c76fdd7dfcaa2bf8515615ad129a4fdcc4
      
https://github.com/qemu/qemu/commit/604d00c76fdd7dfcaa2bf8515615ad129a4fdcc4
  Author: Lucas Coutinho <lucas.coutinho@eldorado.org.br>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M target/ppc/insn32.decode
    M target/ppc/translate/vsx-impl.c.inc

  Log Message:
  -----------
  target/ppc: implement lxvr[bhwd]/stxvr[bhwd]x

Implement the following PowerISA v3.1 instuctions:
lxvrbx: Load VSX Vector Rightmost Byte Indexed X-form
lxvrhx: Load VSX Vector Rightmost Halfword Indexed X-form
lxvrwx: Load VSX Vector Rightmost Word Indexed X-form
lxvrdx: Load VSX Vector Rightmost Doubleword Indexed X-form

stxvrbx: Store VSX Vector Rightmost Byte Indexed X-form
stxvrhx: Store VSX Vector Rightmost Halfword Indexed X-form
stxvrwx: Store VSX Vector Rightmost Word Indexed X-form
stxvrdx: Store VSX Vector Rightmost Doubleword Indexed X-form

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Lucas Coutinho <lucas.coutinho@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-50-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: f8a233dedf2560d7d592dab347ddf2a58e8a98db
      
https://github.com/qemu/qemu/commit/f8a233dedf2560d7d592dab347ddf2a58e8a98db
  Author: Cédric Le Goater <clg@kaod.org>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/intc/meson.build
    A hw/intc/xive2.c
    A include/hw/ppc/xive2.h
    A include/hw/ppc/xive2_regs.h

  Log Message:
  -----------
  ppc/xive2: Introduce a XIVE2 core framework

The XIVE2 interrupt controller of the POWER10 processor as the same
logic as on POWER9 but its SW interface has been largely reworked. The
interrupt controller has a new register interface, different BARs,
extra VSDs. These will be described when we add the device model for
the baremetal machine.

The XIVE internal structures for the EAS, END, NVT have different
layouts which is a problem for the current core XIVE framework. To
avoid adding too much complexity in the XIVE models, a new XIVE2 core
framework is introduced. It duplicates the models which are closely
linked to the XIVE internal structures : Xive2Router and
Xive2ENDSource and reuses the XiveSource, XivePresenter, XiveTCTX
models, as they are more generic.

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 09a67f3d0e2cb9e66b2ba438de09789527ccb9fe
      
https://github.com/qemu/qemu/commit/09a67f3d0e2cb9e66b2ba438de09789527ccb9fe
  Author: Cédric Le Goater <clg@kaod.org>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/intc/xive2.c
    M include/hw/ppc/xive2.h

  Log Message:
  -----------
  ppc/xive2: Introduce a presenter matching routine

The VP space is larger in XIVE2 (P10), 24 bits instead of 19bits on
XIVE (P9), and the CAM line can use a 7bits or 8bits thread id.

For now, we only use 7bits thread ids, same as P9, but because of the
change of the size of the VP space, the CAM matching routine is
different between P9 and P10. It is easier to duplicate the whole
routine than to add extra handlers in xive_presenter_tctx_match() used
for P9.

We might come with a better solution later on, after we have added
some more support for the XIVE2 controller.

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: da71b7e3ed454bd9200367e09bf75160f8f097a9
      
https://github.com/qemu/qemu/commit/da71b7e3ed454bd9200367e09bf75160f8f097a9
  Author: Cédric Le Goater <clg@kaod.org>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/intc/meson.build
    A hw/intc/pnv_xive2.c
    A hw/intc/pnv_xive2_regs.h
    M hw/ppc/pnv.c
    M include/hw/ppc/pnv.h
    M include/hw/ppc/pnv_xive.h
    M include/hw/ppc/pnv_xscom.h

  Log Message:
  -----------
  ppc/pnv: Add a XIVE2 controller to the POWER10 chip

The XIVE2 interrupt controller of the POWER10 processor follows the
same logic than on POWER9 but the HW interface has been largely
reviewed.  It has a new register interface, different BARs, extra
VSDs, new layout for the XIVE2 structures, and a set of new features
which are described below.

This is a model of the POWER10 XIVE2 interrupt controller for the
PowerNV machine. It focuses primarily on the needs of the skiboot
firmware but some initial hypervisor support is implemented for KVM
use (escalation).

Support for new features will be implemented in time and will require
new support from the OS.

* XIVE2 BARS

The interrupt controller BARs have a different layout outlined below.
Each sub-engine has now own its range and the indirect TIMA access was
replaced with a set of pages, one per CPU, under the IC BAR:

  - IC BAR (Interrupt Controller)
    . 4 pages, one per sub-engine
    . 128 indirect TIMA pages
  - TM BAR (Thread Interrupt Management Area)
    . 4 pages
  - ESB BAR (ESB pages for IPIs)
    . up to 1TB
  - END BAR (ESB pages for ENDs)
    . up to 2TB
  - NVC BAR (Notification Virtual Crowd)
    . up to 128
  - NVPG BAR (Notification Virtual Process and Group)
    . up to 1TB
  - Direct mapped Thread Context Area (reads & writes)

OPAL does not use the grouping and crowd capability.

* Virtual Structure Tables

XIVE2 adds new tables types and also changes the field layout of the END
and NVP Virtualization Structure Descriptors.

  - EAS
  - END new layout
  - NVT was splitted in :
    . NVP (Processor), 32B
    . NVG (Group), 32B
    . NVC (Crowd == P9 block group) 32B
  - IC for remote configuration
  - SYNC for cache injection
  - ERQ for event input queue

The setup is slighly different on XIVE2 because the indexing has changed
for some of the tables, block ID or the chip topology ID can be used.

* XIVE2 features

SCOM and MMIO registers have a new layout and XIVE2 adds a new global
capability and configuration registers.

The lowlevel hardware offers a set of new features among which :

  - a configurable number of priorities : 1 - 8
  - StoreEOI with load-after-store ordering is activated by default
  - Gen2 TIMA layout
  - A P9-compat mode, or Gen1, TIMA toggle bit for SW compatibility
  - increase to 24bit for VP number

Other features will have some impact on the Hypervisor and guest OS
when activated, but this is not required for initial support of the
controller.

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 8bf682a349258c3d4a4a4d4fa99ecf7045cf4608
      
https://github.com/qemu/qemu/commit/8bf682a349258c3d4a4a4d4fa99ecf7045cf4608
  Author: Cédric Le Goater <clg@kaod.org>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/ppc/pnv.c
    M hw/ppc/pnv_occ.c
    M include/hw/ppc/pnv.h
    M include/hw/ppc/pnv_occ.h
    M include/hw/ppc/pnv_xscom.h

  Log Message:
  -----------
  ppc/pnv: Add a OCC model for POWER10

Our OCC model is very mininal and POWER10 can simply reuse the OCC
model we introduced for POWER9.

Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: ae4c68e366d68058cd50318d1716fb59c63f4907
      
https://github.com/qemu/qemu/commit/ae4c68e366d68058cd50318d1716fb59c63f4907
  Author: Cédric Le Goater <clg@kaod.org>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/ppc/pnv.c
    M include/hw/ppc/pnv.h

  Log Message:
  -----------
  ppc/pnv: Add POWER10 quads

and use a pnv_chip_power10_quad_realize() helper to avoid code
duplication with P9. This still needs some refinements on the XSCOM
registers handling in PnvQuad.

Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 623575e16cd55082ca36b57114a774f146b2c95b
      
https://github.com/qemu/qemu/commit/623575e16cd55082ca36b57114a774f146b2c95b
  Author: Cédric Le Goater <clg@kaod.org>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/pci-host/pnv_phb4.c
    M hw/pci-host/pnv_phb4_pec.c
    M hw/ppc/pnv.c
    M include/hw/pci-host/pnv_phb4.h
    M include/hw/ppc/pnv.h
    M include/hw/ppc/pnv_xscom.h

  Log Message:
  -----------
  ppc/pnv: Add model for POWER10 PHB5 PCIe Host bridge

PHB4 and PHB5 are very similar. Use the PHB4 models with some minor
adjustements in a subclass for P10.

Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 924996766b428dfe266df6778a7114e0c9f609ca
      
https://github.com/qemu/qemu/commit/924996766b428dfe266df6778a7114e0c9f609ca
  Author: Cédric Le Goater <clg@kaod.org>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/ppc/pnv.c
    M hw/ppc/pnv_homer.c
    M include/hw/ppc/pnv.h
    M include/hw/ppc/pnv_homer.h
    M include/hw/ppc/pnv_xscom.h

  Log Message:
  -----------
  ppc/pnv: Add a HOMER model to POWER10

Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 24c8fa968a6d8fc9a971c382c0c58f0e751dbe36
      
https://github.com/qemu/qemu/commit/24c8fa968a6d8fc9a971c382c0c58f0e751dbe36
  Author: Cédric Le Goater <clg@kaod.org>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/ppc/pnv.c
    M hw/ppc/pnv_psi.c

  Log Message:
  -----------
  ppc/psi: Add support for StoreEOI and 64k ESB pages (POWER10)

POWER10 adds support for StoreEOI operation and 64K ESB pages on PSIHB
to be consistent with the other interrupt sources of the system.

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: aadf13abaad43dd1f8b6113e516649578af63775
      
https://github.com/qemu/qemu/commit/aadf13abaad43dd1f8b6113e516649578af63775
  Author: Cédric Le Goater <clg@kaod.org>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/intc/xive.c
    M hw/intc/xive2.c
    M include/hw/ppc/xive.h

  Log Message:
  -----------
  ppc/xive2: Add support for notification injection on ESB pages

This is an internal offset used to inject triggers when the PQ state
bits are not controlled locally. Such as for LSIs when the PHB5 are
using the Address-Based Interrupt Trigger mode and on the END.

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 0aa2612a01f233a4a25fb89e8362baf6cf896be6
      
https://github.com/qemu/qemu/commit/0aa2612a01f233a4a25fb89e8362baf6cf896be6
  Author: Cédric Le Goater <clg@kaod.org>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/intc/pnv_xive.c
    M hw/intc/pnv_xive2.c
    M hw/intc/spapr_xive.c
    M hw/intc/xive.c
    M hw/intc/xive2.c
    M hw/pci-host/pnv_phb4.c
    M hw/ppc/pnv_psi.c
    M include/hw/ppc/xive.h
    M include/hw/ppc/xive2.h

  Log Message:
  -----------
  ppc/xive: Add support for PQ state bits offload

The trigger message coming from a HW source contains a special bit
informing the XIVE interrupt controller that the PQ bits have been
checked at the source or not. Depending on the value, the IC can
perform the check and the state transition locally using its own PQ
state bits.

The following changes add new accessors to the XiveRouter required to
query and update the PQ state bits. This only applies to the PowerNV
machine. sPAPR accessors are provided but the pSeries machine should
not be concerned by such complex configuration for the moment.

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: c6b8cc370d2ccb1a6e89df9329f2ef8f77d1d664
      
https://github.com/qemu/qemu/commit/c6b8cc370d2ccb1a6e89df9329f2ef8f77d1d664
  Author: Cédric Le Goater <clg@kaod.org>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/intc/xive.c
    M hw/pci-host/pnv_phb4.c
    M include/hw/pci-host/pnv_phb4_regs.h
    M include/hw/ppc/xive.h

  Log Message:
  -----------
  ppc/pnv: Add support for PQ offload on PHB5

The PQ_disable configuration bit disables the check done on the PQ
state bits when processing new MSI interrupts. When bit 9 is enabled,
the PHB forwards any MSI trigger to the XIVE interrupt controller
without checking the PQ state bits. The XIVE IC knows from the trigger
message that the PQ bits have not been checked and performs the check
locally.

This configuration bit only applies to MSIs and LSIs are still checked
on the PHB to handle the assertion level.

PQ_disable enablement is a requirement for StoreEOI.

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 34b0696be443e123d2d5225613c4604c66eb7a64
      
https://github.com/qemu/qemu/commit/34b0696be443e123d2d5225613c4604c66eb7a64
  Author: Cédric Le Goater <clg@kaod.org>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/pci-host/pnv_phb4.c
    M hw/pci-host/trace-events
    M include/hw/pci-host/pnv_phb4_regs.h

  Log Message:
  -----------
  ppc/pnv: Add support for PHB5 "Address-based trigger" mode

When the Address-Based Interrupt Trigger mode is activated, the PHB
maps the interrupt source number into the interrupt command address.
The PHB directly triggers the IC ESB page of the interrupt number and
not the notify page of the IC anymore.

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 707ea7ab4d55e0d907f72280eb2e4d376efeddf7
      
https://github.com/qemu/qemu/commit/707ea7ab4d55e0d907f72280eb2e4d376efeddf7
  Author: Cédric Le Goater <clg@kaod.org>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/intc/pnv_xive2.c
    M hw/intc/pnv_xive2_regs.h

  Log Message:
  -----------
  pnv/xive2: Introduce new capability bits

These bits control the availability of interrupt features : StoreEOI,
PHB PQ_disable, PHB Address-Based Trigger and the overall XIVE
exploitation mode. These bits can be set at early boot time of the
system to activate/deactivate a feature for testing purposes. The
default value should be '1'.

The 'XIVE exploitation mode' bit is a software bit that skiboot could
use to disable the XIVE OS interface and propose a P8 style XICS
interface instead. There are no plans for that for the moment.

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 95d729e2bc5b46d40e71971043e03d9cc9503e9a
      
https://github.com/qemu/qemu/commit/95d729e2bc5b46d40e71971043e03d9cc9503e9a
  Author: Cédric Le Goater <clg@kaod.org>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/intc/pnv_xive2.c
    M hw/intc/xive2.c
    M include/hw/ppc/xive2.h

  Log Message:
  -----------
  ppc/pnv: add XIVE Gen2 TIMA support

Only the CAM line updates done by the hypervisor are specific to
POWER10. Instead of duplicating the TM ops table, we handle these
commands locally under the PowerNV XIVE2 model.

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 747ffe28cad7129e1d326d943228fdcbe109530d
      
https://github.com/qemu/qemu/commit/747ffe28cad7129e1d326d943228fdcbe109530d
  Author: Cédric Le Goater <clg@kaod.org>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/intc/pnv_xive2.c
    M hw/intc/pnv_xive2_regs.h

  Log Message:
  -----------
  pnv/xive2: Add support XIVE2 P9-compat mode (or Gen1)

The thread interrupt management area (TIMA) is a set of pages mapped
in the Hypervisor and in the guest OS address space giving access to
the interrupt thread context registers for interrupt management, ACK,
EOI, CPPR, etc.

XIVE2 changes slightly the TIMA layout with extra bits for the new
features, larger CAM lines and the controller provides configuration
switches for backward compatibility. This is called the XIVE2
P9-compat mode, of Gen1 TIMA. It impacts the layout of the TIMA and
the availability of the internal features associated with it,
Automatic Save & Restore for instance. Using a P9 layout also means
setting the controller in such a mode at init time.

As the OPAL driver initializes the XIVE2 controller with a XIVE2/P10
TIMA directly, the XIVE2 model only has a simple support for the
compat mode in the OS TIMA.

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: e16032b8dc56332096111ce02741a03c88c7be43
      
https://github.com/qemu/qemu/commit/e16032b8dc56332096111ce02741a03c88c7be43
  Author: Cédric Le Goater <clg@kaod.org>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/intc/pnv_xive2.c
    M hw/intc/xive2.c
    M include/hw/ppc/xive2.h

  Log Message:
  -----------
  xive2: Add a get_config() handler for the router configuration

Add GEN1 config even if we don't use it yet in the core framework.

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 835806f1f97a840d27e9c2e24c678af6e12b2dc4
      
https://github.com/qemu/qemu/commit/835806f1f97a840d27e9c2e24c678af6e12b2dc4
  Author: Cédric Le Goater <clg@kaod.org>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/intc/pnv_xive2.c
    M hw/intc/pnv_xive2_regs.h
    M hw/intc/xive2.c
    M include/hw/ppc/xive2.h
    M include/hw/ppc/xive2_regs.h

  Log Message:
  -----------
  pnv/xive2: Add support for automatic save&restore

The XIVE interrupt controller on P10 can automatically save and
restore the state of the interrupt registers under the internal NVP
structure representing the VCPU. This saves a costly store/load in
guest entries and exits.

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 09a7e60c6411c7c390aa392672fbdbef5e5e2084
      
https://github.com/qemu/qemu/commit/09a7e60c6411c7c390aa392672fbdbef5e5e2084
  Author: Cédric Le Goater <clg@kaod.org>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/intc/pnv_xive2.c
    M hw/intc/xive2.c
    M include/hw/ppc/xive2.h

  Log Message:
  -----------
  pnv/xive2: Add support for 8bits thread id

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: aebb9b9cb2738c2a0b21c7315822fac7d9bb5004
      
https://github.com/qemu/qemu/commit/aebb9b9cb2738c2a0b21c7315822fac7d9bb5004
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/ppc/spapr.c

  Log Message:
  -----------
  hw/ppc/spapr.c: use g_autofree in spapr_dt_chosen()

Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220228175004.8862-2-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 5f2b96b38e125f624c5dc0bf84de0bbc2efb0523
      
https://github.com/qemu/qemu/commit/5f2b96b38e125f624c5dc0bf84de0bbc2efb0523
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/ppc/spapr.c

  Log Message:
  -----------
  hw/ppc/spapr.c: fail early if no firmware found in machine_init()

The firmware check consists on a file search (qemu_find_file) and load
it via load_imag_targphys(). This validation is not dependent on any
other machine state but it currently being done at the end of
spapr_machine_init(). This means that we can do a lot of stuff and end
up failing at the end for something that we can verify right out of the
gate.

Move this validation to the start of spapr_machine_init() to fail
earlier.  While we're at it, use g_autofree in the 'filename' pointer.

Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220228175004.8862-3-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: ea8464fa27fe5acf09b90a7b9a496d3a5e0e2f21
      
https://github.com/qemu/qemu/commit/ea8464fa27fe5acf09b90a7b9a496d3a5e0e2f21
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/ppc/spapr_caps.c

  Log Message:
  -----------
  hw/ppc/spapr_caps.c: use g_autofree in spapr_cap_set_string()

And get rid of the 'out' label since it's now unused.

Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220228175004.8862-4-danielhb413@gmail.com>
[ clg: Fixed typo in commit log ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: bc940c46c987de51debf44efd9c219ea566c84ae
      
https://github.com/qemu/qemu/commit/bc940c46c987de51debf44efd9c219ea566c84ae
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/ppc/spapr_caps.c

  Log Message:
  -----------
  hw/ppc/spapr_caps.c: use g_autofree in spapr_cap_get_string()

Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220228175004.8862-5-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 37d1953448d58ac9313d4702913947f76c369338
      
https://github.com/qemu/qemu/commit/37d1953448d58ac9313d4702913947f76c369338
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/ppc/spapr_caps.c

  Log Message:
  -----------
  hw/ppc/spapr_caps.c: use g_autofree in spapr_caps_add_properties()

Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220228175004.8862-6-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 75610acfd3cb9260c0f2fe45492f81d637bfd62c
      
https://github.com/qemu/qemu/commit/75610acfd3cb9260c0f2fe45492f81d637bfd62c
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/ppc/spapr_drc.c

  Log Message:
  -----------
  hw/ppc/spapr_drc.c: use g_auto in spapr_dt_drc()

Use g_autoptr() with GArray* and GString* pointers to avoid calling
g_free() and the need for the 'out' label.

'drc_name' can also be g_autofreed to avoid a g_free() call at the end
of the while() loop.

Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220228175004.8862-7-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 37deca77a6dbcd8bfca6e08af7c39e021ca93b88
      
https://github.com/qemu/qemu/commit/37deca77a6dbcd8bfca6e08af7c39e021ca93b88
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/ppc/spapr_drc.c

  Log Message:
  -----------
  hw/ppc/spapr_drc.c: use g_autofree in drc_realize()

Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220228175004.8862-8-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: ef2ece4a87f430067b2a6356afc3e32c2beafa97
      
https://github.com/qemu/qemu/commit/ef2ece4a87f430067b2a6356afc3e32c2beafa97
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/ppc/spapr_drc.c

  Log Message:
  -----------
  hw/ppc/spapr_drc.c: use g_autofree in drc_unrealize()

Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220228175004.8862-9-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 7614114e903cf6fe485772c3432ccc36568e8ab3
      
https://github.com/qemu/qemu/commit/7614114e903cf6fe485772c3432ccc36568e8ab3
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/ppc/spapr_drc.c

  Log Message:
  -----------
  hw/ppc/spapr_drc.c: use g_autofree in spapr_dr_connector_new()

Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220228175004.8862-10-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 5436eee1aceff14e301fce6d2385cc253a3b6473
      
https://github.com/qemu/qemu/commit/5436eee1aceff14e301fce6d2385cc253a3b6473
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/ppc/spapr_drc.c

  Log Message:
  -----------
  hw/ppc/spapr_drc.c: use g_autofree in spapr_drc_by_index()

Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220228175004.8862-11-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 1628293727f1872d1add9dc53897b2b262ed5fe9
      
https://github.com/qemu/qemu/commit/1628293727f1872d1add9dc53897b2b262ed5fe9
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/ppc/spapr_numa.c

  Log Message:
  -----------
  hw/ppc/spapr_numa.c: simplify spapr_numa_write_assoc_lookup_arrays()

We can get the job done in spapr_numa_write_assoc_lookup_arrays() a bit
cleaner:

- 'cur_index = int_buf = g_malloc0(..)' is doing a g_malloc0() in the
'int_buf' pointer and making 'cur_index' point to 'int_buf' all in a
single line. No problem with that, but splitting into 2 lines is clearer
to follow

- use g_autofree in 'int_buf' to avoid a g_free() call later on

- 'buf_len' is only being used to store the size of 'int_buf' malloc.
Remove the var and just use the value in g_malloc0() directly

- remove the 'ret' var and just return the result of fdt_setprop()

Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220228175004.8862-12-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: ecccc4bed785ca9086697439f0d8ff24822a9e94
      
https://github.com/qemu/qemu/commit/ecccc4bed785ca9086697439f0d8ff24822a9e94
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/ppc/spapr_pci_nvlink2.c

  Log Message:
  -----------
  spapr_pci_nvlink2.c: use g_autofree in spapr_phb_nvgpu_ram_populate_dt()

Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220228175004.8862-13-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 3a1229148d3176bb3dbb1b0054da28400ab17694
      
https://github.com/qemu/qemu/commit/3a1229148d3176bb3dbb1b0054da28400ab17694
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/ppc/spapr_rtas.c

  Log Message:
  -----------
  hw/ppc/spapr_rtas.c: use g_autofree in rtas_ibm_get_system_parameter()

Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220228175004.8862-14-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 169518430562b454a1531610d2711c6b920929f6
      
https://github.com/qemu/qemu/commit/169518430562b454a1531610d2711c6b920929f6
  Author: Daniel Henrique Barboza <danielhb413@gmail.com>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/ppc/spapr_vio.c

  Log Message:
  -----------
  hw/ppc/spapr_vio.c: use g_autofree in spapr_dt_vdevice()

And return the result of g_strdup_printf() directly instead of using the
'path' var.

Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220228175004.8862-15-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 64ada298b98a51eb2512607f6e6180cb330c47b1
      
https://github.com/qemu/qemu/commit/64ada298b98a51eb2512607f6e6180cb330c47b1
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2022-03-02 (Wed, 02 Mar 2022)

  Changed paths:
    M hw/intc/meson.build
    M hw/intc/pnv_xive.c
    A hw/intc/pnv_xive2.c
    A hw/intc/pnv_xive2_regs.h
    M hw/intc/spapr_xive.c
    M hw/intc/xive.c
    A hw/intc/xive2.c
    M hw/pci-host/pnv_phb4.c
    M hw/pci-host/pnv_phb4_pec.c
    M hw/pci-host/trace-events
    M hw/ppc/pnv.c
    M hw/ppc/pnv_homer.c
    M hw/ppc/pnv_occ.c
    M hw/ppc/pnv_psi.c
    M hw/ppc/spapr.c
    M hw/ppc/spapr_caps.c
    M hw/ppc/spapr_drc.c
    M hw/ppc/spapr_numa.c
    M hw/ppc/spapr_pci_nvlink2.c
    M hw/ppc/spapr_rtas.c
    M hw/ppc/spapr_vio.c
    M include/hw/pci-host/pnv_phb4.h
    M include/hw/pci-host/pnv_phb4_regs.h
    M include/hw/ppc/pnv.h
    M include/hw/ppc/pnv_homer.h
    M include/hw/ppc/pnv_occ.h
    M include/hw/ppc/pnv_xive.h
    M include/hw/ppc/pnv_xscom.h
    M include/hw/ppc/xive.h
    A include/hw/ppc/xive2.h
    A include/hw/ppc/xive2_regs.h
    M include/tcg/tcg-op-gvec.h
    M target/ppc/cpu.h
    M target/ppc/cpu_init.c
    M target/ppc/excp_helper.c
    M target/ppc/fpu_helper.c
    M target/ppc/helper.h
    M target/ppc/insn32.decode
    M target/ppc/insn64.decode
    M target/ppc/int_helper.c
    M target/ppc/machine.c
    M target/ppc/meson.build
    M target/ppc/power8-pmu.c
    M target/ppc/power8-pmu.h
    M target/ppc/translate.c
    M target/ppc/translate/vmx-impl.c.inc
    M target/ppc/translate/vmx-ops.c.inc
    M target/ppc/translate/vsx-impl.c.inc
    M target/ppc/translate/vsx-ops.c.inc
    M tcg/ppc/tcg-target.c.inc
    M tcg/tcg-op-gvec.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/legoater/tags/pull-ppc-20220302' into 
staging

ppc-7.0 queue

* ppc/pnv fixes
* PMU EBB support
* target/ppc: PowerISA Vector/VSX instruction batch
* ppc/pnv: Extension of the powernv10 machine with XIVE2 ans PHB5 models
* spapr allocation cleanups

# gpg: Signature made Wed 02 Mar 2022 11:00:42 GMT
# gpg:                using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B  0B60 51A3 43C7 CFFB ECA1

* remotes/legoater/tags/pull-ppc-20220302: (87 commits)
  hw/ppc/spapr_vio.c: use g_autofree in spapr_dt_vdevice()
  hw/ppc/spapr_rtas.c: use g_autofree in rtas_ibm_get_system_parameter()
  spapr_pci_nvlink2.c: use g_autofree in spapr_phb_nvgpu_ram_populate_dt()
  hw/ppc/spapr_numa.c: simplify spapr_numa_write_assoc_lookup_arrays()
  hw/ppc/spapr_drc.c: use g_autofree in spapr_drc_by_index()
  hw/ppc/spapr_drc.c: use g_autofree in spapr_dr_connector_new()
  hw/ppc/spapr_drc.c: use g_autofree in drc_unrealize()
  hw/ppc/spapr_drc.c: use g_autofree in drc_realize()
  hw/ppc/spapr_drc.c: use g_auto in spapr_dt_drc()
  hw/ppc/spapr_caps.c: use g_autofree in spapr_caps_add_properties()
  hw/ppc/spapr_caps.c: use g_autofree in spapr_cap_get_string()
  hw/ppc/spapr_caps.c: use g_autofree in spapr_cap_set_string()
  hw/ppc/spapr.c: fail early if no firmware found in machine_init()
  hw/ppc/spapr.c: use g_autofree in spapr_dt_chosen()
  pnv/xive2: Add support for 8bits thread id
  pnv/xive2: Add support for automatic save&restore
  xive2: Add a get_config() handler for the router configuration
  pnv/xive2: Add support XIVE2 P9-compat mode (or Gen1)
  ppc/pnv: add XIVE Gen2 TIMA support
  pnv/xive2: Introduce new capability bits
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Compare: https://github.com/qemu/qemu/compare/44efeb90b2d0...64ada298b98a



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