[Qemu-commits] [qemu/qemu] 8092b5: hw/sd: add nuvoton MMC

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[Qemu-commits] [qemu/qemu] 8092b5: hw/sd: add nuvoton MMC

From:	Richard Henderson
Subject:	[Qemu-commits] [qemu/qemu] 8092b5: hw/sd: add nuvoton MMC
Date:	Wed, 03 Nov 2021 06:37:02 -0700
  Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: 8092b51849499be97c42c0f1a832ade969e38724
      
https://github.com/qemu/qemu/commit/8092b51849499be97c42c0f1a832ade969e38724
  Author: Shengtan Mao <stmao@google.com>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M hw/sd/meson.build
    A hw/sd/npcm7xx_sdhci.c
    A include/hw/sd/npcm7xx_sdhci.h

  Log Message:
  -----------
  hw/sd: add nuvoton MMC

Signed-off-by: Shengtan Mao <stmao@google.com>
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Chris Rauer <crauer@google.com>
Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20211008002628.1958285-2-wuhaotsh@google.com>
[rth: Fix typos of "nonexistent"]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 0a9df6cb9fb8f98258e51797e59ecaf9ef6b79a2
      
https://github.com/qemu/qemu/commit/0a9df6cb9fb8f98258e51797e59ecaf9ef6b79a2
  Author: Shengtan Mao <stmao@google.com>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M hw/arm/npcm7xx.c
    M include/hw/arm/npcm7xx.h

  Log Message:
  -----------
  hw/arm: Add Nuvoton SD module to board

Signed-off-by: Shengtan Mao <stmao@google.com>
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Chris Rauer <crauer@google.com>
Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20211008002628.1958285-3-wuhaotsh@google.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 2cb06d492da9f7054eaa9ecbff1e0538b2cf49f8
      
https://github.com/qemu/qemu/commit/2cb06d492da9f7054eaa9ecbff1e0538b2cf49f8
  Author: Shengtan Mao <stmao@google.com>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M hw/arm/npcm7xx_boards.c

  Log Message:
  -----------
  hw/arm: Attach MMC to quanta-gbs-bmc

Signed-off-by: Shengtan Mao <stmao@google.com>
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20211008002628.1958285-4-wuhaotsh@google.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: da2f02b360f405d7badc4a3028276e07db58026c
      
https://github.com/qemu/qemu/commit/da2f02b360f405d7badc4a3028276e07db58026c
  Author: Shengtan Mao <stmao@google.com>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M tests/qtest/libqos/meson.build
    A tests/qtest/libqos/sdhci-cmd.c
    A tests/qtest/libqos/sdhci-cmd.h

  Log Message:
  -----------
  tests/qtest/libqos: add SDHCI commands

Signed-off-by: Shengtan Mao <stmao@google.com>
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Chris Rauer <crauer@google.com>
Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20211008002628.1958285-5-wuhaotsh@google.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: dbd9e08476f09cf3556b9b8a306bf277172841a9
      
https://github.com/qemu/qemu/commit/dbd9e08476f09cf3556b9b8a306bf277172841a9
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M configs/targets/aarch64-softmmu.mak
    M configs/targets/arm-linux-user.mak
    M configs/targets/arm-softmmu.mak
    M configs/targets/armeb-linux-user.mak
    A gdb-xml/arm-m-profile-mve.xml
    M target/arm/gdbstub.c

  Log Message:
  -----------
  target/arm: Advertise MVE to gdb when present

Cortex-M CPUs with MVE should advertise this fact to gdb, using the
org.gnu.gdb.arm.m-profile-mve XML feature, which defines the VPR
register.  Presence of this feature also tells gdb to create
pseudo-registers Q0..Q7, so we do not need to tell gdb about them
separately.

Note that unless you have a very recent GDB that includes this fix:
http://patches-tcwg.linaro.org/patch/58133/ gdb will mis-print the
individual fields of the VPR register as zero (but showing the whole
thing as hex, eg with "print /x $vpr" will give the correct value).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20211101160814.5103-1-peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 060c1f4252bd8bfa06e311bdcb665b46964ce0f3
      
https://github.com/qemu/qemu/commit/060c1f4252bd8bfa06e311bdcb665b46964ce0f3
  Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M target/arm/translate.c

  Log Message:
  -----------
  target/arm: Use tcg_constant_i32() in op_smlad()

Avoid using a TCG temporary for a read-only constant.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211029231834.2476117-2-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: daf7a1814feec8a52481a695c2b9f0b9c71f0d46
      
https://github.com/qemu/qemu/commit/daf7a1814feec8a52481a695c2b9f0b9c71f0d46
  Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M target/arm/translate-a32.h

  Log Message:
  -----------
  target/arm: Introduce store_cpu_field_constant() helper

Similarly to the store_cpu_field() helper which takes a TCG
temporary, store its value to the CPUState, introduce the
store_cpu_field_constant() helper which store a constant to
CPUState (without using any TCG temporary).

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211029231834.2476117-3-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: cacb1aa486e713b9492e18668276a12b938cee33
      
https://github.com/qemu/qemu/commit/cacb1aa486e713b9492e18668276a12b938cee33
  Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M target/arm/translate.c

  Log Message:
  -----------
  target/arm: Use the constant variant of store_cpu_field() when possible

When using a constant variable, we can replace the store_cpu_field()
call by store_cpu_field_constant() which avoid using TCG temporaries.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211029231834.2476117-4-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 35a1ec8e47a45a674b1ab2097ca9a28805dfd7f0
      
https://github.com/qemu/qemu/commit/35a1ec8e47a45a674b1ab2097ca9a28805dfd7f0
  Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M target/arm/translate-sve.c

  Log Message:
  -----------
  target/arm: Use tcg_constant_i64() in do_sat_addsub_64()

The immediate value used for comparison is constant and
read-only. Move it to the constant pool. This frees a
TCG temporary for unsigned saturation opcodes.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211029231834.2476117-5-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: a7ac8e83aea003e69c22c205df43d75bb7c2f13d
      
https://github.com/qemu/qemu/commit/a7ac8e83aea003e69c22c205df43d75bb7c2f13d
  Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M target/arm/translate.c

  Log Message:
  -----------
  target/arm: Use tcg_constant_i32() in gen_rev16()

Since the mask is a constant value, use tcg_constant_i32()
instead of a TCG temporary.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211029231834.2476117-6-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 9dad363a223df8269175d218413aa8cd265e078e
      
https://github.com/qemu/qemu/commit/9dad363a223df8269175d218413aa8cd265e078e
  Author: Jean-Philippe Brucker <jean-philippe@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M hw/arm/virt.c

  Log Message:
  -----------
  hw/arm/virt: Rename default_bus_bypass_iommu

Since commit d8fb7d0969d5 ("vl: switch -M parsing to keyval"), machine
parameter definitions cannot use underscores, because keyval_dashify()
transforms them to dashes and the parser doesn't find the parameter.

This affects option default_bus_bypass_iommu which was introduced in the
same release:

$ qemu-system-aarch64 -M virt,default_bus_bypass_iommu=on
qemu-system-aarch64: Property 'virt-6.1-machine.default-bus-bypass-iommu' not 
found

Rename the parameter to "default-bus-bypass-iommu". Passing
"default_bus_bypass_iommu" is still valid since the underscore are
transformed automatically.

Fixes: 6d7a85483a06 ("hw/arm/virt: Add default_bus_bypass_iommu machine option")
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Tested-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20211026093733.2144161-1-jean-philippe@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 5fd6a3e23669444026f84f466a7ed402c203a84e
      
https://github.com/qemu/qemu/commit/5fd6a3e23669444026f84f466a7ed402c203a84e
  Author: Alexander Graf <agraf@csgraf.de>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M target/arm/hvf/hvf.c

  Log Message:
  -----------
  hvf: arm: Ignore cache operations on MMIO

Apple's Hypervisor.Framework forwards cache operations as MMIO traps
into user space. For MMIO however, these have no meaning: There is no
cache attached to them.

So let's just treat cache data exits as nops.

This fixes OpenBSD booting as guest.

Reported-by: AJ Barris <AwlsomeAlex@github.com>
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reference: https://github.com/utmapp/UTM/issues/3197
Message-Id: <20211026071241.74889-1-agraf@csgraf.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: cc23377516072d293b0f9ab04741f8982d274639
      
https://github.com/qemu/qemu/commit/cc23377516072d293b0f9ab04741f8982d274639
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-03 (Wed, 03 Nov 2021)

  Changed paths:
    M configs/targets/aarch64-softmmu.mak
    M configs/targets/arm-linux-user.mak
    M configs/targets/arm-softmmu.mak
    M configs/targets/armeb-linux-user.mak
    A gdb-xml/arm-m-profile-mve.xml
    M hw/arm/npcm7xx.c
    M hw/arm/npcm7xx_boards.c
    M hw/arm/virt.c
    M hw/sd/meson.build
    A hw/sd/npcm7xx_sdhci.c
    M include/hw/arm/npcm7xx.h
    A include/hw/sd/npcm7xx_sdhci.h
    M target/arm/gdbstub.c
    M target/arm/hvf/hvf.c
    M target/arm/translate-a32.h
    M target/arm/translate-sve.c
    M target/arm/translate.c
    M tests/qtest/libqos/meson.build
    A tests/qtest/libqos/sdhci-cmd.c
    A tests/qtest/libqos/sdhci-cmd.h

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/rth/tags/pull-arm-20211102-2' into 
staging

Add nuvoton sd module for NPCM7XX
Add gdb-xml for MVE
More uses of tcg_constant_* in target/arm
Fix parameter naming for default-bus-bypass-iommu
Ignore cache operations to mmio in HVF

# gpg: Signature made Tue 02 Nov 2021 02:23:53 PM EDT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" 
[ultimate]

* remotes/rth/tags/pull-arm-20211102-2:
  hvf: arm: Ignore cache operations on MMIO
  hw/arm/virt: Rename default_bus_bypass_iommu
  target/arm: Use tcg_constant_i32() in gen_rev16()
  target/arm: Use tcg_constant_i64() in do_sat_addsub_64()
  target/arm: Use the constant variant of store_cpu_field() when possible
  target/arm: Introduce store_cpu_field_constant() helper
  target/arm: Use tcg_constant_i32() in op_smlad()
  target/arm: Advertise MVE to gdb when present
  tests/qtest/libqos: add SDHCI commands
  hw/arm: Attach MMC to quanta-gbs-bmc
  hw/arm: Add Nuvoton SD module to board
  hw/sd: add nuvoton MMC

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Compare: https://github.com/qemu/qemu/compare/e86e00a24932...cc2337751607
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