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[Qemu-commits] [qemu/qemu] 0fdbb7: accel/tcg: Split out adjust_signal_pc


From: Richard Henderson
Subject: [Qemu-commits] [qemu/qemu] 0fdbb7: accel/tcg: Split out adjust_signal_pc
Date: Tue, 02 Nov 2021 12:11:38 -0700

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 0fdbb7d2c1ecb761b985b176b9bb159d483d9514
      
https://github.com/qemu/qemu/commit/0fdbb7d2c1ecb761b985b176b9bb159d483d9514
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-10-30 (Sat, 30 Oct 2021)

  Changed paths:
    M accel/tcg/user-exec.c
    M include/exec/exec-all.h

  Log Message:
  -----------
  accel/tcg: Split out adjust_signal_pc

Split out a function to adjust the raw signal pc into a
value that could be passed to cpu_restore_state.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
v2: Adjust pc in place; return MMUAccessType.


  Commit: f920ffdd8ed6d0abb34fdf2bbb85926cfb40aef2
      
https://github.com/qemu/qemu/commit/f920ffdd8ed6d0abb34fdf2bbb85926cfb40aef2
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-10-30 (Sat, 30 Oct 2021)

  Changed paths:
    M accel/tcg/cpu-exec.c
    M accel/tcg/user-exec.c

  Log Message:
  -----------
  accel/tcg: Move clear_helper_retaddr to cpu loop

Currently there are only two places that require we reset this
value before exiting to the main loop, but that will change.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 5e38ba7dde963414dddc8a83848701b49d0bcb00
      
https://github.com/qemu/qemu/commit/5e38ba7dde963414dddc8a83848701b49d0bcb00
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-10-30 (Sat, 30 Oct 2021)

  Changed paths:
    M accel/tcg/user-exec.c
    M include/exec/exec-all.h

  Log Message:
  -----------
  accel/tcg: Split out handle_sigsegv_accerr_write

This is the major portion of handle_cpu_signal which is specific
to tcg, handling the page protections for the translations.
Most of the rest will migrate to linux-user/ shortly.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
v2: Pass guest address to handle_sigsegv_accerr_write.


  Commit: 940b30904e928854250988c3802f334c8ee12bd4
      
https://github.com/qemu/qemu/commit/940b30904e928854250988c3802f334c8ee12bd4
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-10-30 (Sat, 30 Oct 2021)

  Changed paths:
    M accel/tcg/user-exec.c

  Log Message:
  -----------
  accel/tcg: Fold cpu_exit_tb_from_sighandler into caller

Remove the comment about siglongjmp.  We do use sigsetjmp
in the main cpu loop, but we do not save the signal mask
as most exits from the cpu loop do not require them.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: ba0e73336200a04f797ae0c13922146a135cb118
      
https://github.com/qemu/qemu/commit/ba0e73336200a04f797ae0c13922146a135cb118
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-10-30 (Sat, 30 Oct 2021)

  Changed paths:
    M configure
    A linux-user/host/riscv/hostdep.h
    A linux-user/host/riscv/safe-syscall.inc.S
    R linux-user/host/riscv32/hostdep.h
    R linux-user/host/riscv64/hostdep.h
    R linux-user/host/riscv64/safe-syscall.inc.S
    M meson.build

  Log Message:
  -----------
  configure: Merge riscv32 and riscv64 host architectures

The existing code for safe-syscall.inc.S will compile
without change for riscv32 and riscv64.  We may also
drop the meson.build stanza that merges them for tcg/.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: e6037d04c58284285726721d0d4741e1386594e9
      
https://github.com/qemu/qemu/commit/e6037d04c58284285726721d0d4741e1386594e9
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-10-30 (Sat, 30 Oct 2021)

  Changed paths:
    A linux-user/host/aarch64/host-signal.h
    A linux-user/host/arm/host-signal.h
    A linux-user/host/i386/host-signal.h
    A linux-user/host/mips/host-signal.h
    A linux-user/host/ppc/host-signal.h
    A linux-user/host/ppc64/host-signal.h
    A linux-user/host/riscv/host-signal.h
    A linux-user/host/s390/host-signal.h
    A linux-user/host/s390x/host-signal.h
    A linux-user/host/sparc/host-signal.h
    A linux-user/host/sparc64/host-signal.h
    A linux-user/host/x32/host-signal.h
    A linux-user/host/x86_64/host-signal.h
    M linux-user/signal.c

  Log Message:
  -----------
  linux-user: Reorg handling for SIGSEGV

Add stub host-signal.h for all linux-user hosts.
Add new code replacing cpu_signal_handler.
Full migration will happen one host at a time.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 85442fce49eb81c216112f87e871cf1a6a2e6c7b
      
https://github.com/qemu/qemu/commit/85442fce49eb81c216112f87e871cf1a6a2e6c7b
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M accel/tcg/user-exec.c
    M linux-user/host/i386/host-signal.h
    M linux-user/host/x32/host-signal.h
    M linux-user/host/x86_64/host-signal.h

  Log Message:
  -----------
  linux-user/host/x86: Populate host_signal.h

Split host_signal_pc and host_signal_write out of user-exec.c.
Drop the *BSD code, to be re-created under bsd-user/ later.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 8cc7b85d56b629e4ffceea85c3a0a4ad8754153a
      
https://github.com/qemu/qemu/commit/8cc7b85d56b629e4ffceea85c3a0a4ad8754153a
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M accel/tcg/user-exec.c
    M linux-user/host/ppc/host-signal.h
    M linux-user/host/ppc64/host-signal.h

  Log Message:
  -----------
  linux-user/host/ppc: Populate host_signal.h

Split host_signal_pc and host_signal_write out of user-exec.c.
Drop the *BSD code, to be re-created under bsd-user/ later.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 44c8f2cd905434358a292f581f33f434f374327b
      
https://github.com/qemu/qemu/commit/44c8f2cd905434358a292f581f33f434f374327b
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M accel/tcg/user-exec.c
    A linux-user/host/alpha/host-signal.h

  Log Message:
  -----------
  linux-user/host/alpha: Populate host_signal.h

Split host_signal_pc and host_signal_write out of user-exec.c.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 8b5bd461935b7682302366f95ad192434fd99e67
      
https://github.com/qemu/qemu/commit/8b5bd461935b7682302366f95ad192434fd99e67
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M accel/tcg/user-exec.c
    M linux-user/host/sparc/host-signal.h
    M linux-user/host/sparc64/host-signal.h

  Log Message:
  -----------
  linux-user/host/sparc: Populate host_signal.h

Split host_signal_pc and host_signal_write out of user-exec.c.
Drop the *BSD code, to be re-created under bsd-user/ later.
Drop the Solaris code as completely unused.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: a30bfaa7bd1f721a5b936fd1b4bf009eb9c2a6f4
      
https://github.com/qemu/qemu/commit/a30bfaa7bd1f721a5b936fd1b4bf009eb9c2a6f4
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M accel/tcg/user-exec.c
    M linux-user/host/arm/host-signal.h

  Log Message:
  -----------
  linux-user/host/arm: Populate host_signal.h

Split host_signal_pc and host_signal_write out of user-exec.c.
Drop the *BSD code, to be re-created under bsd-user/ later.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: cf5f42fd07fa7ca4cfcf940093ef2506f990d1db
      
https://github.com/qemu/qemu/commit/cf5f42fd07fa7ca4cfcf940093ef2506f990d1db
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M accel/tcg/user-exec.c
    M linux-user/host/aarch64/host-signal.h

  Log Message:
  -----------
  linux-user/host/aarch64: Populate host_signal.h

Split host_signal_pc and host_signal_write out of user-exec.c.
Drop the *BSD code, to be re-created under bsd-user/ later.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 66ee11d407c07cd5e093fabb48e81232388189d0
      
https://github.com/qemu/qemu/commit/66ee11d407c07cd5e093fabb48e81232388189d0
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M accel/tcg/user-exec.c
    M linux-user/host/s390/host-signal.h
    M linux-user/host/s390x/host-signal.h

  Log Message:
  -----------
  linux-user/host/s390: Populate host_signal.h

Split host_signal_pc and host_signal_write out of user-exec.c.

Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: b12161120af8467bc28159adf0c1bfb0fbc4ed70
      
https://github.com/qemu/qemu/commit/b12161120af8467bc28159adf0c1bfb0fbc4ed70
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M accel/tcg/user-exec.c
    M linux-user/host/mips/host-signal.h

  Log Message:
  -----------
  linux-user/host/mips: Populate host_signal.h

Split host_signal_pc and host_signal_write out of user-exec.c.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 97be8c6a95138291ee8736690e8bc0dd6db9e27e
      
https://github.com/qemu/qemu/commit/97be8c6a95138291ee8736690e8bc0dd6db9e27e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M accel/tcg/user-exec.c
    M linux-user/host/riscv/host-signal.h

  Log Message:
  -----------
  linux-user/host/riscv: Populate host_signal.h

Split host_signal_pc and host_signal_write out of user-exec.c.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 7ce8e389efc5011742194fd46847fce3be4b3124
      
https://github.com/qemu/qemu/commit/7ce8e389efc5011742194fd46847fce3be4b3124
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M target/arm/sve_helper.c

  Log Message:
  -----------
  target/arm: Fixup comment re handle_cpu_signal

The named function no longer exists.
Refer to host_signal_handler instead.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 4f3bbd9cfb49ac8287afd32b3916edc50e8e1850
      
https://github.com/qemu/qemu/commit/4f3bbd9cfb49ac8287afd32b3916edc50e8e1850
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M linux-user/host/riscv/host-signal.h

  Log Message:
  -----------
  linux-user/host/riscv: Improve host_signal_write

Do not read 4 bytes before we determine the size of the insn.
Simplify triple switches in favor of checking major opcodes.
Include the missing cases of compact fsd and fsdsp.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 04de121aaf0c896812792eb8489ae614c7f6dade
      
https://github.com/qemu/qemu/commit/04de121aaf0c896812792eb8489ae614c7f6dade
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M include/exec/exec-all.h
    M linux-user/signal.c

  Log Message:
  -----------
  linux-user/signal: Drop HOST_SIGNAL_PLACEHOLDER

Now that all of the linux-user hosts have been converted
to host-signal.h, drop the compatibility code.

Reviewed by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 09e94676ade52708cbece8fd4bd255a25b6ee475
      
https://github.com/qemu/qemu/commit/09e94676ade52708cbece8fd4bd255a25b6ee475
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M include/hw/core/tcg-cpu-ops.h

  Log Message:
  -----------
  hw/core: Add TCGCPUOps.record_sigsegv

Add a new user-only interface for updating cpu state before
raising a signal.  This will replace tlb_fill for user-only
and should result in less boilerplate for each guest.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 72d2bbf9ff3e1edf5d57b53149eeaa36f19fb891
      
https://github.com/qemu/qemu/commit/72d2bbf9ff3e1edf5d57b53149eeaa36f19fb891
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M accel/tcg/user-exec.c
    M include/exec/exec-all.h
    M linux-user/signal.c

  Log Message:
  -----------
  linux-user: Add cpu_loop_exit_sigsegv

This is a new interface to be provided by the os emulator for
raising SIGSEGV on fault.  Use the new record_sigsegv target hook.

Reviewed by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 90113883af311121e22caf505eab55e2eea1aa8e
      
https://github.com/qemu/qemu/commit/90113883af311121e22caf505eab55e2eea1aa8e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M linux-user/alpha/cpu_loop.c
    M target/alpha/cpu.c
    M target/alpha/cpu.h
    M target/alpha/helper.c

  Log Message:
  -----------
  target/alpha: Implement alpha_cpu_record_sigsegv

Record trap_arg{0,1,2} for the linux-user signal frame.

Fill in the stores to trap_arg{1,2} that were missing
from the previous user-only alpha_cpu_tlb_fill function.
Use maperr to simplify computation of trap_arg1.

Remove the code for EXCP_MMFAULT from cpu_loop, as
that part is now handled by cpu_loop_exit_sigsegv.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 5e98763c0ef55fbd8fe4fe8614825ab508543d32
      
https://github.com/qemu/qemu/commit/5e98763c0ef55fbd8fe4fe8614825ab508543d32
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M target/arm/mte_helper.c

  Log Message:
  -----------
  target/arm: Use cpu_loop_exit_sigsegv for mte tag lookup

Use the new os interface for raising the exception,
rather than calling arm_cpu_tlb_fill directly.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 9b12b6b44250c23cd29161ca7007559e22beaf94
      
https://github.com/qemu/qemu/commit/9b12b6b44250c23cd29161ca7007559e22beaf94
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M target/arm/cpu.c
    M target/arm/cpu_tcg.c
    M target/arm/internals.h
    M target/arm/tlb_helper.c

  Log Message:
  -----------
  target/arm: Implement arm_cpu_record_sigsegv

Because of the complexity of setting ESR, continue to use
arm_deliver_fault.  This means we cannot remove the code
within cpu_loop that decodes EXCP_DATA_ABORT and
EXCP_PREFETCH_ABORT.

But using the new hook means that we don't have to do the
page_get_flags check manually, and we'll be able to restrict
the tlb_fill hook to sysemu later.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 5753605412c194a0368b892d540b9971cd3a1907
      
https://github.com/qemu/qemu/commit/5753605412c194a0368b892d540b9971cd3a1907
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M linux-user/cris/cpu_loop.c
    M target/cris/cpu.c
    M target/cris/cpu.h
    M target/cris/helper.c
    M target/cris/meson.build

  Log Message:
  -----------
  target/cris: Make cris_cpu_tlb_fill sysemu only

The fallback code in cpu_loop_exit_sigsegv is sufficient
for cris linux-user.

Remove the code from cpu_loop that handled the unnamed 0xaa exception.
This makes all of the code in helper.c sysemu only, so remove the
ifdefs and move the file to cris_softmmu_ss.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 70863887a84caae2cfaf31b3ce900452d87553bd
      
https://github.com/qemu/qemu/commit/70863887a84caae2cfaf31b3ce900452d87553bd
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M linux-user/hexagon/cpu_loop.c
    M target/hexagon/cpu.c

  Log Message:
  -----------
  target/hexagon: Remove hexagon_cpu_tlb_fill

The fallback code in cpu_loop_exit_sigsegv is sufficient
for hexagon linux-user.

Remove the code from cpu_loop that raises SIGSEGV.

Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 860e0b965be0ac3b8e455c3d80d4ca6f5e30a97a
      
https://github.com/qemu/qemu/commit/860e0b965be0ac3b8e455c3d80d4ca6f5e30a97a
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M linux-user/hppa/cpu_loop.c
    M target/hppa/cpu.c
    M target/hppa/cpu.h
    M target/hppa/mem_helper.c
    M target/hppa/meson.build

  Log Message:
  -----------
  target/hppa: Make hppa_cpu_tlb_fill sysemu only

The fallback code in cpu_loop_exit_sigsegv is sufficient
for hppa linux-user.

Remove the code from cpu_loop that raised SIGSEGV.
This makes all of the code in mem_helper.c sysemu only,
so remove the ifdefs and move the file to hppa_softmmu_ss.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: f74bd157c62f5c064418d038f9003c9c4b3dad0e
      
https://github.com/qemu/qemu/commit/f74bd157c62f5c064418d038f9003c9c4b3dad0e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M target/i386/tcg/helper-tcg.h
    M target/i386/tcg/tcg-cpu.c
    M target/i386/tcg/user/excp_helper.c

  Log Message:
  -----------
  target/i386: Implement x86_cpu_record_sigsegv

Record cr2, error_code, and exception_index.  That last means
that we must exit to cpu_loop ourselves, instead of letting
exception_index being overwritten.

Use the maperr parameter to properly set PG_ERROR_P_MASK.

Reviewed by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 028772c45cfdd21870f0f9056d270f03bf990fae
      
https://github.com/qemu/qemu/commit/028772c45cfdd21870f0f9056d270f03bf990fae
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M linux-user/m68k/cpu_loop.c
    M target/m68k/cpu.c
    M target/m68k/helper.c

  Log Message:
  -----------
  target/m68k: Make m68k_cpu_tlb_fill sysemu only

The fallback code in cpu_loop_exit_sigsegv is sufficient
for m68k linux-user.

Remove the code from cpu_loop that handled EXCP_ACCESS.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: fd297732a2c27aae8407a0c96660345af10575df
      
https://github.com/qemu/qemu/commit/fd297732a2c27aae8407a0c96660345af10575df
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M linux-user/microblaze/cpu_loop.c
    M target/microblaze/cpu.c
    M target/microblaze/cpu.h
    M target/microblaze/helper.c

  Log Message:
  -----------
  target/microblaze: Make mb_cpu_tlb_fill sysemu only

The fallback code in cpu_loop_exit_sigsegv is sufficient
for microblaze linux-user.

Remove the code from cpu_loop that handled the unnamed 0xaa exception.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 52d4899bf3b876065269cfd353ea3b98f66df91a
      
https://github.com/qemu/qemu/commit/52d4899bf3b876065269cfd353ea3b98f66df91a
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M linux-user/mips/cpu_loop.c
    M target/mips/cpu.c
    M target/mips/tcg/meson.build
    M target/mips/tcg/tcg-internal.h
    R target/mips/tcg/user/meson.build
    R target/mips/tcg/user/tlb_helper.c

  Log Message:
  -----------
  target/mips: Make mips_cpu_tlb_fill sysemu only

The fallback code in cpu_loop_exit_sigsegv is sufficient
for mips linux-user.

This means we can remove tcg/user/tlb_helper.c entirely.
Remove the code from cpu_loop that raised SIGSEGV.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: fac94cb36daacd202f718865ea82f5ff5a2b5a93
      
https://github.com/qemu/qemu/commit/fac94cb36daacd202f718865ea82f5ff5a2b5a93
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M target/nios2/cpu.c
    M target/nios2/cpu.h
    M target/nios2/helper.c

  Log Message:
  -----------
  target/nios2: Implement nios2_cpu_record_sigsegv

Because the linux-user kuser page handling is currently implemented
by detecting magic addresses in the unnamed 0xaa trap, we cannot
simply remove nios2_cpu_tlb_fill and rely on the fallback code.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: d315712b69fa34c27d09d425ca5951a08b07ade8
      
https://github.com/qemu/qemu/commit/d315712b69fa34c27d09d425ca5951a08b07ade8
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M linux-user/openrisc/cpu_loop.c

  Log Message:
  -----------
  linux-user/openrisc: Abort for EXCP_RANGE, EXCP_FPE

QEMU does not allow the system control bits for either exception to
be enabled in linux-user, therefore both exceptions are dead code.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 12f0bc55791bd6e0864a430a0c3c9518ae7622e8
      
https://github.com/qemu/qemu/commit/12f0bc55791bd6e0864a430a0c3c9518ae7622e8
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M linux-user/openrisc/cpu_loop.c
    M target/openrisc/cpu.c
    M target/openrisc/cpu.h
    M target/openrisc/meson.build
    M target/openrisc/mmu.c

  Log Message:
  -----------
  target/openrisc: Make openrisc_cpu_tlb_fill sysemu only

The fallback code in cpu_loop_exit_sigsegv is sufficient for
openrisc linux-user.

This makes all of the code in mmu.c sysemu only, so remove
the ifdefs and move the file to openrisc_softmmu_ss.
Remove the code from cpu_loop that handled EXCP_DPF.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 1db8af5c87ef5c89ecdb9e2d2620cd38cfbca940
      
https://github.com/qemu/qemu/commit/1db8af5c87ef5c89ecdb9e2d2620cd38cfbca940
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M target/ppc/cpu.h
    M target/ppc/cpu_init.c
    M target/ppc/internal.h
    M target/ppc/user_only_helper.c

  Log Message:
  -----------
  target/ppc: Implement ppc_cpu_record_sigsegv

Record DAR, DSISR, and exception_index.  That last means
that we must exit to cpu_loop ourselves, instead of letting
exception_index being overwritten.

This is exactly what the user-mode ppc_cpu_tlb_fill does,
so simply rename it as ppc_cpu_record_sigsegv.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 263e2ab20ca40580483233a62e7a7996b28b02fc
      
https://github.com/qemu/qemu/commit/263e2ab20ca40580483233a62e7a7996b28b02fc
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M linux-user/riscv/cpu_loop.c
    M target/riscv/cpu.c
    M target/riscv/cpu_helper.c

  Log Message:
  -----------
  target/riscv: Make riscv_cpu_tlb_fill sysemu only

The fallback code in cpu_loop_exit_sigsegv is sufficient
for riscv linux-user.

Remove the code from cpu_loop that raised SIGSEGV.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: db9aab5783a2fb62250e12f0c4cfed5e1778c189
      
https://github.com/qemu/qemu/commit/db9aab5783a2fb62250e12f0c4cfed5e1778c189
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M target/s390x/tcg/mem_helper.c

  Log Message:
  -----------
  target/s390x: Use probe_access_flags in s390_probe_access

Not sure why the user-only code wasn't rewritten to use
probe_access_flags at the same time that the sysemu code
was converted.  For the purpose of user-only, this is an
exact replacement.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: c8e7fef102058c3554b26a381e0a89ae05b9677b
      
https://github.com/qemu/qemu/commit/c8e7fef102058c3554b26a381e0a89ae05b9677b
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M linux-user/s390x/cpu_loop.c
    M target/s390x/cpu.c
    M target/s390x/s390x-internal.h
    M target/s390x/tcg/excp_helper.c

  Log Message:
  -----------
  target/s390x: Implement s390_cpu_record_sigsegv

Move the masking of the address from cpu_loop into
s390_cpu_record_sigsegv -- this is governed by hw, not linux.
This does mean we have to raise our own exception, rather
than return to the fallback.

Use maperr to choose between PGM_PROTECTION and PGM_ADDRESSING.
Use the appropriate si_code for each in cpu_loop.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: cac720ec5466312a6f7f3f81fa3f11f05c022375
      
https://github.com/qemu/qemu/commit/cac720ec5466312a6f7f3f81fa3f11f05c022375
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M linux-user/sh4/cpu_loop.c
    M target/sh4/cpu.c
    M target/sh4/cpu.h
    M target/sh4/helper.c

  Log Message:
  -----------
  target/sh4: Make sh4_cpu_tlb_fill sysemu only

The fallback code in cpu_loop_exit_sigsegv is sufficient
for sh4 linux-user.

Remove the code from cpu_loop that raised SIGSEGV.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: caac44a52aa71d5ff83607cad861d02ecbbfcdc0
      
https://github.com/qemu/qemu/commit/caac44a52aa71d5ff83607cad861d02ecbbfcdc0
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M linux-user/sparc/cpu_loop.c
    M target/sparc/cpu.c
    M target/sparc/meson.build
    M target/sparc/mmu_helper.c

  Log Message:
  -----------
  target/sparc: Make sparc_cpu_tlb_fill sysemu only

The fallback code in cpu_loop_exit_sigsegv is sufficient
for sparc linux-user.

This makes all of the code in mmu_helper.c sysemu only, so remove
the ifdefs and move the file to sparc_softmmu_ss.  Remove the code
from cpu_loop that handled TT_DFAULT and TT_TFAULT.

Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 6407f64fcf0990f9353ec8b3c2a86aed92ef4aa1
      
https://github.com/qemu/qemu/commit/6407f64fcf0990f9353ec8b3c2a86aed92ef4aa1
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M linux-user/xtensa/cpu_loop.c
    M target/xtensa/cpu.c
    M target/xtensa/cpu.h
    M target/xtensa/helper.c

  Log Message:
  -----------
  target/xtensa: Make xtensa_cpu_tlb_fill sysemu only

The fallback code in cpu_loop_exit_sigsegv is sufficient
for xtensa linux-user.

Remove the code from cpu_loop that raised SIGSEGV.

Acked-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: eeca7dc566076d6130d986e17508372bc7916281
      
https://github.com/qemu/qemu/commit/eeca7dc566076d6130d986e17508372bc7916281
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M include/hw/core/tcg-cpu-ops.h
    M linux-user/signal.c

  Log Message:
  -----------
  accel/tcg: Restrict TCGCPUOps::tlb_fill() to sysemu

We have replaced tlb_fill with record_sigsegv for user mode.
Move the declaration to restrict it to system emulation.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 644a9fece426d52cf8fb51e24e003dd4c590c5cc
      
https://github.com/qemu/qemu/commit/644a9fece426d52cf8fb51e24e003dd4c590c5cc
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M include/hw/core/tcg-cpu-ops.h

  Log Message:
  -----------
  hw/core: Add TCGCPUOps.record_sigbus

Add a new user-only interface for updating cpu state before
raising a signal.  This will take the place of do_unaligned_access
for user-only and should result in less boilerplate for each guest.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 12ed56407e60371d45ffa3b7f2fd00c4d7efa580
      
https://github.com/qemu/qemu/commit/12ed56407e60371d45ffa3b7f2fd00c4d7efa580
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M include/exec/exec-all.h
    M linux-user/signal.c

  Log Message:
  -----------
  linux-user: Add cpu_loop_exit_sigbus

This is a new interface to be provided by the os emulator for
raising SIGBUS on fault.  Use the new record_sigbus target hook.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: e7424abc201ea06ff91a15fd86a533a22cd8dff4
      
https://github.com/qemu/qemu/commit/e7424abc201ea06ff91a15fd86a533a22cd8dff4
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M linux-user/alpha/cpu_loop.c
    M target/alpha/cpu.c
    M target/alpha/cpu.h
    M target/alpha/mem_helper.c

  Log Message:
  -----------
  target/alpha: Implement alpha_cpu_record_sigbus

Record trap_arg{0,1,2} for the linux-user signal frame.

Raise SIGBUS directly from cpu_loop_exit_sigbus, which means
we can remove the code for EXCP_UNALIGN in cpu_loop.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 39a099ca25670b9fed838a09887fe8a1fdd803d3
      
https://github.com/qemu/qemu/commit/39a099ca25670b9fed838a09887fe8a1fdd803d3
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M linux-user/aarch64/cpu_loop.c
    M linux-user/arm/cpu_loop.c
    M target/arm/cpu.c
    M target/arm/cpu_tcg.c
    M target/arm/internals.h
    M target/arm/tlb_helper.c

  Log Message:
  -----------
  target/arm: Implement arm_cpu_record_sigbus

Because of the complexity of setting ESR, re-use the existing
arm_cpu_do_unaligned_access function.  This means we have to
handle the exception ourselves in cpu_loop, transforming it
to the appropriate signal.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: ee8e0807de6f0ec70454ffbbb778c1246c45af2b
      
https://github.com/qemu/qemu/commit/ee8e0807de6f0ec70454ffbbb778c1246c45af2b
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M linux-user/hppa/cpu_loop.c

  Log Message:
  -----------
  linux-user/hppa: Remove EXCP_UNALIGN handling

We will raise SIGBUS directly from cpu_loop_exit_sigbus.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: b414df757d73d0a1d37f14a866ff1338b93a4a27
      
https://github.com/qemu/qemu/commit/b414df757d73d0a1d37f14a866ff1338b93a4a27
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M target/microblaze/translate.c

  Log Message:
  -----------
  target/microblaze: Do not set MO_ALIGN for user-only

The kernel will fix up unaligned accesses, so emulate that
by allowing unaligned accesses to succeed.

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 336e91f85332dda0ede4c1d15b87a19a0fb898a2
      
https://github.com/qemu/qemu/commit/336e91f85332dda0ede4c1d15b87a19a0fb898a2
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M target/ppc/excp_helper.c

  Log Message:
  -----------
  target/ppc: Move SPR_DSISR setting to powerpc_excp

By doing this while sending the exception, we will have already
done the unwinding, which makes the ppc_cpu_do_unaligned_access
code a bit cleaner.

Update the comment about the expected instruction format.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: a7e3af132568453d9b4e31ec1ac647ef494f8765
      
https://github.com/qemu/qemu/commit/a7e3af132568453d9b4e31ec1ac647ef494f8765
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M target/ppc/excp_helper.c

  Log Message:
  -----------
  target/ppc: Set fault address in ppc_cpu_do_unaligned_access

We ought to have been recording the virtual address for reporting
to the guest trap handler.

Cc: qemu-ppc@nongnu.org
Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 996473e4a93d6a6fe0b324afacf398a5a97955d7
      
https://github.com/qemu/qemu/commit/996473e4a93d6a6fe0b324afacf398a5a97955d7
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M target/ppc/excp_helper.c
    M target/ppc/internal.h

  Log Message:
  -----------
  target/ppc: Restrict ppc_cpu_do_unaligned_access to sysemu

This is not used by, nor required by, user-only.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 5057ae5636cbdaea3f61a5800c2ee1961d986adf
      
https://github.com/qemu/qemu/commit/5057ae5636cbdaea3f61a5800c2ee1961d986adf
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M linux-user/ppc/cpu_loop.c

  Log Message:
  -----------
  linux-user/ppc: Remove POWERPC_EXCP_ALIGN handling

We will raise SIGBUS directly from cpu_loop_exit_sigbus.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 5bcbf3561f63a9a0660fe40b68374258fe592c23
      
https://github.com/qemu/qemu/commit/5bcbf3561f63a9a0660fe40b68374258fe592c23
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M target/s390x/cpu.c
    M target/s390x/s390x-internal.h
    M target/s390x/tcg/excp_helper.c

  Log Message:
  -----------
  target/s390x: Implement s390x_cpu_record_sigbus

For s390x, the only unaligned accesses that are signaled are atomic,
and we don't actually want to raise SIGBUS for those, but instead
raise a SPECIFICATION error, which the kernel will report as SIGILL.

Split out a do_unaligned_access function to share between the user-only
s390x_cpu_record_sigbus and the sysemu s390x_do_unaligned_access.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 0ee0942a7815ac275eba580d7fef812d9a7d2759
      
https://github.com/qemu/qemu/commit/0ee0942a7815ac275eba580d7fef812d9a7d2759
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M target/sh4/op_helper.c

  Log Message:
  -----------
  target/sh4: Set fault address in superh_cpu_do_unaligned_access

We ought to have been recording the virtual address for reporting
to the guest trap handler.

Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 9852112ee44fbf4cdfcd8e911d3d9aac1cb59b30
      
https://github.com/qemu/qemu/commit/9852112ee44fbf4cdfcd8e911d3d9aac1cb59b30
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M target/sparc/ldst_helper.c

  Log Message:
  -----------
  target/sparc: Remove DEBUG_UNALIGNED

The printf should have been qemu_log_mask, the parameters
themselves no longer compile, and because this is placed
before unwinding the PC is actively wrong.

We get better (and correct) logging on the other side of
raising the exception, in sparc_cpu_do_interrupt.

Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: c0e0c6fe01e8f2a27b241c226fafb578fd896cb2
      
https://github.com/qemu/qemu/commit/c0e0c6fe01e8f2a27b241c226fafb578fd896cb2
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M target/sparc/mmu_helper.c

  Log Message:
  -----------
  target/sparc: Split out build_sfsr

Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: aebe51538b90f76a9085dbdeccd87f295316a1dd
      
https://github.com/qemu/qemu/commit/aebe51538b90f76a9085dbdeccd87f295316a1dd
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M target/sparc/ldst_helper.c
    M target/sparc/mmu_helper.c

  Log Message:
  -----------
  target/sparc: Set fault address in sparc_cpu_do_unaligned_access

We ought to have been recording the virtual address for reporting
to the guest trap handler.  Move the function to mmu_helper.c, so
that we can re-use code shared with get_physical_address_data.

Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: fce3f474301a104a0d3a02d7d7b42891dea6338b
      
https://github.com/qemu/qemu/commit/fce3f474301a104a0d3a02d7d7b42891dea6338b
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M accel/tcg/user-exec.c

  Log Message:
  -----------
  accel/tcg: Report unaligned atomics for user-only

Use the new cpu_loop_exit_sigbus for atomic_mmu_lookup, which
has access to complete alignment info from the TCGMemOpIdx arg.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 9395cd0a38bfec68d150443f59aa50e44877a9c1
      
https://github.com/qemu/qemu/commit/9395cd0a38bfec68d150443f59aa50e44877a9c1
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M accel/tcg/user-exec.c

  Log Message:
  -----------
  accel/tcg: Report unaligned load/store for user-only

Use the new cpu_loop_exit_sigbus for cpu_mmu_lookup.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 37e891e38fe1e81fc468d8a000912f8e7ee61336
      
https://github.com/qemu/qemu/commit/37e891e38fe1e81fc468d8a000912f8e7ee61336
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M accel/tcg/user-exec.c
    M include/tcg/tcg-ldst.h

  Log Message:
  -----------
  tcg: Add helper_unaligned_{ld,st} for user-only sigbus

To be called from tcg generated code on hosts that support
unaligned accesses natively, in response to an access that
is supposed to be aligned.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 742f07628c0a0bd847b47ee0a0b20c44531e0ba5
      
https://github.com/qemu/qemu/commit/742f07628c0a0bd847b47ee0a0b20c44531e0ba5
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M linux-user/signal.c

  Log Message:
  -----------
  linux-user: Handle BUS_ADRALN in host_signal_handler

Handle BUS_ADRALN via cpu_loop_exit_sigbus, but allow other SIGBUS
si_codes to continue into the host-to-guest signal conversion code.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 102f39b32dd32711fdb6236f17fb63a3cc63f8a7
      
https://github.com/qemu/qemu/commit/102f39b32dd32711fdb6236f17fb63a3cc63f8a7
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-11-02 (Tue, 02 Nov 2021)

  Changed paths:
    M accel/tcg/cpu-exec.c
    M accel/tcg/user-exec.c
    M configure
    M include/exec/exec-all.h
    M include/hw/core/tcg-cpu-ops.h
    M include/tcg/tcg-ldst.h
    M linux-user/aarch64/cpu_loop.c
    M linux-user/alpha/cpu_loop.c
    M linux-user/arm/cpu_loop.c
    M linux-user/cris/cpu_loop.c
    M linux-user/hexagon/cpu_loop.c
    A linux-user/host/aarch64/host-signal.h
    A linux-user/host/alpha/host-signal.h
    A linux-user/host/arm/host-signal.h
    A linux-user/host/i386/host-signal.h
    A linux-user/host/mips/host-signal.h
    A linux-user/host/ppc/host-signal.h
    A linux-user/host/ppc64/host-signal.h
    A linux-user/host/riscv/host-signal.h
    A linux-user/host/riscv/hostdep.h
    A linux-user/host/riscv/safe-syscall.inc.S
    R linux-user/host/riscv32/hostdep.h
    R linux-user/host/riscv64/hostdep.h
    R linux-user/host/riscv64/safe-syscall.inc.S
    A linux-user/host/s390/host-signal.h
    A linux-user/host/s390x/host-signal.h
    A linux-user/host/sparc/host-signal.h
    A linux-user/host/sparc64/host-signal.h
    A linux-user/host/x32/host-signal.h
    A linux-user/host/x86_64/host-signal.h
    M linux-user/hppa/cpu_loop.c
    M linux-user/m68k/cpu_loop.c
    M linux-user/microblaze/cpu_loop.c
    M linux-user/mips/cpu_loop.c
    M linux-user/openrisc/cpu_loop.c
    M linux-user/ppc/cpu_loop.c
    M linux-user/riscv/cpu_loop.c
    M linux-user/s390x/cpu_loop.c
    M linux-user/sh4/cpu_loop.c
    M linux-user/signal.c
    M linux-user/sparc/cpu_loop.c
    M linux-user/xtensa/cpu_loop.c
    M meson.build
    M target/alpha/cpu.c
    M target/alpha/cpu.h
    M target/alpha/helper.c
    M target/alpha/mem_helper.c
    M target/arm/cpu.c
    M target/arm/cpu_tcg.c
    M target/arm/internals.h
    M target/arm/mte_helper.c
    M target/arm/sve_helper.c
    M target/arm/tlb_helper.c
    M target/cris/cpu.c
    M target/cris/cpu.h
    M target/cris/helper.c
    M target/cris/meson.build
    M target/hexagon/cpu.c
    M target/hppa/cpu.c
    M target/hppa/cpu.h
    M target/hppa/mem_helper.c
    M target/hppa/meson.build
    M target/i386/tcg/helper-tcg.h
    M target/i386/tcg/tcg-cpu.c
    M target/i386/tcg/user/excp_helper.c
    M target/m68k/cpu.c
    M target/m68k/helper.c
    M target/microblaze/cpu.c
    M target/microblaze/cpu.h
    M target/microblaze/helper.c
    M target/microblaze/translate.c
    M target/mips/cpu.c
    M target/mips/tcg/meson.build
    M target/mips/tcg/tcg-internal.h
    R target/mips/tcg/user/meson.build
    R target/mips/tcg/user/tlb_helper.c
    M target/nios2/cpu.c
    M target/nios2/cpu.h
    M target/nios2/helper.c
    M target/openrisc/cpu.c
    M target/openrisc/cpu.h
    M target/openrisc/meson.build
    M target/openrisc/mmu.c
    M target/ppc/cpu.h
    M target/ppc/cpu_init.c
    M target/ppc/excp_helper.c
    M target/ppc/internal.h
    M target/ppc/user_only_helper.c
    M target/riscv/cpu.c
    M target/riscv/cpu_helper.c
    M target/s390x/cpu.c
    M target/s390x/s390x-internal.h
    M target/s390x/tcg/excp_helper.c
    M target/s390x/tcg/mem_helper.c
    M target/sh4/cpu.c
    M target/sh4/cpu.h
    M target/sh4/helper.c
    M target/sh4/op_helper.c
    M target/sparc/cpu.c
    M target/sparc/ldst_helper.c
    M target/sparc/meson.build
    M target/sparc/mmu_helper.c
    M target/xtensa/cpu.c
    M target/xtensa/cpu.h
    M target/xtensa/helper.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20211102' into staging

- Split out host signal handing from accel/tcg/user-exec.c
  to linux-user/host/arch/host-signal.h
- Replace TCGCPUOps.tlb_fill with TCGCPUOps.record_sigsegv for user-only
- Add TCGCPUOps.record_sigbus for user-only
- Remove a lot of target-specific cpu_loop handling for signals,
  now accomplished with generic code.

# gpg: Signature made Tue 02 Nov 2021 07:06:14 AM EDT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" 
[ultimate]

* remotes/rth/tags/pull-tcg-20211102: (60 commits)
  linux-user: Handle BUS_ADRALN in host_signal_handler
  tcg: Add helper_unaligned_{ld,st} for user-only sigbus
  accel/tcg: Report unaligned load/store for user-only
  accel/tcg: Report unaligned atomics for user-only
  target/sparc: Set fault address in sparc_cpu_do_unaligned_access
  target/sparc: Split out build_sfsr
  target/sparc: Remove DEBUG_UNALIGNED
  target/sh4: Set fault address in superh_cpu_do_unaligned_access
  target/s390x: Implement s390x_cpu_record_sigbus
  linux-user/ppc: Remove POWERPC_EXCP_ALIGN handling
  target/ppc: Restrict ppc_cpu_do_unaligned_access to sysemu
  target/ppc: Set fault address in ppc_cpu_do_unaligned_access
  target/ppc: Move SPR_DSISR setting to powerpc_excp
  target/microblaze: Do not set MO_ALIGN for user-only
  linux-user/hppa: Remove EXCP_UNALIGN handling
  target/arm: Implement arm_cpu_record_sigbus
  target/alpha: Implement alpha_cpu_record_sigbus
  linux-user: Add cpu_loop_exit_sigbus
  hw/core: Add TCGCPUOps.record_sigbus
  accel/tcg: Restrict TCGCPUOps::tlb_fill() to sysemu
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Compare: https://github.com/qemu/qemu/compare/91e8394415f9...102f39b32dd3



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