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[Qemu-commits] [qemu/qemu] f44839: Hexagon (target/hexagon) more tcg_con


From: Richard Henderson
Subject: [Qemu-commits] [qemu/qemu] f44839: Hexagon (target/hexagon) more tcg_constant_*
Date: Fri, 29 Oct 2021 08:37:32 -0700

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: f448397a512189e726f5e8026c89ce7fc4392377
      
https://github.com/qemu/qemu/commit/f448397a512189e726f5e8026c89ce7fc4392377
  Author: Taylor Simpson <tsimpson@quicinc.com>
  Date:   2021-10-28 (Thu, 28 Oct 2021)

  Changed paths:
    M target/hexagon/gen_tcg.h
    M target/hexagon/gen_tcg_funcs.py
    M target/hexagon/macros.h
    M target/hexagon/translate.c

  Log Message:
  -----------
  Hexagon (target/hexagon) more tcg_constant_*

Change additional tcg_const_tl to tcg_constant_tl

Note that gen_pred_cancal had slot_mask initialized with tcg_const_tl.
However, it is not constant throughout, so we initialize it with
tcg_temp_new and replace the first use with the constant value.

Inspired-by: Richard Henderson <richard.henderson@linaro.org>
Inspired-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>


  Commit: b9dd6ff91d29b9e38afd7facf1d683f34bd1ec10
      
https://github.com/qemu/qemu/commit/b9dd6ff91d29b9e38afd7facf1d683f34bd1ec10
  Author: Taylor Simpson <tsimpson@quicinc.com>
  Date:   2021-10-28 (Thu, 28 Oct 2021)

  Changed paths:
    M target/hexagon/attribs_def.h.inc
    M target/hexagon/hex_common.py
    M target/hexagon/macros.h
    M target/hexagon/translate.c
    M tests/tcg/hexagon/Makefile.target
    A tests/tcg/hexagon/overflow.c

  Log Message:
  -----------
  Hexagon (target/hexagon) put writes to USR into temp until commit

Change SET_USR_FIELD to write to hex_new_value[HEX_REG_USR] instead
of hex_gpr[HEX_REG_USR].

Then, we need code to mark the instructions that can set implicitly
set USR
- Macros added to hex_common.py
- A_FPOP added in translate.c

Test case added in tests/tcg/hexagon/overflow.c

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>


  Commit: edf044c558acfcf9ccd45ebacb84542dcca2e813
      
https://github.com/qemu/qemu/commit/edf044c558acfcf9ccd45ebacb84542dcca2e813
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-10-28 (Thu, 28 Oct 2021)

  Changed paths:
    M target/hexagon/attribs_def.h.inc
    M target/hexagon/gen_tcg.h
    M target/hexagon/gen_tcg_funcs.py
    M target/hexagon/hex_common.py
    M target/hexagon/macros.h
    M target/hexagon/translate.c
    M tests/tcg/hexagon/Makefile.target
    A tests/tcg/hexagon/overflow.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/quic/tags/pull-hex-20211028' into 
staging

Followup to replace more tcg_const_* with tcg_constant_tl*
Fix bug to delay writes to USR until packet commit

# gpg: Signature made Thu 28 Oct 2021 08:59:24 PM PDT
# gpg:                using RSA key 7B0244FB12DE4422
# gpg: Good signature from "Taylor Simpson (Rock on) <tsimpson@quicinc.com>" 
[marginal]
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg:          It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 3635 C788 CE62 B91F D4C5  9AB4 7B02 44FB 12DE 4422

* remotes/quic/tags/pull-hex-20211028:
  Hexagon (target/hexagon) put writes to USR into temp until commit
  Hexagon (target/hexagon) more tcg_constant_*

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Compare: https://github.com/qemu/qemu/compare/c52d69e7dbaa...edf044c558ac



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