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[Qemu-commits] [qemu/qemu] 34a3a7: hw/arm/xlnx-zynqmp: Realize qspi cont
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From: |
Peter Maydell |
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Subject: |
[Qemu-commits] [qemu/qemu] 34a3a7: hw/arm/xlnx-zynqmp: Realize qspi controller *after... |
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Date: |
Thu, 26 Aug 2021 12:44:50 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 34a3a71db619c46f2a9ab76257d296d9c8b43aeb
https://github.com/qemu/qemu/commit/34a3a71db619c46f2a9ab76257d296d9c8b43aeb
Author: Philippe Mathieu-Daudé <philmd@redhat.com>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M hw/arm/xlnx-zynqmp.c
Log Message:
-----------
hw/arm/xlnx-zynqmp: Realize qspi controller *after* qspi_dma
If we link QOM object (a) as a property of QOM object (b),
we must set the property *before* (b) is realized.
Move QSPI realization *after* QSPI DMA.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210819163422.2863447-2-philmd@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 348ba7bede1513f7e5aba0b755380d2ff1720192
https://github.com/qemu/qemu/commit/348ba7bede1513f7e5aba0b755380d2ff1720192
Author: Philippe Mathieu-Daudé <philmd@redhat.com>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M hw/dma/xlnx_csu_dma.c
Log Message:
-----------
hw/dma/xlnx_csu_dma: Run trivial checks early in realize()
If some property are not set, we'll return indicating a failure,
so it is pointless to allocate / initialize some fields too early.
Move the trivial checks earlier in realize().
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210819163422.2863447-3-philmd@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: c31b7f59014252e8de02597ee3af956259bc0d5e
https://github.com/qemu/qemu/commit/c31b7f59014252e8de02597ee3af956259bc0d5e
Author: Philippe Mathieu-Daudé <philmd@redhat.com>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M hw/arm/xlnx-zynqmp.c
M hw/dma/xlnx_csu_dma.c
M include/hw/dma/xlnx_csu_dma.h
Log Message:
-----------
hw/dma/xlnx_csu_dma: Always expect 'dma' link property to be set
Simplify by always passing a MemoryRegion property to the device.
Doing so we can move the AddressSpace field to the device struct,
removing need for heap allocation.
Update the Xilinx ZynqMP SoC model to pass the default system
memory instead of a NULL value.
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20210819163422.2863447-4-philmd@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 783dbab19fb79eee2b59c23043ca555d996cb91b
https://github.com/qemu/qemu/commit/783dbab19fb79eee2b59c23043ca555d996cb91b
Author: Philippe Mathieu-Daudé <philmd@redhat.com>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M hw/arm/xlnx-versal.c
M hw/arm/xlnx-zynqmp.c
M hw/dma/xlnx-zdma.c
M include/hw/dma/xlnx-zdma.h
Log Message:
-----------
hw/dma/xlnx-zdma Always expect 'dma' link property to be set
Simplify by always passing a MemoryRegion property to the device.
Doing so we can move the AddressSpace field to the device struct,
removing need for heap allocation.
Update the Xilinx ZynqMP / Versal SoC models to pass the default
system memory instead of a NULL value.
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20210819163422.2863447-5-philmd@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 0659e4680efa5b26244dceb29fb2db754ceaf8af
https://github.com/qemu/qemu/commit/0659e4680efa5b26244dceb29fb2db754ceaf8af
Author: Ani Sinha <ani@anisinha.ca>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M hw/arm/Kconfig
Log Message:
-----------
hw/arm/Kconfig: no need to enable ACPI_MEMORY_HOTPLUG/ACPI_NVDIMM explicitly
Since commit
36b79e3219d ("hw/acpi/Kconfig: Add missing Kconfig dependencies (build error)"),
ACPI_MEMORY_HOTPLUG and ACPI_NVDIMM is implicitly turned on when
ACPI_HW_REDUCED is selected. ACPI_HW_REDUCED is already enabled. No need to
turn on ACPI_MEMORY_HOTPLUG or ACPI_NVDIMM explicitly. This is a minor cleanup.
Signed-off-by: Ani Sinha <ani@anisinha.ca>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20210819162637.518507-1-ani@anisinha.ca
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 5401b1e08d468d28de1a7f433062f338fc47bad9
https://github.com/qemu/qemu/commit/5401b1e08d468d28de1a7f433062f338fc47bad9
Author: Andrew Jones <drjones@redhat.com>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M target/arm/cpu.h
M target/arm/cpu64.c
Log Message:
-----------
target/arm/cpu: Introduce sve_vq_supported bitmap
Allow CPUs that support SVE to specify which SVE vector lengths they
support by setting them in this bitmap. Currently only the 'max' and
'host' CPU types supports SVE and 'host' requires KVM which obtains
its supported bitmap from the host. So, we only need to initialize the
bitmap for 'max' with TCG. And, since 'max' should support all SVE
vector lengths we simply fill the bitmap. Future CPU types may have
less trivial maps though.
Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210823160647.34028-2-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 927703cc40fb86b10bd7bb5bb0efa8da69fc6db6
https://github.com/qemu/qemu/commit/927703cc40fb86b10bd7bb5bb0efa8da69fc6db6
Author: Andrew Jones <drjones@redhat.com>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M target/arm/kvm64.c
Log Message:
-----------
target/arm/kvm64: Ensure sve vls map is completely clear
bitmap_clear() only clears the given range. While the given
range should be sufficient in this case we might as well be
100% sure all bits are zeroed by using bitmap_zero().
Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210823160647.34028-3-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 5b65e5abeacae691cd13f1dadf7666e63d8b48a6
https://github.com/qemu/qemu/commit/5b65e5abeacae691cd13f1dadf7666e63d8b48a6
Author: Andrew Jones <drjones@redhat.com>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M target/arm/cpu64.c
Log Message:
-----------
target/arm/cpu64: Replace kvm_supported with sve_vq_supported
Now that we have an ARMCPU member sve_vq_supported we no longer
need the local kvm_supported bitmap for KVM's supported vector
lengths.
Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210823160647.34028-4-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 022707e5d617de2811d9447887ce67e187258613
https://github.com/qemu/qemu/commit/022707e5d617de2811d9447887ce67e187258613
Author: Andrew Jones <drjones@redhat.com>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M target/arm/cpu64.c
Log Message:
-----------
target/arm/cpu64: Validate sve vector lengths are supported
Future CPU types may specify which vector lengths are supported.
We can apply nearly the same logic to validate those lengths
as we do for KVM's supported vector lengths. We merge the code
where we can, but unfortunately can't completely merge it because
KVM requires all vector lengths, power-of-two or not, smaller than
the maximum enabled length to also be enabled. The architecture
only requires all the power-of-two lengths, though, so TCG will
only enforce that.
Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210823160647.34028-5-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 444fa22549434331db70718f073432ed2057ada8
https://github.com/qemu/qemu/commit/444fa22549434331db70718f073432ed2057ada8
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
A docs/specs/acpi_cpu_hotplug.rst
R docs/specs/acpi_cpu_hotplug.txt
M docs/specs/index.rst
Log Message:
-----------
docs/specs/acpu_cpu_hotplug: Convert to rST
Do a basic conversion of the acpi_cpu_hotplug spec document to rST.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Message-id: 20210727170414.3368-2-peter.maydell@linaro.org
Commit: 615a55827c590d75bff8a660fc20675fea6c73d3
https://github.com/qemu/qemu/commit/615a55827c590d75bff8a660fc20675fea6c73d3
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
A docs/specs/acpi_mem_hotplug.rst
R docs/specs/acpi_mem_hotplug.txt
M docs/specs/index.rst
Log Message:
-----------
docs/specs/acpi_mem_hotplug: Convert to rST
Convert the acpi memory hotplug spec to rST.
Note that this includes converting a lot of weird whitespace
characters to plain old spaces (the rST parser does not like
whatever the old ones were).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Message-id: 20210727170414.3368-3-peter.maydell@linaro.org
Commit: f054eb1c920671fe1055a62714087ec05aa09348
https://github.com/qemu/qemu/commit/f054eb1c920671fe1055a62714087ec05aa09348
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
A docs/specs/acpi_pci_hotplug.rst
R docs/specs/acpi_pci_hotplug.txt
M docs/specs/index.rst
Log Message:
-----------
docs/specs/acpi_pci_hotplug: Convert to rST
Convert the PCI hotplug spec document to rST.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Commit: 50f8174c5c12e887693fb17fc99cfd802192e0fa
https://github.com/qemu/qemu/commit/50f8174c5c12e887693fb17fc99cfd802192e0fa
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
A docs/specs/acpi_nvdimm.rst
R docs/specs/acpi_nvdimm.txt
M docs/specs/index.rst
Log Message:
-----------
docs/specs/acpi_nvdimm: Convert to rST
Convert the ACPI NVDIMM spec document to rST.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Message-id: 20210727170414.3368-5-peter.maydell@linaro.org
Commit: fcc6f733690f54ed0409585db619d05b34c8e751
https://github.com/qemu/qemu/commit/fcc6f733690f54ed0409585db619d05b34c8e751
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Add ACPI specs documents to ACPI and NVDIMM sections
Add entries for the ACPI specs documents in docs/specs to
appropriate sections of MAINTAINERS.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Message-id: 20210727170414.3368-6-peter.maydell@linaro.org
Commit: 6773fbf8c07c58429ca876ddea760f604d0497a8
https://github.com/qemu/qemu/commit/6773fbf8c07c58429ca876ddea760f604d0497a8
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M include/sysemu/arch_init.h
M softmmu/arch_init.c
M softmmu/vl.c
Log Message:
-----------
softmmu: Use accel_find("xen") instead of xen_available()
The xen_available() function is used only to produce an error
for some Xen-specific command line options in QEMU binaries where
Xen support was not compiled in: it just returns the value of
the CONFIG_XEN define.
Now that accelerators are QOM classes, we can check for
"does this binary have Xen compiled in" with accel_find("xen"),
and drop the xen_available() function.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210730105947.28215-2-peter.maydell@linaro.org
Commit: 4f9205be45ab84398e6ef3bb10af01b3f4a9cef7
https://github.com/qemu/qemu/commit/4f9205be45ab84398e6ef3bb10af01b3f4a9cef7
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M include/sysemu/arch_init.h
M monitor/qmp-cmds.c
M softmmu/arch_init.c
Log Message:
-----------
monitor: Use accel_find("kvm") instead of kvm_available()
The kvm_available() function reports whether KVM support was
compiled into the QEMU binary; it returns the value of the
CONFIG_KVM define.
The only place in the codebase where we use this function is
in qmp_query_kvm(). Now that accelerators are based on QOM
classes we can instead use accel_find("kvm") and remove the
kvm_available() function.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210730105947.28215-3-peter.maydell@linaro.org
Commit: ed5d8c9d1c38d4022294741eb759d42bd7690948
https://github.com/qemu/qemu/commit/ed5d8c9d1c38d4022294741eb759d42bd7690948
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M softmmu/arch_init.c
Log Message:
-----------
softmmu/arch_init.c: Trim down include list
arch_init.c does very little but has a long list of #include lines.
Remove all the unnecessary ones.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210730105947.28215-4-peter.maydell@linaro.org
Commit: cb2c553152d3c78eb08b1393ae074acdfd43eda9
https://github.com/qemu/qemu/commit/cb2c553152d3c78eb08b1393ae074acdfd43eda9
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M meson.build
M softmmu/arch_init.c
Log Message:
-----------
meson.build: Define QEMU_ARCH in config-target.h
Instead of using an ifdef ladder in arch_init.c (which we then have
to manually update every time we add or remove a target
architecture), have meson.build put "#define QEMU_ARCH QEMU_ARCH_FOO"
in the config-target.h file.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210730105947.28215-5-peter.maydell@linaro.org
Commit: cc68292e86f594142ef3770f72adccb103220716
https://github.com/qemu/qemu/commit/cc68292e86f594142ef3770f72adccb103220716
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M include/sysemu/arch_init.h
Log Message:
-----------
arch_init.h: Add QEMU_ARCH_HEXAGON
When Hexagon was added we forgot to add it to the QEMU_ARCH_*
enumeration. This doesn't cause a visible effect because at the
moment Hexagon is linux-user only and the QEMU_ARCH_* constants are
only used in softmmu, but we might as well add it in, since it's the
only architecture currently missing from the list.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Message-id: 20210730105947.28215-6-peter.maydell@linaro.org
Commit: 3669282cde01809edac8c91f61da50da2a83b067
https://github.com/qemu/qemu/commit/3669282cde01809edac8c91f61da50da2a83b067
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M include/sysemu/arch_init.h
M softmmu/qdev-monitor.c
Log Message:
-----------
arch_init.h: Move QEMU_ARCH_VIRTIO_* to qdev-monitor.c
The QEMU_ARCH_VIRTIO_* defines are used only in one file,
qdev-monitor.c. Move them to that file.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Message-id: 20210730105947.28215-7-peter.maydell@linaro.org
Commit: 7f4c520dac8c8d39e3d19db5a7e6e74693c9c6a4
https://github.com/qemu/qemu/commit/7f4c520dac8c8d39e3d19db5a7e6e74693c9c6a4
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M blockdev.c
M hw/i386/pc.c
M hw/i386/pc_piix.c
M hw/i386/pc_q35.c
M hw/mips/jazz.c
M hw/mips/malta.c
M hw/ppc/prep.c
M hw/riscv/sifive_e.c
M hw/riscv/sifive_u.c
M hw/riscv/spike.c
M hw/riscv/virt.c
M monitor/qmp-cmds.c
M target/ppc/cpu_init.c
M target/s390x/cpu-sysemu.c
Log Message:
-----------
arch_init.h: Don't include arch_init.h unnecessarily
arch_init.h only defines the QEMU_ARCH_* enumeration and the
arch_type global. Don't include it in files that don't use those.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210730105947.28215-8-peter.maydell@linaro.org
Commit: 62fffaa6c9244bc1ee10da6bceacea3ae6c6431a
https://github.com/qemu/qemu/commit/62fffaa6c9244bc1ee10da6bceacea3ae6c6431a
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M include/sysemu/arch_init.h
R stubs/arch_type.c
M stubs/meson.build
Log Message:
-----------
stubs: Remove unused arch_type.c stub
We added a stub for the arch_type global in commit 5964ed56d9a1 so
that we could compile blockdev.c into the tools. However, in commit
9db1d3a2be9bf we removed the only use of arch_type from blockdev.c.
The stub is therefore no longer needed, and we can delete it again,
together with the QEMU_ARCH_NONE value that only the stub was using.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210730105947.28215-9-peter.maydell@linaro.org
Commit: 312c496a95430dcabe0028e5a68d595c9411aa91
https://github.com/qemu/qemu/commit/312c496a95430dcabe0028e5a68d595c9411aa91
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M hw/core/loader.c
Log Message:
-----------
hw/core/loader: In gunzip(), check index is in range before use, not after
The gunzip() function reads various fields from a passed in source
buffer in order to skip a header before passing the actual compressed
data to the zlib inflate() function. It does check whether the
passed in buffer is too small, but unfortunately it checks that only
after reading bytes from the src buffer, so it could read off the end
of the buffer.
You can see this with valgrind:
$ printf "%b" '\x1f\x8b' > /tmp/image
$ valgrind qemu-system-aarch64 -display none -M virt -cpu max -kernel
/tmp/image
[...]
==19224== Invalid read of size 1
==19224== at 0x67302E: gunzip (loader.c:558)
==19224== by 0x673907: load_image_gzipped_buffer (loader.c:788)
==19224== by 0xA18032: load_aarch64_image (boot.c:932)
==19224== by 0xA18489: arm_setup_direct_kernel_boot (boot.c:1063)
==19224== by 0xA18D90: arm_load_kernel (boot.c:1317)
==19224== by 0x9F3651: machvirt_init (virt.c:2114)
==19224== by 0x794B7A: machine_run_board_init (machine.c:1272)
==19224== by 0xD5CAD3: qemu_init_board (vl.c:2618)
==19224== by 0xD5CCA6: qmp_x_exit_preconfig (vl.c:2692)
==19224== by 0xD5F32E: qemu_init (vl.c:3713)
==19224== by 0x5ADDB1: main (main.c:49)
==19224== Address 0x3802a873 is 0 bytes after a block of size 3 alloc'd
==19224== at 0x4C31B0F: malloc (in
/usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so)
==19224== by 0x61E7657: g_file_get_contents (in
/usr/lib/x86_64-linux-gnu/libglib-2.0.so.0.5600.4)
==19224== by 0x673895: load_image_gzipped_buffer (loader.c:771)
==19224== by 0xA18032: load_aarch64_image (boot.c:932)
==19224== by 0xA18489: arm_setup_direct_kernel_boot (boot.c:1063)
==19224== by 0xA18D90: arm_load_kernel (boot.c:1317)
==19224== by 0x9F3651: machvirt_init (virt.c:2114)
==19224== by 0x794B7A: machine_run_board_init (machine.c:1272)
==19224== by 0xD5CAD3: qemu_init_board (vl.c:2618)
==19224== by 0xD5CCA6: qmp_x_exit_preconfig (vl.c:2692)
==19224== by 0xD5F32E: qemu_init (vl.c:3713)
==19224== by 0x5ADDB1: main (main.c:49)
Check that we have enough bytes of data to read the header bytes that
we read before we read them.
Fixes: Coverity 1458997
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210812141803.20913-1-peter.maydell@linaro.org
Commit: 8f1bdb0ea136c38cf963f5fafff103e1b6fb488d
https://github.com/qemu/qemu/commit/8f1bdb0ea136c38cf963f5fafff103e1b6fb488d
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M softmmu/physmem.c
Log Message:
-----------
softmmu/physmem.c: Remove unneeded NULL check in qemu_ram_alloc_from_fd()
In the alignment check added to qemu_ram_alloc_from_fd() in commit
ce317be98db0dfdfa, the condition includes a check that 'mr' is not
NULL. This check is unnecessary because we can assume that the
caller always passes us a valid MemoryRegion, and indeed later in the
function we assume mr is not NULL when we pass it to file_ram_alloc()
as new_block->mr. Remove it.
Fixes: Coverity 1459867
Fixes: ce317be98d ("exec: fetch the alignment of Linux devdax pmem character
device nodes")
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Jingqi Liu <jingqi.liu@intel.com>
Message-id: 20210812150624.29139-1-peter.maydell@linaro.org
Commit: 8efdb7ba1b2acce9fb63ccc2e7982e19fdf5be86
https://github.com/qemu/qemu/commit/8efdb7ba1b2acce9fb63ccc2e7982e19fdf5be86
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M softmmu/physmem.c
Log Message:
-----------
softmmu/physmem.c: Check return value from realpath()
The realpath() function can return NULL on error, so we need to check
for it to avoid crashing when we try to strstr() into it.
This can happen if we run out of memory, or if /sys/ is not mounted,
among other situations.
Fixes: Coverity 1459913, 1460474
Fixes: ce317be98db0 ("exec: fetch the alignment of Linux devdax pmem character
device nodes")
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Jingqi Liu <jingqi.liu@intel.com>
Message-id: 20210812151525.31456-1-peter.maydell@linaro.org
Commit: 59292384621e93f707f862b6936694e56a6daed0
https://github.com/qemu/qemu/commit/59292384621e93f707f862b6936694e56a6daed0
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M net/net.c
Log Message:
-----------
net: Zero sockaddr_in in parse_host_port()
We don't currently zero-initialize the 'struct sockaddr_in' that
parse_host_port() fills in, so any fields we don't explicitly
initialize might be left as random garbage. POSIX states that
implementations may define extensions in sockaddr_in, and that those
extensions must not trigger if zero-initialized. So not zero
initializing might result in inadvertently triggering an impdef
extension.
memset() the sockaddr_in before we start to fill it in.
Fixes: Coverity CID 1005338
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-id: 20210813150506.7768-2-peter.maydell@linaro.org
Commit: fdcdf54d1e93792c66e7566cec4638786990174e
https://github.com/qemu/qemu/commit/fdcdf54d1e93792c66e7566cec4638786990174e
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M gdbstub.c
Log Message:
-----------
gdbstub: Zero-initialize sockaddr structs
Zero-initialize sockaddr_in and sockaddr_un structs that we're about
to fill in and pass to bind() or connect(), to ensure we don't leave
possible implementation-defined extension fields as uninitialized
garbage.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-id: 20210813150506.7768-3-peter.maydell@linaro.org
Commit: a8ca0033c25939d609c1bab12f6b8402ff719552
https://github.com/qemu/qemu/commit/a8ca0033c25939d609c1bab12f6b8402ff719552
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M tests/qtest/ipmi-bt-test.c
Log Message:
-----------
tests/qtest/ipmi-bt-test: Zero-initialize sockaddr struct
Zero-initialize the sockaddr_in struct that we're about to fill in
and pass to bind(), to ensure we don't leave possible
implementation-defined extension fields as uninitialized garbage.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Corey Minyard <cminyard@mvista.com>
Acked-by: Thomas Huth <thuth@redhat.com>
Message-id: 20210813150506.7768-4-peter.maydell@linaro.org
Commit: baa873f7508df9f622c9d1ed43d3a03c9cce785c
https://github.com/qemu/qemu/commit/baa873f7508df9f622c9d1ed43d3a03c9cce785c
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M tests/tcg/multiarch/linux-test.c
Log Message:
-----------
tests/tcg/multiarch/linux-test: Zero-initialize sockaddr structs
Zero-initialize sockaddr_in and sockaddr_un structs that we're about
to fill in and pass to bind() or connect(), to ensure we don't leave
possible implementation-defined extension fields as uninitialized
garbage.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-id: 20210813150506.7768-5-peter.maydell@linaro.org
Commit: 33c20e3caf82096e7fd50eed0d47778109f62081
https://github.com/qemu/qemu/commit/33c20e3caf82096e7fd50eed0d47778109f62081
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M hw/arm/raspi.c
Log Message:
-----------
raspi: Use error_fatal for SoC realize errors, not error_abort
The SoC realize can fail for legitimate reasons, because it propagates
errors up from CPU realize, which in turn can be provoked by user
error in setting commandline options. Use error_fatal so we report
the error message to the user and exit, rather than asserting
via error_abort.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210816135842.25302-2-peter.maydell@linaro.org
Commit: 49e7f191cab7cdb83c6a278a8a83a3334f416c96
https://github.com/qemu/qemu/commit/49e7f191cab7cdb83c6a278a8a83a3334f416c96
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M target/arm/cpu.c
Log Message:
-----------
target/arm: Avoid assertion trying to use KVM and multiple ASes
KVM cannot support multiple address spaces per CPU; if you try to
create more than one then cpu_address_space_init() will assert.
In the Arm CPU realize function, detect the configurations which
would cause us to need more than one AS, and cleanly fail the
realize rather than blundering on into the assertion. This
turns this:
$ qemu-system-aarch64 -enable-kvm -display none -cpu max -machine raspi3b
qemu-system-aarch64: ../../softmmu/physmem.c:747: cpu_address_space_init:
Assertion `asidx == 0 || !kvm_enabled()' failed.
Aborted
into:
$ qemu-system-aarch64 -enable-kvm -display none -machine raspi3b
qemu-system-aarch64: Cannot enable KVM when guest CPU has EL3 enabled
and this:
$ qemu-system-aarch64 -enable-kvm -display none -machine mps3-an524
qemu-system-aarch64: ../../softmmu/physmem.c:747: cpu_address_space_init:
Assertion `asidx == 0 || !kvm_enabled()' failed.
Aborted
into:
$ qemu-system-aarch64 -enable-kvm -display none -machine mps3-an524
qemu-system-aarch64: Cannot enable KVM when using an M-profile guest CPU
Fixes: https://gitlab.com/qemu-project/qemu/-/issues/528
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210816135842.25302-3-peter.maydell@linaro.org
Commit: 665cddbe15fdc5f5c66caac62472bd5af1e23e10
https://github.com/qemu/qemu/commit/665cddbe15fdc5f5c66caac62472bd5af1e23e10
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M hw/arm/virt.c
Log Message:
-----------
hw/arm/virt: Delete EL3 error checksnow provided in CPU realize
Now that the CPU realize function will fail cleanly if we ask for EL3
when KVM is enabled, we don't need to check for errors explicitly in
the virt board code. The reported message is slightly different;
it is now:
qemu-system-aarch64: Cannot enable KVM when guest CPU has EL3 enabled
instead of:
qemu-system-aarch64: mach-virt: KVM does not support Security extensions
We don't delete the MTE check because there the logic is more
complex; deleting the check would work but makes the error message
less helpful, as it would read:
qemu-system-aarch64: MTE requested, but not supported by the guest CPU
instead of:
qemu-system-aarch64: mach-virt: KVM does not support providing MTE to the
guest CPU
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210816135842.25302-4-peter.maydell@linaro.org
Commit: cc7613bfaa1f653a6eb6ff50ac45d5c5fd717052
https://github.com/qemu/qemu/commit/cc7613bfaa1f653a6eb6ff50ac45d5c5fd717052
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M target/arm/cpu.h
M target/arm/helper.c
Log Message:
-----------
target/arm: Implement HSTR.TTEE
In v7, the HSTR register has a TTEE bit which allows EL0/EL1 accesses
to the Thumb2EE TEECR and TEEHBR registers to be trapped to the
hypervisor. Implement these traps.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210816180305.20137-2-peter.maydell@linaro.org
Commit: 8e228c9e4bcfea634e7ee404f4d13136d2072c71
https://github.com/qemu/qemu/commit/8e228c9e4bcfea634e7ee404f4d13136d2072c71
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M target/arm/cpu.h
M target/arm/helper.c
M target/arm/helper.h
M target/arm/op_helper.c
M target/arm/syndrome.h
M target/arm/translate.c
Log Message:
-----------
target/arm: Implement HSTR.TJDBX
In v7A, the HSTR register has a TJDBX bit which traps NS EL0/EL1
access to the JOSCR and JMCR trivial Jazelle registers, and also BXJ.
Implement these traps. In v8A this HSTR bit doesn't exist, so don't
trap for v8A CPUs.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210816180305.20137-3-peter.maydell@linaro.org
Commit: e784807cd26314071290a036b5a70322eda31db1
https://github.com/qemu/qemu/commit/e784807cd26314071290a036b5a70322eda31db1
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M linux-user/arm/signal.c
M target/arm/cpu.h
M target/arm/helper.c
Log Message:
-----------
target/arm: Do hflags rebuild in cpsr_write()
Currently we rely on all the callsites of cpsr_write() to rebuild the
cached hflags if they change one of the CPSR bits which we use as a
TB flag and cache in hflags. This is a bit awkward when we want to
change the set of CPSR bits that we cache, because it means we need
to re-audit all the cpsr_write() callsites to see which flags they
are writing and whether they now need to rebuild the hflags.
Switch instead to making cpsr_write() call arm_rebuild_hflags()
itself if one of the bits being changed is a cached bit.
We don't do the rebuild for the CPSRWriteRaw write type, because that
kind of write is generally doing something special anyway. For the
CPSRWriteRaw callsites in the KVM code and inbound migration we
definitely don't want to recalculate the hflags; the callsites in
boot.c and arm-powerctl.c have to do a rebuild-hflags call themselves
anyway because of other CPU state changes they make.
This allows us to drop explicit arm_rebuild_hflags() calls in a
couple of places where the only reason we needed to call it was the
CPSR write.
This fixes a bug where we were incorrectly failing to rebuild hflags
in the code path for a gdbstub write to CPSR, which meant that you
could make QEMU assert by breaking into a running guest, altering the
CPSR to change the value of, for example, CPSR.E, and then
continuing.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210817201843.3829-1-peter.maydell@linaro.org
Commit: 9a0fcb7f5fd04fcbfd9a611789806614fa5d2365
https://github.com/qemu/qemu/commit/9a0fcb7f5fd04fcbfd9a611789806614fa5d2365
Author: Tong Ho <tong.ho@xilinx.com>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M hw/arm/xlnx-versal.c
M include/hw/arm/xlnx-versal.h
Log Message:
-----------
hw/arm/xlnx-versal: Add unimplemented APU mmio
Add unimplemented APU mmio region to xlnx-versal for booting
bare-metal guests built with standalone bsp, which access the
region from one of the following places:
https://github.com/Xilinx/embeddedsw/blob/release-2020.2/lib/bsp/standalone/src/arm/ARMv8/64bit/armclang/boot.S#L139
https://github.com/Xilinx/embeddedsw/blob/release-2020.2/lib/bsp/standalone/src/arm/ARMv8/64bit/gcc/boot.S#L183
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Tong Ho <tong.ho@xilinx.com>
Message-id: 20210823173818.201259-2-tong.ho@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: d2e6f370138a7f32bc28b20dcd55374b7a638f39
https://github.com/qemu/qemu/commit/d2e6f370138a7f32bc28b20dcd55374b7a638f39
Author: Tong Ho <tong.ho@xilinx.com>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M hw/arm/xlnx-zynqmp.c
M include/hw/arm/xlnx-zynqmp.h
Log Message:
-----------
hw/arm/xlnx-zynqmp: Add unimplemented APU mmio
Add unimplemented APU mmio region to xlnx-zynqmp for booting
bare-metal guests built with standalone bsp, which access the
region from one of the following places:
https://github.com/Xilinx/embeddedsw/blob/release-2020.2/lib/bsp/standalone/src/arm/ARMv8/64bit/armclang/boot.S#L139
https://github.com/Xilinx/embeddedsw/blob/release-2020.2/lib/bsp/standalone/src/arm/ARMv8/64bit/gcc/boot.S#L183
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Tong Ho <tong.ho@xilinx.com>
Message-id: 20210823173818.201259-3-tong.ho@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: f214d8e0150766c31172e16ef4b17674f549d852
https://github.com/qemu/qemu/commit/f214d8e0150766c31172e16ef4b17674f549d852
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-08-26 (Thu, 26 Aug 2021)
Changed paths:
M MAINTAINERS
M blockdev.c
A docs/specs/acpi_cpu_hotplug.rst
R docs/specs/acpi_cpu_hotplug.txt
A docs/specs/acpi_mem_hotplug.rst
R docs/specs/acpi_mem_hotplug.txt
A docs/specs/acpi_nvdimm.rst
R docs/specs/acpi_nvdimm.txt
A docs/specs/acpi_pci_hotplug.rst
R docs/specs/acpi_pci_hotplug.txt
M docs/specs/index.rst
M gdbstub.c
M hw/arm/Kconfig
M hw/arm/raspi.c
M hw/arm/virt.c
M hw/arm/xlnx-versal.c
M hw/arm/xlnx-zynqmp.c
M hw/core/loader.c
M hw/dma/xlnx-zdma.c
M hw/dma/xlnx_csu_dma.c
M hw/i386/pc.c
M hw/i386/pc_piix.c
M hw/i386/pc_q35.c
M hw/mips/jazz.c
M hw/mips/malta.c
M hw/ppc/prep.c
M hw/riscv/sifive_e.c
M hw/riscv/sifive_u.c
M hw/riscv/spike.c
M hw/riscv/virt.c
M include/hw/arm/xlnx-versal.h
M include/hw/arm/xlnx-zynqmp.h
M include/hw/dma/xlnx-zdma.h
M include/hw/dma/xlnx_csu_dma.h
M include/sysemu/arch_init.h
M linux-user/arm/signal.c
M meson.build
M monitor/qmp-cmds.c
M net/net.c
M softmmu/arch_init.c
M softmmu/physmem.c
M softmmu/qdev-monitor.c
M softmmu/vl.c
R stubs/arch_type.c
M stubs/meson.build
M target/arm/cpu.c
M target/arm/cpu.h
M target/arm/cpu64.c
M target/arm/helper.c
M target/arm/helper.h
M target/arm/kvm64.c
M target/arm/op_helper.c
M target/arm/syndrome.h
M target/arm/translate.c
M target/ppc/cpu_init.c
M target/s390x/cpu-sysemu.c
M tests/qtest/ipmi-bt-test.c
M tests/tcg/multiarch/linux-test.c
Log Message:
-----------
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210826'
into staging
target-arm queue:
* hw/dma/xlnx-zdma, xlnx_csu_dma: Require 'dma' link property to be set
* hw/arm/Kconfig: no need to enable ACPI_MEMORY_HOTPLUG/ACPI_NVDIMM explicitly
* target/arm/cpu: Introduce sve_vq_supported bitmap
* docs/specs: Convert ACPI spec docs to rST
* arch_init: Clean up and refactoring
* hw/core/loader: In gunzip(), check index is in range before use, not after
* softmmu/physmem.c: Remove unneeded NULL check in qemu_ram_alloc_from_fd()
* softmmu/physmem.c: Check return value from realpath()
* Zero-initialize sockaddr_in structs
* raspi: Use error_fatal for SoC realize errors, not error_abort
* target/arm: Avoid assertion trying to use KVM and multiple ASes
* target/arm: Implement HSTR.TTEE
* target/arm: Implement HSTR.TJDBX
* target/arm: Do hflags rebuild in cpsr_write()
* hw/arm/xlnx-versal, xlnx-zynqmp: Add unimplemented APU mmio
# gpg: Signature made Thu 26 Aug 2021 18:02:10 BST
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
[ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20210826: (37 commits)
hw/arm/xlnx-zynqmp: Add unimplemented APU mmio
hw/arm/xlnx-versal: Add unimplemented APU mmio
target/arm: Do hflags rebuild in cpsr_write()
target/arm: Implement HSTR.TJDBX
target/arm: Implement HSTR.TTEE
hw/arm/virt: Delete EL3 error checksnow provided in CPU realize
target/arm: Avoid assertion trying to use KVM and multiple ASes
raspi: Use error_fatal for SoC realize errors, not error_abort
tests/tcg/multiarch/linux-test: Zero-initialize sockaddr structs
tests/qtest/ipmi-bt-test: Zero-initialize sockaddr struct
gdbstub: Zero-initialize sockaddr structs
net: Zero sockaddr_in in parse_host_port()
softmmu/physmem.c: Check return value from realpath()
softmmu/physmem.c: Remove unneeded NULL check in qemu_ram_alloc_from_fd()
hw/core/loader: In gunzip(), check index is in range before use, not after
stubs: Remove unused arch_type.c stub
arch_init.h: Don't include arch_init.h unnecessarily
arch_init.h: Move QEMU_ARCH_VIRTIO_* to qdev-monitor.c
arch_init.h: Add QEMU_ARCH_HEXAGON
meson.build: Define QEMU_ARCH in config-target.h
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Compare: https://github.com/qemu/qemu/compare/c83fcfaf8a54...f214d8e01507