[Qemu-commits] [qemu/qemu] 952fd6: qemu/atomic: Use macros for CONFIG

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[Qemu-commits] [qemu/qemu] 952fd6: qemu/atomic: Use macros for CONFIG_AT

From:	Peter Maydell
Subject:	[Qemu-commits] [qemu/qemu] 952fd6: qemu/atomic: Use macros for CONFIG_ATOMIC64
Date:	Thu, 22 Jul 2021 06:06:23 -0700
  Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: 952fd6710e01037746de24f41e63cb4d8cbd49bc
      
https://github.com/qemu/qemu/commit/952fd6710e01037746de24f41e63cb4d8cbd49bc
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M include/qemu/atomic.h

  Log Message:
  -----------
  qemu/atomic: Use macros for CONFIG_ATOMIC64

Clang warnings about questionable atomic usage get localized
to the inline function in atomic.h.  By using a macro, we get
the full traceback to the original use that caused the warning.

Tested-by: Cole Robinson <crobinso@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 47345e7124709d280f14551113a20fd81ad2bf20
      
https://github.com/qemu/qemu/commit/47345e7124709d280f14551113a20fd81ad2bf20
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M configure
    M include/qemu/atomic.h

  Log Message:
  -----------
  qemu/atomic: Remove pre-C11 atomic fallbacks

We now require c11, so the fallbacks are now dead code

Tested-by: Cole Robinson <crobinso@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 9ef0c6d6a7d81992a2326416a9ce12eef2824861
      
https://github.com/qemu/qemu/commit/9ef0c6d6a7d81992a2326416a9ce12eef2824861
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M accel/tcg/atomic_template.h
    M include/qemu/atomic.h
    M include/qemu/stats64.h
    M linux-user/hppa/cpu_loop.c
    M softmmu/timers-state.h
    M util/qsp.c

  Log Message:
  -----------
  qemu/atomic: Add aligned_{int64,uint64}_t types

Use it to avoid some clang-12 -Watomic-alignment errors,
forcing some structures to be aligned and as a pointer when
we have ensured that the address is aligned.

Tested-by: Cole Robinson <crobinso@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: be9568b4e02100681af14ab2d17522c3d497f511
      
https://github.com/qemu/qemu/commit/be9568b4e02100681af14ab2d17522c3d497f511
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M accel/tcg/cputlb.c
    M accel/tcg/user-exec.c
    M include/tcg/tcg.h
    M target/arm/helper-a64.c
    M target/i386/tcg/mem_helper.c
    M target/m68k/op_helper.c
    M target/ppc/mem_helper.c
    M target/s390x/tcg/mem_helper.c

  Log Message:
  -----------
  tcg: Rename helper_atomic_*_mmu and provide for user-only

Always provide the atomic interface using TCGMemOpIdx oi
and uintptr_t retaddr.  Rename from helper_* to cpu_* so
as to (mostly) match the exec/cpu_ldst.h functions, and
to emphasize that they are not callable from TCG directly.

Tested-by: Cole Robinson <crobinso@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: e28a86643842014d2a1cacb4fe9370ef53e28dc6
      
https://github.com/qemu/qemu/commit/e28a86643842014d2a1cacb4fe9370ef53e28dc6
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M accel/tcg/atomic_common.c.inc
    M accel/tcg/cputlb.c
    M accel/tcg/tcg-runtime.h
    M accel/tcg/user-exec.c
    M tcg/tcg-op.c

  Log Message:
  -----------
  accel/tcg: Standardize atomic helpers on softmmu api

Reduce the amount of code duplication by always passing
the TCGMemOpIdx argument to helper_atomic_*.  This is not
currently used for user-only, but it's easy to ignore.

Tested-by: Cole Robinson <crobinso@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 48688fafeb6e9f462837abb39a9c286e39d398e4
      
https://github.com/qemu/qemu/commit/48688fafeb6e9f462837abb39a9c286e39d398e4
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M accel/tcg/atomic_template.h
    M accel/tcg/cputlb.c
    M accel/tcg/user-exec.c

  Log Message:
  -----------
  accel/tcg: Fold EXTRA_ARGS into atomic_template.h

All instances of EXTRA_ARGS are now identical.

Tested-by: Cole Robinson <crobinso@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: fcff001441b413ae45d50fe7b301d7bb3217ebc7
      
https://github.com/qemu/qemu/commit/fcff001441b413ae45d50fe7b301d7bb3217ebc7
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M accel/tcg/atomic_template.h
    M accel/tcg/cputlb.c
    M accel/tcg/user-exec.c

  Log Message:
  -----------
  accel/tcg: Remove ATOMIC_MMU_DECLS

All definitions are now empty.

Tested-by: Cole Robinson <crobinso@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: a754f7f34e9c74adf65a0149c5e2382077a6e594
      
https://github.com/qemu/qemu/commit/a754f7f34e9c74adf65a0149c5e2382077a6e594
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M accel/tcg/atomic_template.h
    M accel/tcg/cputlb.c
    M accel/tcg/user-exec.c

  Log Message:
  -----------
  accel/tcg: Expand ATOMIC_MMU_LOOKUP_*

Unify the parameters of atomic_mmu_lookup between cputlb.c and
user-exec.c.  Call the function directly, and remove the macros.

Tested-by: Cole Robinson <crobinso@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 785ea711b114452889016f0d292b8f9e9da31752
      
https://github.com/qemu/qemu/commit/785ea711b114452889016f0d292b8f9e9da31752
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M plugins/core.c
    R trace/mem-internal.h
    M trace/mem.h

  Log Message:
  -----------
  trace: Fold mem-internal.h into mem.h

Since the last thing that mem.h does is include mem-internal.h,
the symbols are not actually private.

Tested-by: Cole Robinson <crobinso@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: f3e182b10013c042b8ab555e4220da7b163862b9
      
https://github.com/qemu/qemu/commit/f3e182b10013c042b8ab555e4220da7b163862b9
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M accel/tcg/atomic_common.c.inc
    M accel/tcg/atomic_template.h

  Log Message:
  -----------
  accel/tcg: Push trace info building into atomic_common.c.inc

Use trace_mem_get_info instead of trace_mem_build_info,
using the TCGMemOpIdx that we already have.  Do this in
the atomic_trace_*_pre function as common subroutines.

Tested-by: Cole Robinson <crobinso@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 78ff82bb1b67c0d79113688e4b3427fc99cab9d4
      
https://github.com/qemu/qemu/commit/78ff82bb1b67c0d79113688e4b3427fc99cab9d4
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M accel/tcg/translate-all.c
    M include/exec/exec-all.h

  Log Message:
  -----------
  accel/tcg: Reduce CF_COUNT_MASK to match TCG_MAX_INSNS

The space reserved for CF_COUNT_MASK was overly large.
Reduce to free up cflags bits and eliminate an extra test.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20210717221851.2124573-2-richard.henderson@linaro.org>


  Commit: 043e35d98c0865a7396783b57b74359cfab85c40
      
https://github.com/qemu/qemu/commit/043e35d98c0865a7396783b57b74359cfab85c40
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M accel/tcg/cpu-exec.c
    M include/exec/exec-all.h

  Log Message:
  -----------
  accel/tcg: Move curr_cflags into cpu-exec.c

We will shortly have more than a simple member read here,
with stuff not necessarily exposed to exec/exec-all.h.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210717221851.2124573-3-richard.henderson@linaro.org>


  Commit: 288a5fe980f75c1c6c8a65fc9367c2902f44f4fa
      
https://github.com/qemu/qemu/commit/288a5fe980f75c1c6c8a65fc9367c2902f44f4fa
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M target/alpha/translate.c

  Log Message:
  -----------
  target/alpha: Drop goto_tb path in gen_call_pal

We are certain of a page crossing here, entering the
PALcode image, so the call to use_goto_tb that should
have been here will never succeed.

We are shortly going to add an assert to tcg_gen_goto_tb
that would trigger for this case.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 84f1561629ba5b6942b6edd825a1d14c9f51a25c
      
https://github.com/qemu/qemu/commit/84f1561629ba5b6942b6edd825a1d14c9f51a25c
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M accel/tcg/cpu-exec.c
    M accel/tcg/translator.c
    M include/exec/exec-all.h
    M tcg/tcg-op.c

  Log Message:
  -----------
  accel/tcg: Add CF_NO_GOTO_TB and CF_NO_GOTO_PTR

Move the -d nochain check to bits on tb->cflags.
These will be used for more than -d nochain shortly.

Set bits during curr_cflags, test them in translator_use_goto_tb,
assert we're not doing anything odd in tcg_gen_goto_tb.  The test
in tcg_gen_exit_tb is redundant with the assert for goto_tb_issue_mask.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20210717221851.2124573-4-richard.henderson@linaro.org>


  Commit: fb957011324bd5e2aa2cdc4e276e8e2a3fb6a167
      
https://github.com/qemu/qemu/commit/fb957011324bd5e2aa2cdc4e276e8e2a3fb6a167
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M accel/tcg/cpu-exec.c

  Log Message:
  -----------
  accel/tcg: Drop CF_NO_GOTO_PTR from -d nochain

The purpose of suppressing goto_ptr from -d nochain had been
to return to the main loop so that -d cpu would be recognized.
But we now include -d cpu logging in helper_lookup_tb_ptr so
there is no need to exclude goto_ptr.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20210717221851.2124573-5-richard.henderson@linaro.org>


  Commit: 04f5b647ed07fa9a0c3fcbd439c24d971b60f533
      
https://github.com/qemu/qemu/commit/04f5b647ed07fa9a0c3fcbd439c24d971b60f533
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M accel/tcg/cpu-exec.c
    M accel/tcg/translate-all.c
    M accel/tcg/translator.c

  Log Message:
  -----------
  accel/tcg: Handle -singlestep in curr_cflags

Exchange the test in translator_use_goto_tb for CF_NO_GOTO_TB,
and the test in tb_gen_code for setting CF_COUNT_MASK to 1.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20210717221851.2124573-6-richard.henderson@linaro.org>


  Commit: 258afb487f33267d8dcbbaee6555b2633f74cc7d
      
https://github.com/qemu/qemu/commit/258afb487f33267d8dcbbaee6555b2633f74cc7d
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M accel/tcg/cpu-exec.c

  Log Message:
  -----------
  accel/tcg: Use CF_NO_GOTO_{TB, PTR} in cpu_exec_step_atomic

Request that the one TB returns immediately, so that
we release the exclusive lock as soon as possible.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210717221851.2124573-7-richard.henderson@linaro.org>


  Commit: e3f7c801f1b21b01066c5293f7659f1054c4d63b
      
https://github.com/qemu/qemu/commit/e3f7c801f1b21b01066c5293f7659f1054c4d63b
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M include/hw/core/tcg-cpu-ops.h

  Log Message:
  -----------
  hw/core: Introduce TCGCPUOps.debug_check_breakpoint

New hook to return true when an architectural breakpoint is
to be recognized and false when it should be suppressed.

First use must wait until other pieces are in place.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: b00d86bc8bfe54fd9e4343cfa1f77fbbcbe32d95
      
https://github.com/qemu/qemu/commit/b00d86bc8bfe54fd9e4343cfa1f77fbbcbe32d95
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M target/arm/cpu.c
    M target/arm/cpu_tcg.c
    M target/arm/debug_helper.c
    M target/arm/internals.h

  Log Message:
  -----------
  target/arm: Implement debug_check_breakpoint

Reuse the code at the bottom of helper_check_breakpoints,
which is what we currently call from *_tr_breakpoint_check.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 7b9810ea4269fea04c3b95951fb279dc72db4132
      
https://github.com/qemu/qemu/commit/7b9810ea4269fea04c3b95951fb279dc72db4132
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M target/i386/tcg/tcg-cpu.c

  Log Message:
  -----------
  target/i386: Implement debug_check_breakpoint

Return false for RF set, as we do in i386_tr_breakpoint_check.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 5bc31e944019e46daeb7dd4d19280e8333aa448d
      
https://github.com/qemu/qemu/commit/5bc31e944019e46daeb7dd4d19280e8333aa448d
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M cpu.c
    M include/hw/core/cpu.h

  Log Message:
  -----------
  hw/core: Introduce CPUClass.gdb_adjust_breakpoint

This will allow a breakpoint hack to move out of AVR's translator.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: e64cb6c231e0de00f88d4cd0c4dd3481dacfc0d9
      
https://github.com/qemu/qemu/commit/e64cb6c231e0de00f88d4cd0c4dd3481dacfc0d9
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M target/avr/cpu.c
    M target/avr/cpu.h
    M target/avr/gdbstub.c
    M target/avr/translate.c

  Log Message:
  -----------
  target/avr: Implement gdb_adjust_breakpoint

Ensure at registration that all breakpoints are in
code space, not data space.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 11c1d5f8ca7a72818b3c24093a2c40856022fe0f
      
https://github.com/qemu/qemu/commit/11c1d5f8ca7a72818b3c24093a2c40856022fe0f
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M accel/tcg/cpu-exec.c

  Log Message:
  -----------
  accel/tcg: Merge tb_find into its only caller

We are going to want two things:
(1) check for breakpoints will want to break out of the loop here,
(2) cflags can only be calculated with pc in hand.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 10c37828b213cd490bd20e243916e96f5d588c8d
      
https://github.com/qemu/qemu/commit/10c37828b213cd490bd20e243916e96f5d588c8d
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M accel/tcg/cpu-exec.c
    M accel/tcg/translator.c
    M cpu.c

  Log Message:
  -----------
  accel/tcg: Move breakpoint recognition outside translation

Trigger breakpoints before beginning translation of a TB
that would begin with a BP.  Thus we never generate code
for the BP at all.

Single-step instructions within a page containing a BP so
that we are sure to check each insn for the BP as above.

We no longer need to flush any TBs when changing BPs.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/286
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/404
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/489
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: b5cf74284166c1ecd119388c31b6eca8e1d7b4a6
      
https://github.com/qemu/qemu/commit/b5cf74284166c1ecd119388c31b6eca8e1d7b4a6
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M include/exec/translator.h
    M target/alpha/translate.c
    M target/arm/debug_helper.c
    M target/arm/helper.h
    M target/arm/translate-a64.c
    M target/arm/translate.c
    M target/avr/translate.c
    M target/cris/translate.c
    M target/hexagon/translate.c
    M target/hppa/translate.c
    M target/i386/tcg/translate.c
    M target/m68k/translate.c
    M target/microblaze/translate.c
    M target/mips/tcg/translate.c
    M target/nios2/translate.c
    M target/openrisc/translate.c
    M target/ppc/translate.c
    M target/riscv/translate.c
    M target/rx/translate.c
    M target/s390x/tcg/translate.c
    M target/sh4/translate.c
    M target/sparc/translate.c
    M target/tricore/translate.c
    M target/xtensa/translate.c

  Log Message:
  -----------
  accel/tcg: Remove TranslatorOps.breakpoint_check

The hook is now unused, with breakpoints checked outside translation.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: d40c5c79764db01cb7e495bfcec62df9be481bce
      
https://github.com/qemu/qemu/commit/d40c5c79764db01cb7e495bfcec62df9be481bce
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M accel/tcg/translator.c

  Log Message:
  -----------
  accel/tcg: Hoist tb_cflags to a local in translator_loop

The access internal to tb_cflags() is atomic.
Avoid re-reading it as such for the multiple uses.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: c2ffd7549b14373e9ca68eccd84fab141ffde646
      
https://github.com/qemu/qemu/commit/c2ffd7549b14373e9ca68eccd84fab141ffde646
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-07-21 (Wed, 21 Jul 2021)

  Changed paths:
    M accel/tcg/cpu-exec.c
    M accel/tcg/translate-all.c
    M accel/tcg/translator.c
    M cpu.c
    M include/exec/exec-all.h

  Log Message:
  -----------
  accel/tcg: Record singlestep_enabled in tb->cflags

Set CF_SINGLE_STEP when single-stepping is enabled.
This avoids the need to flush all tb's when turning
single-stepping on or off.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: beb191385882a2a283ce777d76b1a77e71813d14
      
https://github.com/qemu/qemu/commit/beb191385882a2a283ce777d76b1a77e71813d14
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-07-22 (Thu, 22 Jul 2021)

  Changed paths:
    M accel/tcg/atomic_common.c.inc
    M accel/tcg/atomic_template.h
    M accel/tcg/cpu-exec.c
    M accel/tcg/cputlb.c
    M accel/tcg/tcg-runtime.h
    M accel/tcg/translate-all.c
    M accel/tcg/translator.c
    M accel/tcg/user-exec.c
    M configure
    M cpu.c
    M include/exec/exec-all.h
    M include/exec/translator.h
    M include/hw/core/cpu.h
    M include/hw/core/tcg-cpu-ops.h
    M include/qemu/atomic.h
    M include/qemu/stats64.h
    M include/tcg/tcg.h
    M linux-user/hppa/cpu_loop.c
    M plugins/core.c
    M softmmu/timers-state.h
    M target/alpha/translate.c
    M target/arm/cpu.c
    M target/arm/cpu_tcg.c
    M target/arm/debug_helper.c
    M target/arm/helper-a64.c
    M target/arm/helper.h
    M target/arm/internals.h
    M target/arm/translate-a64.c
    M target/arm/translate.c
    M target/avr/cpu.c
    M target/avr/cpu.h
    M target/avr/gdbstub.c
    M target/avr/translate.c
    M target/cris/translate.c
    M target/hexagon/translate.c
    M target/hppa/translate.c
    M target/i386/tcg/mem_helper.c
    M target/i386/tcg/tcg-cpu.c
    M target/i386/tcg/translate.c
    M target/m68k/op_helper.c
    M target/m68k/translate.c
    M target/microblaze/translate.c
    M target/mips/tcg/translate.c
    M target/nios2/translate.c
    M target/openrisc/translate.c
    M target/ppc/mem_helper.c
    M target/ppc/translate.c
    M target/riscv/translate.c
    M target/rx/translate.c
    M target/s390x/tcg/mem_helper.c
    M target/s390x/tcg/translate.c
    M target/sh4/translate.c
    M target/sparc/translate.c
    M target/tricore/translate.c
    M target/xtensa/translate.c
    M tcg/tcg-op.c
    R trace/mem-internal.h
    M trace/mem.h
    M util/qsp.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210721' into 
staging

Atomic build fixes for clang-12
Breakpoint reorg

# gpg: Signature made Wed 21 Jul 2021 20:57:50 BST
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" 
[full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth-gitlab/tags/pull-tcg-20210721: (27 commits)
  accel/tcg: Record singlestep_enabled in tb->cflags
  accel/tcg: Hoist tb_cflags to a local in translator_loop
  accel/tcg: Remove TranslatorOps.breakpoint_check
  accel/tcg: Move breakpoint recognition outside translation
  accel/tcg: Merge tb_find into its only caller
  target/avr: Implement gdb_adjust_breakpoint
  hw/core: Introduce CPUClass.gdb_adjust_breakpoint
  target/i386: Implement debug_check_breakpoint
  target/arm: Implement debug_check_breakpoint
  hw/core: Introduce TCGCPUOps.debug_check_breakpoint
  accel/tcg: Use CF_NO_GOTO_{TB, PTR} in cpu_exec_step_atomic
  accel/tcg: Handle -singlestep in curr_cflags
  accel/tcg: Drop CF_NO_GOTO_PTR from -d nochain
  accel/tcg: Add CF_NO_GOTO_TB and CF_NO_GOTO_PTR
  target/alpha: Drop goto_tb path in gen_call_pal
  accel/tcg: Move curr_cflags into cpu-exec.c
  accel/tcg: Reduce CF_COUNT_MASK to match TCG_MAX_INSNS
  accel/tcg: Push trace info building into atomic_common.c.inc
  trace: Fold mem-internal.h into mem.h
  accel/tcg: Expand ATOMIC_MMU_LOOKUP_*
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


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