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[Qemu-commits] [qemu/qemu] d50766: target/mips: Add declarations for gen
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From: |
Peter Maydell |
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Subject: |
[Qemu-commits] [qemu/qemu] d50766: target/mips: Add declarations for generic TCG helpers |
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Date: |
Sun, 04 Jul 2021 08:02:42 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: d507663151daf1b9942a41ea6677ad81aec61012
https://github.com/qemu/qemu/commit/d507663151daf1b9942a41ea6677ad81aec61012
Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
Date: 2021-07-02 (Fri, 02 Jul 2021)
Changed paths:
M target/mips/tcg/translate.c
M target/mips/tcg/translate.h
Log Message:
-----------
target/mips: Add declarations for generic TCG helpers
We want to extract the microMIPS ISA and Code Compaction ASE to
new compilation units.
We will first extract this code as included source files (.c.inc),
then make them new compilation units afterward.
The following methods are going to be used externally:
micromips_translate.c.inc:1778: gen_ldxs(ctx, rs, rt, rd);
micromips_translate.c.inc:1806: gen_align(ctx, 32, rd, rs, ...
micromips_translate.c.inc:2859: gen_addiupc(ctx, reg, offset, ...
mips16e_translate.c.inc:444: gen_addiupc(ctx, ry, offset, ...
To avoid too much code churn, it is simpler to declare these
prototypes in "translate.h" now.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210617174907.2904067-2-f4bug@amsat.org>
Commit: 3230bad9637b2822705c4b8674db61462fce9004
https://github.com/qemu/qemu/commit/3230bad9637b2822705c4b8674db61462fce9004
Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
Date: 2021-07-02 (Fri, 02 Jul 2021)
Changed paths:
A target/mips/tcg/mips16e_translate.c.inc
M target/mips/tcg/translate.c
Log Message:
-----------
target/mips: Extract Code Compaction ASE translation routines
Extract 1100+ lines from the huge translate.c to a new file,
'mips16e_translate.c.inc'. As there are too many inter-
dependencies we don't compile it as another object, but
keep including it in the big translate.o. We gain in code
maintainability.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201120210844.2625602-10-f4bug@amsat.org>
Commit: bf52c45a8901d838e4211d801c62e8bf4cc2b0fe
https://github.com/qemu/qemu/commit/bf52c45a8901d838e4211d801c62e8bf4cc2b0fe
Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
Date: 2021-07-02 (Fri, 02 Jul 2021)
Changed paths:
A target/mips/tcg/micromips_translate.c.inc
M target/mips/tcg/translate.c
Log Message:
-----------
target/mips: Extract the microMIPS ISA translation routines
Extract 3200+ lines from the huge translate.c to a new file,
'micromips_translate.c.inc'. As there are too many inter-
dependencies we don't compile it as another object, but
keep including it in the big translate.o. We gain in code
maintainability.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201120210844.2625602-12-f4bug@amsat.org>
Commit: 3f178b8d8cc19c5e971d4ac3e1b0b20cf5cb45fa
https://github.com/qemu/qemu/commit/3f178b8d8cc19c5e971d4ac3e1b0b20cf5cb45fa
Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
Date: 2021-07-02 (Fri, 02 Jul 2021)
Changed paths:
M MAINTAINERS
A target/mips/tcg/nanomips_translate.c.inc
M target/mips/tcg/translate.c
Log Message:
-----------
target/mips: Extract nanoMIPS ISA translation routines
Extract 4900 lines from the huge translate.c to a new file,
'nanomips_translate.c.inc'. As there are too many inter-
dependencies we don't compile it as another object, but
keep including it in the big translate.o. We gain in code
maintainability.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201120210844.2625602-13-f4bug@amsat.org>
Commit: 300491f988f649fced2ffd5c46c1bc911fee0e60
https://github.com/qemu/qemu/commit/300491f988f649fced2ffd5c46c1bc911fee0e60
Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
Date: 2021-07-02 (Fri, 02 Jul 2021)
Changed paths:
M hw/pci-host/bonito.c
M hw/pci-host/trace-events
Log Message:
-----------
hw/pci-host/bonito: Trace PCI config accesses smaller than 32-bit
Per the datasheet section "5.7.5. Accessing PCI configuration space"
the address must be 32-bit aligned. Trace eventual accesses not
aligned to 32-bit.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210624202747.1433023-3-f4bug@amsat.org>
Commit: 711ef3373135f879459ece3b3c756b615334b404
https://github.com/qemu/qemu/commit/711ef3373135f879459ece3b3c756b615334b404
Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
Date: 2021-07-02 (Fri, 02 Jul 2021)
Changed paths:
M hw/pci-host/bonito.c
Log Message:
-----------
hw/pci-host/bonito: Allow PCI config accesses smaller than 32-bit
When running the official PMON firmware for the Fuloong 2E, we see
8-bit and 16-bit accesses to PCI config space:
$ qemu-system-mips64el -M fuloong2e -bios pmon_2e.bin \
-trace -trace bonito\* -trace pci_cfg\*
pci_cfg_write vt82c686b-pm 05:4 @0x90 <- 0xeee1
bonito_spciconf_small_access PCI config address is smaller then 32-bit, addr:
0x4d2, size: 2
pci_cfg_write vt82c686b-pm 05:4 @0xd2 <- 0x1
pci_cfg_write vt82c686b-pm 05:4 @0x4 <- 0x1
pci_cfg_write vt82c686b-isa 05:0 @0x4 <- 0x7
bonito_spciconf_small_access PCI config address is smaller then 32-bit, addr:
0x81, size: 1
pci_cfg_read vt82c686b-isa 05:0 @0x81 -> 0x0
bonito_spciconf_small_access PCI config address is smaller then 32-bit, addr:
0x81, size: 1
pci_cfg_write vt82c686b-isa 05:0 @0x81 <- 0x80
bonito_spciconf_small_access PCI config address is smaller then 32-bit, addr:
0x83, size: 1
pci_cfg_write vt82c686b-isa 05:0 @0x83 <- 0x89
bonito_spciconf_small_access PCI config address is smaller then 32-bit, addr:
0x85, size: 1
pci_cfg_write vt82c686b-isa 05:0 @0x85 <- 0x3
bonito_spciconf_small_access PCI config address is smaller then 32-bit, addr:
0x5a, size: 1
pci_cfg_write vt82c686b-isa 05:0 @0x5a <- 0x7
bonito_spciconf_small_access PCI config address is smaller then 32-bit, addr:
0x85, size: 1
pci_cfg_write vt82c686b-isa 05:0 @0x85 <- 0x1
Also this is what the Linux kernel does since it supports the Bonito
north bridge:
https://elixir.bootlin.com/linux/v2.6.15/source/arch/mips/pci/ops-bonito64.c#L85
So it seems safe to assume the datasheet is incomplete or outdated
regarding the address constraints.
This problem was exposed by commit 911629e6d3773a8adeab48b
("vt82c686: Fix SMBus IO base and configuration registers").
Reported-by: BALATON Zoltan <balaton@eik.bme.hu>
Suggested-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210624202747.1433023-4-f4bug@amsat.org>
Tested-by: BALATON Zoltan <balaton@eik.bme.hu>
Commit: 11984b18bb0b237440af18edb702f85aa8277efe
https://github.com/qemu/qemu/commit/11984b18bb0b237440af18edb702f85aa8277efe
Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
Date: 2021-07-02 (Fri, 02 Jul 2021)
Changed paths:
M MAINTAINERS
A tests/acceptance/machine_mips_fuloong2e.py
Log Message:
-----------
tests/acceptance: Test Linux on the Fuloong 2E machine
Test the kernel from Lemote rescue image:
http://dev.lemote.com/files/resource/download/rescue/rescue-yl
Once downloaded, set the RESCUE_YL_PATH environment variable
to point to the downloaded image and test as:
$ RESCUE_YL_PATH=~/images/fuloong2e/rescue-yl \
AVOCADO_ALLOW_UNTRUSTED_CODE=1 \
avocado --show=app,console run tests/acceptance/machine_mips_fuloong2e.py
Fetching asset from
tests/acceptance/machine_mips_fuloong2e.py:MipsFuloong2e.test_linux_kernel_isa_serial
(1/1)
tests/acceptance/machine_mips_fuloong2e.py:MipsFuloong2e.test_linux_kernel_isa_serial:
console: Linux version 2.6.27.7lemote (root@debian) (gcc version 4.1.3
20080623 (prerelease) (Debian 4.1.2-23)) #6 Fri Dec 12 00:11:25 CST 2008
console: busclock=33000000, cpuclock=-2145008360,memsize=256,highmemsize=0
console: console [early0] enabled
console: CPU revision is: 00006302 (ICT Loongson-2)
PASS (0.16 s)
JOB TIME : 0.51 s
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com>
Message-Id: <20210624202747.1433023-5-f4bug@amsat.org>
Commit: d5bfbaca39e9a700cabf4266247c93edeaf846de
https://github.com/qemu/qemu/commit/d5bfbaca39e9a700cabf4266247c93edeaf846de
Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Date: 2021-07-02 (Fri, 02 Jul 2021)
Changed paths:
M hw/display/g364fb.c
Log Message:
-----------
g364fb: use RAM memory region for framebuffer
Since the migration stream is already broken, we can use this opportunity to
change the framebuffer so that it is migrated as a RAM memory region rather
than as an array of bytes.
In particular this helps the output of the analyze-migration.py tool which
no longer contains a huge array representing the framebuffer contents.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210625163554.14879-2-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Commit: 8660df5ea25ea4e6ee94fca43559165fe7610199
https://github.com/qemu/qemu/commit/8660df5ea25ea4e6ee94fca43559165fe7610199
Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Date: 2021-07-02 (Fri, 02 Jul 2021)
Changed paths:
M hw/display/g364fb.c
Log Message:
-----------
g364fb: add VMStateDescription for G364SysBusState
Currently when QEMU attempts to migrate the MIPS magnum machine it crashes due
to a mistake in the g364fb VMStateDescription configuration which expects a
G364SysBusState and not a G364State.
Resolve the issue by adding a new VMStateDescription for G364SysBusState and
embedding the existing vmstate_g364fb VMStateDescription inside it using
VMSTATE_STRUCT.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Fixes: 97a3f6ffbba ("g364fb: convert to qdev")
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210625163554.14879-3-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Commit: 1ca82a8db03ea3c352d581753b22e8dac4ea8047
https://github.com/qemu/qemu/commit/1ca82a8db03ea3c352d581753b22e8dac4ea8047
Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Date: 2021-07-02 (Fri, 02 Jul 2021)
Changed paths:
M hw/net/dp8393x.c
Log Message:
-----------
dp8393x: checkpatch fixes
Also fix a simple comment typo of "constrainst" to "constraints".
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Finn Thain <fthain@linux-m68k.org>
Message-Id: <20210625065401.30170-2-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Commit: c0af04a43667e2e50ed347ca9f707b597c874496
https://github.com/qemu/qemu/commit/c0af04a43667e2e50ed347ca9f707b597c874496
Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Date: 2021-07-02 (Fri, 02 Jul 2021)
Changed paths:
M hw/net/dp8393x.c
M hw/net/trace-events
Log Message:
-----------
dp8393x: convert to trace-events
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Finn Thain <fthain@linux-m68k.org>
Message-Id: <20210625065401.30170-3-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Commit: 5d53baf3f5b3e711fd809d9e0b39b29be994ba9c
https://github.com/qemu/qemu/commit/5d53baf3f5b3e711fd809d9e0b39b29be994ba9c
Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Date: 2021-07-02 (Fri, 02 Jul 2021)
Changed paths:
M hw/mips/jazz.c
Log Message:
-----------
hw/mips/jazz: move PROM and checksum calculation from dp8393x device to board
This is in preparation for each board to have its own separate bit storage
format and checksum for storing the MAC address.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Tested-by: Finn Thain <fthain@linux-m68k.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210625065401.30170-4-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Commit: 408c57331cddd2b9b8964ce5fdd2c14ccd946868
https://github.com/qemu/qemu/commit/408c57331cddd2b9b8964ce5fdd2c14ccd946868
Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Date: 2021-07-02 (Fri, 02 Jul 2021)
Changed paths:
M hw/m68k/q800.c
Log Message:
-----------
hw/m68k/q800: move PROM and checksum calculation from dp8393x device to board
This is in preparation for each board to have its own separate bit storage
format and checksum for storing the MAC address.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Tested-by: Finn Thain <fthain@linux-m68k.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210625065401.30170-5-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Commit: c3250c8e6b3158f9b55bfc457c4e7a940b59d2b0
https://github.com/qemu/qemu/commit/c3250c8e6b3158f9b55bfc457c4e7a940b59d2b0
Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Date: 2021-07-02 (Fri, 02 Jul 2021)
Changed paths:
M hw/net/dp8393x.c
Log Message:
-----------
dp8393x: remove onboard PROM containing MAC address and checksum
According to the datasheet the dp8393x chipset does not contain any NVRAM
capable
of storing a MAC address or checksum. Now that both the MIPS jazz and m68k q800
boards generate the PROM region and checksum themselves, remove the generated
PROM from the dp8393x device itself.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Tested-by: Finn Thain <fthain@linux-m68k.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210625065401.30170-6-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Commit: db1ffc32dd0d32ef476c00637efc888ecea8466c
https://github.com/qemu/qemu/commit/db1ffc32dd0d32ef476c00637efc888ecea8466c
Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Date: 2021-07-02 (Fri, 02 Jul 2021)
Changed paths:
M include/qemu/bitops.h
Log Message:
-----------
qemu/bitops.h: add bitrev8 implementation
This will be required for an upcoming checksum calculation.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Tested-by: Finn Thain <fthain@linux-m68k.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210625065401.30170-7-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Commit: 846feac2ae1d1dab08c0048807ce802a256179fd
https://github.com/qemu/qemu/commit/846feac2ae1d1dab08c0048807ce802a256179fd
Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Date: 2021-07-02 (Fri, 02 Jul 2021)
Changed paths:
M hw/m68k/q800.c
Log Message:
-----------
hw/m68k/q800: fix PROM checksum and MAC address storage
The checksum used by MacOS to validate the PROM content is an exclusive-OR
rather than a sum over the corresponding bytes. In addition the MAC address
must be stored in bit-reversed format as indicated in comments in Linux's
macsonic.c.
With the PROM contents fixed MacOS starts to probe the device registers
when AppleTalk is enabled in the Control Panel.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Tested-by: Finn Thain <fthain@linux-m68k.org>
Message-Id: <20210625065401.30170-8-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Commit: b1600ff19553c7acfe10b43d4f50331deff876d5
https://github.com/qemu/qemu/commit/b1600ff19553c7acfe10b43d4f50331deff876d5
Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Date: 2021-07-02 (Fri, 02 Jul 2021)
Changed paths:
M hw/mips/jazz.c
Log Message:
-----------
hw/mips/jazz: specify correct endian for dp8393x device
The MIPS magnum machines are available in both big endian (mips64) and little
endian (mips64el) configurations. Ensure that the dp893x big_endian property
is set accordingly using logic similar to that used for the MIPS malta
machines.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Tested-by: Finn Thain <fthain@linux-m68k.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210625065401.30170-11-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Commit: a13bfa5a056b2ffe5f2ce71170c15772fa3b2cda
https://github.com/qemu/qemu/commit/a13bfa5a056b2ffe5f2ce71170c15772fa3b2cda
Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
Date: 2021-07-02 (Fri, 02 Jul 2021)
Changed paths:
M hw/mips/jazz.c
Log Message:
-----------
hw/mips/jazz: Map the UART devices unconditionally
When using the Magnum ARC firmware we can see accesses to the
UART1 being rejected, because the device is not mapped:
$ qemu-system-mips64el -M magnum -d guest_errors,unimp -bios NTPROM.RAW
Invalid access at addr 0x80007004, size 1, region '(null)', reason: rejected
Invalid access at addr 0x80007001, size 1, region '(null)', reason: rejected
Invalid access at addr 0x80007002, size 1, region '(null)', reason: rejected
Invalid access at addr 0x80007003, size 1, region '(null)', reason: rejected
Invalid access at addr 0x80007004, size 1, region '(null)', reason: rejected
Since both UARTs are present (soldered on the board) regardless
of whether there are character devices connected, map them
unconditionally.
(This code pre-dated commit 12051d82f004 which made it safe to pass
NULL in as a chardev to serial devices.)
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20210629053704.2584504-1-f4bug@amsat.org>
Commit: 711c0418c8c1ce3a24346f058b001c4c5a2f0f81
https://github.com/qemu/qemu/commit/711c0418c8c1ce3a24346f058b001c4c5a2f0f81
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-07-04 (Sun, 04 Jul 2021)
Changed paths:
M MAINTAINERS
M hw/display/g364fb.c
M hw/m68k/q800.c
M hw/mips/jazz.c
M hw/net/dp8393x.c
M hw/net/trace-events
M hw/pci-host/bonito.c
M hw/pci-host/trace-events
M include/qemu/bitops.h
A target/mips/tcg/micromips_translate.c.inc
A target/mips/tcg/mips16e_translate.c.inc
A target/mips/tcg/nanomips_translate.c.inc
M target/mips/tcg/translate.c
M target/mips/tcg/translate.h
A tests/acceptance/machine_mips_fuloong2e.py
Log Message:
-----------
Merge remote-tracking branch 'remotes/philmd/tags/mips-20210702' into staging
MIPS patches queue
- Extract nanoMIPS, microMIPS, Code Compaction from translate.c
- Allow PCI config accesses smaller than 32-bit on Bonito64 device
- Fix migration of g364fb device on Jazz Magnum
- Fix dp8393x PROM checksum on Jazz Magnum and Quadra 800
- Map the UART devices unconditionally on Jazz Magnum
- Add functional test booting Linux on the Fuloong 2E
# gpg: Signature made Fri 02 Jul 2021 16:36:19 BST
# gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>"
[full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* remotes/philmd/tags/mips-20210702:
hw/mips/jazz: Map the UART devices unconditionally
hw/mips/jazz: specify correct endian for dp8393x device
hw/m68k/q800: fix PROM checksum and MAC address storage
qemu/bitops.h: add bitrev8 implementation
dp8393x: remove onboard PROM containing MAC address and checksum
hw/m68k/q800: move PROM and checksum calculation from dp8393x device to board
hw/mips/jazz: move PROM and checksum calculation from dp8393x device to board
dp8393x: convert to trace-events
dp8393x: checkpatch fixes
g364fb: add VMStateDescription for G364SysBusState
g364fb: use RAM memory region for framebuffer
tests/acceptance: Test Linux on the Fuloong 2E machine
hw/pci-host/bonito: Allow PCI config accesses smaller than 32-bit
hw/pci-host/bonito: Trace PCI config accesses smaller than 32-bit
target/mips: Extract nanoMIPS ISA translation routines
target/mips: Extract the microMIPS ISA translation routines
target/mips: Extract Code Compaction ASE translation routines
target/mips: Add declarations for generic TCG helpers
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Compare: https://github.com/qemu/qemu/compare/73c8bf4ccff8...711c0418c8c1