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[Qemu-commits] [qemu/qemu] dbf2e7: target/ppc: cleaned error_report from
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From: |
Peter Maydell |
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Subject: |
[Qemu-commits] [qemu/qemu] dbf2e7: target/ppc: cleaned error_report from ppc_store_sdr1 |
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Date: |
Thu, 03 Jun 2021 03:36:53 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: dbf2e70a3029890f4c7c426f4eb724bac78d8c54
https://github.com/qemu/qemu/commit/dbf2e70a3029890f4c7c426f4eb724bac78d8c54
Author: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/cpu.c
Log Message:
-----------
target/ppc: cleaned error_report from ppc_store_sdr1
Changed how the function ppc_store_sdr1, from error_report(...) to
qemu_log_mask(LOG_GUEST_ERROR, ...).
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210521201759.85475-2-bruno.larsen@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: a3f5c315396b86468487f303a044b26801015090
https://github.com/qemu/qemu/commit/a3f5c315396b86468487f303a044b26801015090
Author: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/cpu.c
M target/ppc/misc_helper.c
Log Message:
-----------
target/ppc: moved ppc_store_lpcr and ppc_store_msr to cpu.c
These functions are used in hw/ppc logic, during machine startup, which
means it must be compiled when --disable-tcg is selected, and so it has
been moved into a common code file
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <20210521201759.85475-3-bruno.larsen@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 63d06e90e65d5f119039044e986a81007954a466
https://github.com/qemu/qemu/commit/63d06e90e65d5f119039044e986a81007954a466
Author: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/fpu_helper.c
Log Message:
-----------
target/ppc: reduce usage of fpscr_set_rounding_mode
It is preferable to store the current rounding mode and retore from that
than recalculating from fpscr, so we changed the behavior of do_fri and
VSX_ROUND to do it like that.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210521201759.85475-4-bruno.larsen@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: f2fac71d81de902b43d55060541b7ba9c9eacda4
https://github.com/qemu/qemu/commit/f2fac71d81de902b43d55060541b7ba9c9eacda4
Author: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/cpu_init.c
M target/ppc/gdbstub.c
M target/ppc/mmu-hash32.c
M target/ppc/mmu-radix64.c
Log Message:
-----------
target/ppc: removed unnecessary inclusion of helper-proto.h
These files included helper-proto.h, but didn't use or declare any
helpers, so the #include has been removed
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210521201759.85475-6-bruno.larsen@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 3bf0844f3be77b24cc8f56fc8df9ff199f8324cb
https://github.com/qemu/qemu/commit/3bf0844f3be77b24cc8f56fc8df9ff199f8324cb
Author: Greg Kurz <groug@kaod.org>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M hw/ppc/spapr.c
M include/hw/ppc/spapr.h
Log Message:
-----------
spapr: Don't hijack current_machine->boot_order
QEMU 6.0 moved all the -boot variables to the machine. Especially, the
removal of the boot_order static changed the handling of '-boot once'
from:
if (boot_once) {
qemu_boot_set(boot_once, &error_fatal);
qemu_register_reset(restore_boot_order, g_strdup(boot_order));
}
to
if (current_machine->boot_once) {
qemu_boot_set(current_machine->boot_once, &error_fatal);
qemu_register_reset(restore_boot_order,
g_strdup(current_machine->boot_order));
}
This means that we now register as subsequent boot order a copy
of current_machine->boot_once that was just set with the previous
call to qemu_boot_set(), i.e. we never transition away from the
once boot order.
It is certainly fragile^Wwrong for the spapr code to hijack a
field of the base machine type object like that. The boot order
rework simply turned this software boundary violation into an
actual bug.
Have the spapr code to handle that with its own field in
SpaprMachineState. Also kfree() the initial boot device
string when "once" was used.
Fixes: 4b7acd2ac821 ("vl: clean up -boot variables")
Resolves: https://bugzilla.redhat.com/show_bug.cgi?id=1960119
Cc: pbonzini@redhat.com
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20210521160735.1901914-1-groug@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: ac9ef668321ebb6eb871a0c4dd380fa7d7891b4e
https://github.com/qemu/qemu/commit/ac9ef668321ebb6eb871a0c4dd380fa7d7891b4e
Author: Mahesh Salgaonkar <mahesh@linux.ibm.com>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M hw/ppc/spapr_pci_vfio.c
Log Message:
-----------
spapr: Fix EEH capability issue on KVM guest for PCI passthru
With upstream kernel, especially after commit 98ba956f6a389
("powerpc/pseries/eeh: Rework device EEH PE determination") we see that KVM
guest isn't able to enable EEH option for PCI pass-through devices anymore.
[root@atest-guest ~]# dmesg | grep EEH
[ 0.032337] EEH: pSeries platform initialized
[ 0.298207] EEH: No capable adapters found: recovery disabled.
[root@atest-guest ~]#
So far the linux kernel was assuming pe_config_addr equal to device's
config_addr and using it to enable EEH on the PE through ibm,set-eeh-option
RTAS call. Which wasn't the correct way as per PAPR. The linux kernel
commit 98ba956f6a389 fixed this flow. With that fixed, linux now uses PE
config address returned by ibm,get-config-addr-info2 RTAS call to enable
EEH option per-PE basis instead of per-device basis. However this has
uncovered a bug in qemu where ibm,set-eeh-option is treating PE config
address as per-device config address.
Hence in qemu guest with recent kernel the ibm,set-eeh-option RTAS call
fails with -3 return value indicating that there is no PCI device exist for
the specified PE config address. The rtas_ibm_set_eeh_option call uses
pci_find_device() to get the PC device that matches specific bus and devfn
extracted from PE config address passed as argument. Thus it tries to map
the PE config address to a single specific PCI device 'bus->devices[devfn]'
which always results into checking device on slot 0 'bus->devices[0]'.
This succeeds when there is a pass-through device (vfio-pci) present on
slot 0. But in cases where there is no pass-through device present in slot
0, but present in non-zero slots, ibm,set-eeh-option call fails to enable
the EEH capability.
hw/ppc/spapr_pci_vfio.c: spapr_phb_vfio_eeh_set_option()
case RTAS_EEH_ENABLE: {
PCIHostState *phb;
PCIDevice *pdev;
/*
* The EEH functionality is enabled on basis of PCI device,
* instead of PE. We need check the validity of the PCI
* device address.
*/
phb = PCI_HOST_BRIDGE(sphb);
pdev = pci_find_device(phb->bus,
(addr >> 16) & 0xFF, (addr >> 8) & 0xFF);
if (!pdev || !object_dynamic_cast(OBJECT(pdev), "vfio-pci")) {
return RTAS_OUT_PARAM_ERROR;
}
hw/pci/pci.c:pci_find_device()
PCIDevice *pci_find_device(PCIBus *bus, int bus_num, uint8_t devfn)
{
bus = pci_find_bus_nr(bus, bus_num);
if (!bus)
return NULL;
return bus->devices[devfn];
}
This patch fixes ibm,set-eeh-option to check for presence of any PCI device
(vfio-pci) under specified bus and enable the EEH if found. The current
code already makes sure that all the devices on that bus are from same
iommu group (within same PE) and fail very early if it does not.
After this fix guest is able to find EEH capable devices and enable EEH
recovery on it.
[root@atest-guest ~]# dmesg | grep EEH
[ 0.048139] EEH: pSeries platform initialized
[ 0.405115] EEH: Capable adapter found: recovery enabled.
[root@atest-guest ~]#
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.ibm.com>
Message-Id: <162158429107.145117.5843504911924013125.stgit@jupiter>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: f93c8f148c0f6c2e20c29c54276862ee79a53d02
https://github.com/qemu/qemu/commit/f93c8f148c0f6c2e20c29c54276862ee79a53d02
Author: Shivaprasad G Bhat <sbhat@linux.ibm.com>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M hw/ppc/spapr_nvdimm.c
M include/hw/ppc/spapr_nvdimm.h
Log Message:
-----------
spapr: nvdimm: Forward declare and move the definitions
The subsequent patches add definitions which tend to get
the compilation to cyclic dependency. So, prepare with
forward declarations, move the definitions and clean up.
Signed-off-by: Shivaprasad G Bhat <sbhat@linux.ibm.com>
Message-Id: <162133925415.610.11584121797866216417.stgit@4f1e6f2bd33e>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 9f9f82dacebbb816c62d730658f14a615c3ea003
https://github.com/qemu/qemu/commit/9f9f82dacebbb816c62d730658f14a615c3ea003
Author: Shivaprasad G Bhat <sbhat@linux.ibm.com>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M hw/ppc/spapr_nvdimm.c
Log Message:
-----------
spapr: nvdimm: Fix the persistent-memory root node name in device tree
The FDT code is adding the pmem root node by name "persistent-memory"
which should have been "ibm,persistent-memory".
The linux fetches the device tree nodes by type and it has been working
correctly as the type is correct. If someone searches by its intended
name it would fail, so fix that.
Reported-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Shivaprasad G Bhat <sbhat@linux.ibm.com>
Message-Id: <162204278956.219.9061511386011411578.stgit@cc493db1e665>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 22adb61ff6277637ae49b8dab667143f11bb53ff
https://github.com/qemu/qemu/commit/22adb61ff6277637ae49b8dab667143f11bb53ff
Author: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/cpu.h
M target/ppc/misc_helper.c
M target/ppc/mmu_helper.c
Log Message:
-----------
target/ppc: fold ppc_store_ptcr into it's only caller
ppc_store_ptcr, defined in mmu_helper.c, was only used by
helper_store_ptcr, in misc_helper.c. To avoid possible confusion,
the function was folded into the helper.
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Message-Id: <20210526143516.125582-1-bruno.larsen@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 7be3bf6c8429969f97728bb712d9a99997835607
https://github.com/qemu/qemu/commit/7be3bf6c8429969f97728bb712d9a99997835607
Author: Nicholas Piggin <npiggin@gmail.com>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M hw/ppc/spapr_rtas.c
Log Message:
-----------
spapr: Remove stale comment about power-saving LPCR bits
Commit 47a9b551547 ("spapr: Clean up handling of LPCR power-saving exit
bits") moved this logic but did not remove the comment from the
previous location.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Message-Id: <20210526091626.3388262-2-npiggin@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Greg Kurz <groug@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: ac559ecbea2649819e7b3fdd09f4e0243e0128db
https://github.com/qemu/qemu/commit/ac559ecbea2649819e7b3fdd09f4e0243e0128db
Author: Nicholas Piggin <npiggin@gmail.com>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M hw/ppc/spapr_rtas.c
Log Message:
-----------
spapr: Set LPCR to current AIL mode when starting a new CPU
TCG does not keep track of AIL mode in a central place, it's based on
the current LPCR[AIL] bits. Synchronize the new CPU's LPCR to the
current LPCR in rtas_start_cpu(), similarly to the way the ILE bit is
synchronized.
Open-code the ILE setting as well now that the caller's LPCR is
available directly, there is no need for the indirection.
Without this, under both TCG and KVM, adding a POWER8/9/10 class CPU
with a new core ID after a modern Linux has booted results in the new
CPU's LPCR missing the LPCR[AIL]=0b11 setting that the other CPUs have.
This can cause crashes and unexpected behaviour.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Message-Id: <20210526091626.3388262-3-npiggin@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Greg Kurz <groug@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 52e9612ee94b58a1bc57242427b4dbe6c766d8f3
https://github.com/qemu/qemu/commit/52e9612ee94b58a1bc57242427b4dbe6c766d8f3
Author: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/cpu_init.c
Log Message:
-----------
target/ppc: used ternary operator when registering MAS
The write calback decision when registering the MAS SPR has been turned
into a ternary operation, rather than an if-then-else block.
This was done because when building without TCG, even though the
compiler will optimize away the pointers to spr_write_generic*, it
doesn't optimize away the decision and assignment to the local pointer,
creating compiler errors. This cleanup looked better than using ifdefs,
so we decided to with it.
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210525115355.8254-2-bruno.larsen@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 2b44e21949352ffa045399c56a6ddde86eeb2ec6
https://github.com/qemu/qemu/commit/2b44e21949352ffa045399c56a6ddde86eeb2ec6
Author: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/cpu_init.c
M target/ppc/excp_helper.c
M target/ppc/mmu-hash64.c
M target/ppc/mmu_helper.c
Log Message:
-----------
target/ppc: added ifdefs around TCG-only code
excp_helper.c, mmu-hash64.c and mmu_helper.c have some function
declarations that are TCG-only, and couldn't be easily moved to a
TCG only file, so ifdefs were added around them.
We also needed ifdefs around some header files because helper-proto.h
includes trace/generated-helpers.h, which is never created when building
without TCG, and cpu_ldst.h includes tcg/tcg.h, whose containing folder
is not included as a -iquote. As future cleanup, we could change the
part of the configuration script to add those.
cpu_init.c also had a callback definition that is TCG only and could be
removed as part of a future cleanup (all the dump_statistics part is
almost never used and will become obsolete as we transition to using
decodetree).
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Message-Id: <20210525115355.8254-3-bruno.larsen@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 8033fb3fbf1165569cfcdeac7fab257bb72740f5
https://github.com/qemu/qemu/commit/8033fb3fbf1165569cfcdeac7fab257bb72740f5
Author: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/meson.build
A target/ppc/tcg-stub.c
Log Message:
-----------
target/ppc: created tcg-stub.c file
Created a file with stubs needed to compile disabling TCG. *_ppc_opcodes
were created to make cpu_init.c have a few less ifdefs, since they are
not needed. softmmu_resize_hpt_* have to be created because the compiler
can't automatically know they aren't used, but they should never be
reached.
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Message-Id: <20210525115355.8254-4-bruno.larsen@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: c274358279b80d7ff382a8f20f12add6ce49625f
https://github.com/qemu/qemu/commit/c274358279b80d7ff382a8f20f12add6ce49625f
Author: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/meson.build
Log Message:
-----------
target/ppc: updated meson.build to support disable-tcg
updated build file to not compile some sources that are unnecessary if
TCG is disabled on the system.
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Message-Id: <20210525115355.8254-5-bruno.larsen@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 4fe011d3c188559d8781996a2d91a02f5a957a42
https://github.com/qemu/qemu/commit/4fe011d3c188559d8781996a2d91a02f5a957a42
Author: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/cpu.h
M target/ppc/cpu_init.c
M target/ppc/translate.c
Log Message:
-----------
target/ppc: remove ppc_cpu_dump_statistics
This function requires surce code modification to be useful, which means
it probably is not used often, and the move to using decodetree means
the statistics won't even be collected anymore.
Also removed setting dump_statistics in ppc_cpu_realize, since it was
only useful when in conjunction with ppc_cpu_dump_statistics.
Suggested-by: Richard Henderson<richard.henderson@linaro.org>
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Message-Id: <20210526202104.127910-3-bruno.larsen@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 169989a416668c819c67dfc683062185d9eeddd5
https://github.com/qemu/qemu/commit/169989a416668c819c67dfc683062185d9eeddd5
Author: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/translate.c
Log Message:
-----------
target/ppc: removed mentions to DO_PPC_STATISTICS
Removed the commented out definition and all ifdefs relating to
PPC_DUMP_STATISTICS, as it's hardly ever used.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Message-Id: <20210526202104.127910-4-bruno.larsen@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: de3036acb4f2cbb80ef8d827ce2b7ec9104a0b14
https://github.com/qemu/qemu/commit/de3036acb4f2cbb80ef8d827ce2b7ec9104a0b14
Author: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M hmp-commands-info.hx
M monitor/misc.c
Log Message:
-----------
monitor: removed cpustats command
Since ppc was the last architecture to collect these statistics and
it is currently phasing this collection out, the command that would query
this information is being removed.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Message-Id: <20210526202104.127910-5-bruno.larsen@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br>
Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: b873ed83311d96644b544b10f6869a430660585a
https://github.com/qemu/qemu/commit/b873ed83311d96644b544b10f6869a430660585a
Author: Daniel Henrique Barboza <danielhb413@gmail.com>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M hw/ppc/pef.c
Log Message:
-----------
ppc/pef.c: initialize cgs->ready in kvmppc_svm_init()
QEMU is failing to launch a CGS pSeries guest in a host that has PEF
support:
qemu-system-ppc64: ../softmmu/vl.c:2585: qemu_machine_creation_done: Assertion
`machine->cgs->ready' failed.
Aborted
This is happening because we're not setting the cgs->ready flag that is
asserted in qemu_machine_creation_done() during machine start.
cgs->ready is set in s390_pv_kvm_init() and sev_kvm_init(). Let's set it
in kvmppc_svm_init() as well.
Reported-by: Ram Pai <linuxram@us.ibm.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20210528201619.52363-1-danielhb413@gmail.com>
Acked-by: Ram Pai <linuxram@us.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 78d6c4c33d872c6790f8115b2bf5b0a00d710c22
https://github.com/qemu/qemu/commit/78d6c4c33d872c6790f8115b2bf5b0a00d710c22
Author: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M hw/core/cpu-common.c
M include/hw/core/cpu.h
Log Message:
-----------
hw/core/cpu: removed cpu_dump_statistics function
No more architectures set the pointer to dump_statistics, so there's no
point in keeping it, or the related cpu_dump_statistics function.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Message-Id: <20210526202104.127910-6-bruno.larsen@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <20210531145629.21300-2-bruno.larsen@eldorado.org.br>
Acked-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: ca24b0b9334cd8838527edfc8b9b183326f81714
https://github.com/qemu/qemu/commit/ca24b0b9334cd8838527edfc8b9b183326f81714
Author: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M docs/system/removed-features.rst
Log Message:
-----------
HMP: added info cpustats to removed_features.rst
Documented the removal of the HMP command info cpustats
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Message-Id: <20210531145629.21300-3-bruno.larsen@eldorado.org.br>
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br>
Reviewed-by: Lucas Mateus <lucas.araujo@eldorado.org.br>
Reviewed-by: Greg Kurz <groug@kaod.org>
[dwg: Fix a Sphinx formatting error]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 0c5d547625989685742da9765608c0bb1abd7877
https://github.com/qemu/qemu/commit/0c5d547625989685742da9765608c0bb1abd7877
Author: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/translate.c
Log Message:
-----------
target/ppc: removed GEN_OPCODE decision tree
since both, PPC_DO_STATISTICS and PPC_DUMP_CPU, are obsoleted as
target/ppc moves to decodetree, we can remove this ifdef based decision
tree, and only have what is now the standard option for the macro.
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Message-Id: <20210531145629.21300-4-bruno.larsen@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 1a1c9a00f390e236eab910fdf0ab08df0be08890
https://github.com/qemu/qemu/commit/1a1c9a00f390e236eab910fdf0ab08df0be08890
Author: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/cpu_init.c
M target/ppc/internal.h
M target/ppc/translate.c
Log Message:
-----------
target/ppc: removed all mentions to PPC_DUMP_CPU
This feature will no longer be useful as ppc moves to using decodetree
for TCG. And building with it enabled is no longer possible, due to
changes in opc_handler_t. Since the last commit that mentions it
happened in 2014, I think it is safe to remove it.
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Message-Id: <20210531145629.21300-5-bruno.larsen@eldorado.org.br>
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: fe43ba9721f36e47e09779682c3525659c6818f0
https://github.com/qemu/qemu/commit/fe43ba9721f36e47e09779682c3525659c6818f0
Author: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/cpu.c
M target/ppc/cpu.h
M target/ppc/fpu_helper.c
M target/ppc/gdbstub.c
Log Message:
-----------
target/ppc: overhauled and moved logic of storing fpscr
Followed the suggested overhaul to store_fpscr logic, and moved it to
cpu.c where it can be accessed in !TCG builds.
The overhaul was suggested because storing a value to fpscr should
never raise an exception, so we could remove all the mess that happened
with POWERPC_EXCP_FP.
We also moved fpscr_set_rounding_mode into cpu.c as it could now be moved
there, and it is needed when a value for the fpscr is being stored
directly.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210527163522.23019-1-bruno.larsen@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: bbc443cf65e3bf580df9dd8d2cd3f27154309add
https://github.com/qemu/qemu/commit/bbc443cf65e3bf580df9dd8d2cd3f27154309add
Author: Fabiano Rosas <farosas@linux.ibm.com>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/excp_helper.c
Log Message:
-----------
target/ppc: powerpc_excp: Move lpes code to where it is used
Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Message-Id: <20210601214649.785647-2-farosas@linux.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 0c87018c7c171a8fe0ed44b9aa931b364eec85f7
https://github.com/qemu/qemu/commit/0c87018c7c171a8fe0ed44b9aa931b364eec85f7
Author: Fabiano Rosas <farosas@linux.ibm.com>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/excp_helper.c
Log Message:
-----------
target/ppc: powerpc_excp: Remove dump_syscall_vectored
This function is identical to dump_syscall, so use the latter for
system call vectored as well.
Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Message-Id: <20210601214649.785647-3-farosas@linux.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 51b385db586dafa4cd1f23413f0cbbf5ec2a256c
https://github.com/qemu/qemu/commit/51b385db586dafa4cd1f23413f0cbbf5ec2a256c
Author: Fabiano Rosas <farosas@linux.ibm.com>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/excp_helper.c
Log Message:
-----------
target/ppc: powerpc_excp: Consolidade TLB miss code
The only difference in the code for Instruction fetch, Data load and
Data store TLB miss errors is that when called from an unsupported
processor (i.e. not one of 602, 603, 603e, G2, 7x5 or 74xx), they
abort with a message specific to the operation type (insn fetch, data
load/store).
If a processor does not support those interrupts we should not be
registering them in init_excp_<proc> to begin with, so that error
message would never be used.
I'm leaving the message in for completeness, but making it generic and
consolidating the three interrupts into the same case statement body.
Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Message-Id: <20210601214649.785647-4-farosas@linux.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: c9826ae97e4df418eb44290a9c68983f723a21af
https://github.com/qemu/qemu/commit/c9826ae97e4df418eb44290a9c68983f723a21af
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/translate.c
Log Message:
-----------
target/ppc: Introduce macros to check isa extensions
These will be used by the decodetree trans_* functions
to early-exit when the instruction set is not enabled.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210601193528.2533031-2-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 64a0f6448c6b4454c35e5a73e8be7dee0f852ba5
https://github.com/qemu/qemu/commit/64a0f6448c6b4454c35e5a73e8be7dee0f852ba5
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/translate.c
Log Message:
-----------
target/ppc: Move page crossing check to ppc_tr_translate_insn
With prefixed instructions, the number of instructions
remaining until the page crossing is no longer constant.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210601193528.2533031-3-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 99082815f17f40d3527b281c7e3e6e5556fad8f1
https://github.com/qemu/qemu/commit/99082815f17f40d3527b281c7e3e6e5556fad8f1
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/cpu.h
A target/ppc/insn32.decode
A target/ppc/insn64.decode
M target/ppc/meson.build
M target/ppc/translate.c
A target/ppc/translate/fixedpoint-impl.c.inc
Log Message:
-----------
target/ppc: Add infrastructure for prefixed insns
Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210601193528.2533031-4-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 5e560864234e78461879c632c414e4fe97a9a506
https://github.com/qemu/qemu/commit/5e560864234e78461879c632c414e4fe97a9a506
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/insn32.decode
M target/ppc/insn64.decode
M target/ppc/translate.c
M target/ppc/translate/fixedpoint-impl.c.inc
Log Message:
-----------
target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210601193528.2533031-5-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 0a11bb7a35075379dffafb75698dd503eb6f9b9c
https://github.com/qemu/qemu/commit/0a11bb7a35075379dffafb75698dd503eb6f9b9c
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/insn64.decode
M target/ppc/translate/fixedpoint-impl.c.inc
Log Message:
-----------
target/ppc: Implement PNOP
The illegal suffix behavior matches what was observed in a
POWER10 DD2.0 machine.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210601193528.2533031-6-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: f2aabda8ac9889db9449ddc0ca31627922e5a572
https://github.com/qemu/qemu/commit/f2aabda8ac9889db9449ddc0ca31627922e5a572
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/insn32.decode
M target/ppc/translate.c
M target/ppc/translate/fixedpoint-impl.c.inc
Log Message:
-----------
target/ppc: Move D/DS/X-form integer loads to decodetree
These are all connected by macros in the legacy decoding.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210601193528.2533031-7-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 00e032654144f03c25c95a5a9bd20bf00a933050
https://github.com/qemu/qemu/commit/00e032654144f03c25c95a5a9bd20bf00a933050
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/insn64.decode
M target/ppc/translate/fixedpoint-impl.c.inc
Log Message:
-----------
target/ppc: Implement prefixed integer load instructions
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210601193528.2533031-8-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: e8f4c8d6aa8634f6b71483ec5f6002dafbc8d092
https://github.com/qemu/qemu/commit/e8f4c8d6aa8634f6b71483ec5f6002dafbc8d092
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/insn32.decode
M target/ppc/translate.c
M target/ppc/translate/fixedpoint-impl.c.inc
Log Message:
-----------
target/ppc: Move D/DS/X-form integer stores to decodetree
These are all connected by macros in the legacy decoding.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210601193528.2533031-9-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: b0f7bebc6db09eac280f7458cc9e0de9ea7fc7cc
https://github.com/qemu/qemu/commit/b0f7bebc6db09eac280f7458cc9e0de9ea7fc7cc
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/insn64.decode
M target/ppc/translate/fixedpoint-impl.c.inc
Log Message:
-----------
target/ppc: Implement prefixed integer store instructions
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210601193528.2533031-10-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 9a14365eeb0d8b0e9d69692c34cdce76b9505189
https://github.com/qemu/qemu/commit/9a14365eeb0d8b0e9d69692c34cdce76b9505189
Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/insn32.decode
M target/ppc/translate/fixedpoint-impl.c.inc
Log Message:
-----------
target/ppc: Implement setbc/setbcr/stnbc/setnbcr instructions
Implements the following PowerISA v3.1 instructions:
setbc: Set Boolean Condition
setbcr: Set Boolean Condition Reverse
setnbc: Set Negative Boolean Condition
setnbcr: Set Negative Boolean Condition Reverse
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210601193528.2533031-11-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 89ccd7dc3fbce4a46679f282b47789e34fc3528a
https://github.com/qemu/qemu/commit/89ccd7dc3fbce4a46679f282b47789e34fc3528a
Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/helper.h
M target/ppc/insn32.decode
M target/ppc/int_helper.c
M target/ppc/translate/fixedpoint-impl.c.inc
Log Message:
-----------
target/ppc: Implement cfuged instruction
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210601193528.2533031-12-matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: a5f56954c798f81a58f7f68e82143d13bb73509b
https://github.com/qemu/qemu/commit/a5f56954c798f81a58f7f68e82143d13bb73509b
Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/insn32.decode
M target/ppc/translate.c
A target/ppc/translate/vector-impl.c.inc
Log Message:
-----------
target/ppc: Implement vcfuged instruction
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210601193528.2533031-13-matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: e7a5d578f7c39d54efe1cf1695f85c57354b0191
https://github.com/qemu/qemu/commit/e7a5d578f7c39d54efe1cf1695f85c57354b0191
Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/insn32.decode
M target/ppc/translate.c
M target/ppc/translate/fixedpoint-impl.c.inc
Log Message:
-----------
target/ppc: Move addpcis to decodetree
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210601193528.2533031-14-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 8f0a4b6a9b40e18116a2bb6bbcc00feb8119c792
https://github.com/qemu/qemu/commit/8f0a4b6a9b40e18116a2bb6bbcc00feb8119c792
Author: Matheus Ferst <matheus.ferst@eldorado.org.br>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/insn32.decode
M target/ppc/translate.c
M target/ppc/translate/fixedpoint-impl.c.inc
Log Message:
-----------
target/ppc: Move cmp/cmpi/cmpl/cmpli to decodetree
Additionally, REQUIRE_64BIT when L=1 to match what is specified in The
Programming Environments Manual:
"For 32-bit implementations, the L field must be cleared, otherwise the
instruction form is invalid."
Some CPUs are known to deviate from this specification by ignoring the
L bit [1]. The stricter behavior, however, can help users that test
software with qemu, making it more likely to detect bugs that would
otherwise be silent.
If deemed necessary, a future patch can adapt this behavior based on
the specific CPU model.
[1] The 601 manual is the only one I've found that explicitly states
that the L bit is ignored, but we also observe this behavior in a 7447A
v1.2.
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210601193528.2533031-15-matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
[dwg: Corrected whitespace error]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: eba3c766fe355a4e593c1ee6944770f80b68acad
https://github.com/qemu/qemu/commit/eba3c766fe355a4e593c1ee6944770f80b68acad
Author: Luis Pires <luis.pires@eldorado.org.br>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M target/ppc/translate.c
Log Message:
-----------
target/ppc: fix single-step exception regression
Commit 6086c75 (target/ppc: Replace POWERPC_EXCP_BRANCH with
DISAS_NORETURN) broke the generation of exceptions when
CPU_SINGLE_STEP or CPU_BRANCH_STEP were set, due to nip always being
reset to the address of the current instruction.
This fix leaves nip untouched when generating the exception.
Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
Reported-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210602125103.332793-1-luis.pires@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: a97978bcc2d1f650c7d411428806e5b03082b8c7
https://github.com/qemu/qemu/commit/a97978bcc2d1f650c7d411428806e5b03082b8c7
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-06-03 (Thu, 03 Jun 2021)
Changed paths:
M docs/system/removed-features.rst
M hmp-commands-info.hx
M hw/core/cpu-common.c
M hw/ppc/pef.c
M hw/ppc/spapr.c
M hw/ppc/spapr_nvdimm.c
M hw/ppc/spapr_pci_vfio.c
M hw/ppc/spapr_rtas.c
M include/hw/core/cpu.h
M include/hw/ppc/spapr.h
M include/hw/ppc/spapr_nvdimm.h
M monitor/misc.c
M target/ppc/cpu.c
M target/ppc/cpu.h
M target/ppc/cpu_init.c
M target/ppc/excp_helper.c
M target/ppc/fpu_helper.c
M target/ppc/gdbstub.c
M target/ppc/helper.h
A target/ppc/insn32.decode
A target/ppc/insn64.decode
M target/ppc/int_helper.c
M target/ppc/internal.h
M target/ppc/meson.build
M target/ppc/misc_helper.c
M target/ppc/mmu-hash32.c
M target/ppc/mmu-hash64.c
M target/ppc/mmu-radix64.c
M target/ppc/mmu_helper.c
A target/ppc/tcg-stub.c
M target/ppc/translate.c
A target/ppc/translate/fixedpoint-impl.c.inc
A target/ppc/translate/vector-impl.c.inc
Log Message:
-----------
Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.1-20210603'
into staging
ppc patch queue 2021-06-03
Next batch of ppc target patches. Highlights are:
* A fix for a regression with single-step mode
* Start of moving ppc to use decodetree
* Implementation of some POWER10 64-bit prefixed instructions
* Several cleanups to softmmu code
* Continued progress towards allowing --disable-tcg
* Fix for the POWER PEF implementation
* Fix for LPCR handling of hotplugged CPUs
* Assorted other bugfixes and cleanups
This patchset does contain a couple of changes to code outside my
normal scope of maintainership, related to the removal of cpu_dump and
cpu_statistics hooks. ppc was the last target arch implementing these
at all, and they didn't really do anything there either. The patches
should have relevant acks.
# gpg: Signature made Thu 03 Jun 2021 09:20:59 BST
# gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full]
# gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full]
# gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
[full]
# gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>"
[unknown]
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392
* remotes/dg-gitlab/tags/ppc-for-6.1-20210603: (42 commits)
target/ppc: fix single-step exception regression
target/ppc: Move cmp/cmpi/cmpl/cmpli to decodetree
target/ppc: Move addpcis to decodetree
target/ppc: Implement vcfuged instruction
target/ppc: Implement cfuged instruction
target/ppc: Implement setbc/setbcr/stnbc/setnbcr instructions
target/ppc: Implement prefixed integer store instructions
target/ppc: Move D/DS/X-form integer stores to decodetree
target/ppc: Implement prefixed integer load instructions
target/ppc: Move D/DS/X-form integer loads to decodetree
target/ppc: Implement PNOP
target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI
target/ppc: Add infrastructure for prefixed insns
target/ppc: Move page crossing check to ppc_tr_translate_insn
target/ppc: Introduce macros to check isa extensions
target/ppc: powerpc_excp: Consolidade TLB miss code
target/ppc: powerpc_excp: Remove dump_syscall_vectored
target/ppc: powerpc_excp: Move lpes code to where it is used
target/ppc: overhauled and moved logic of storing fpscr
target/ppc: removed all mentions to PPC_DUMP_CPU
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Compare: https://github.com/qemu/qemu/compare/8e6dad2028d0...a97978bcc2d1