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[Qemu-commits] [qemu/qemu] cb2d62: target/xtensa: don't generate extra E


From: Peter Maydell
Subject: [Qemu-commits] [qemu/qemu] cb2d62: target/xtensa: don't generate extra EXCP_DEBUG on ...
Date: Mon, 24 May 2021 07:47:42 -0700

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: cb2d627a00a6bf686bc221b05f136545639a1c37
      
https://github.com/qemu/qemu/commit/cb2d627a00a6bf686bc221b05f136545639a1c37
  Author: Max Filippov <jcmvbkbc@gmail.com>
  Date:   2021-05-20 (Thu, 20 May 2021)

  Changed paths:
    M target/xtensa/cpu.c
    M target/xtensa/cpu.h
    M target/xtensa/exc_helper.c
    M target/xtensa/translate.c

  Log Message:
  -----------
  target/xtensa: don't generate extra EXCP_DEBUG on exception

target/xtensa used to generate an extra EXCP_DEBUG exception before the
first instruction executed after an interrupt or an exception is taken
to allow single-stepping that instruction in the debugger.
This is no longer needed after the following commits:
a7ba744f4082 ("tcg/cpu-exec: precise single-stepping after an exception")
ba3c35d9c402 ("tcg/cpu-exec: precise single-stepping after an interrupt")
Drop exception state tracking/extra EXCP_DEBUG generation code.

Cc: qemu-stable@nongnu.org # v5.1, v5.2, v6.0
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>


  Commit: 735aa900e4bf57b777ac620bed7c88234ec4b601
      
https://github.com/qemu/qemu/commit/735aa900e4bf57b777ac620bed7c88234ec4b601
  Author: Max Filippov <jcmvbkbc@gmail.com>
  Date:   2021-05-20 (Thu, 20 May 2021)

  Changed paths:
    M target/xtensa/translate.c

  Log Message:
  -----------
  target/xtensa: fix access ring in l32ex

l32ex does memory access as all regular load/store operations at CRING
level. Fix apparent pasto from l32e that caused it to use RING instead.

This is a correctness issue, not a security issue, because in the worst
case the privilege level of memory access may be lowered, resulting in
an exception when the correct implementation would've succeeded.
In no case it would allow memory access that would've raised an
exception in the correct implementation.

Cc: qemu-stable@nongnu.org
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>


  Commit: 583e6a5f55d4b02f04eda0cd70bf7b7701a08450
      
https://github.com/qemu/qemu/commit/583e6a5f55d4b02f04eda0cd70bf7b7701a08450
  Author: Max Filippov <jcmvbkbc@gmail.com>
  Date:   2021-05-20 (Thu, 20 May 2021)

  Changed paths:
    M default-configs/targets/xtensa-linux-user.mak
    M default-configs/targets/xtensa-softmmu.mak
    M default-configs/targets/xtensaeb-linux-user.mak
    M default-configs/targets/xtensaeb-softmmu.mak
    M target/xtensa/helper.c
    M target/xtensa/translate.c
    A tests/tcg/xtensa/test_load_store.S

  Log Message:
  -----------
  target/xtensa: clean up unaligned access

Xtensa cores may or may not have hardware support for unaligned memory
access. Remove TARGET_ALIGNED_ONLY=y from all xtensa configurations and
pass MO_ALIGN in memory access flags for all operations that would raise
an exception.
Simplify use of gen_load_store_alignment by passing access size and
alignment requirements in single parameter.
Drop condition from xtensa_cpu_do_unaligned_access and replace it with
assertion.
Add a test.

Suggested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>


  Commit: 371ebfe28600fc5a435504b841cd401208a68f07
      
https://github.com/qemu/qemu/commit/371ebfe28600fc5a435504b841cd401208a68f07
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-05-24 (Mon, 24 May 2021)

  Changed paths:
    M default-configs/targets/xtensa-linux-user.mak
    M default-configs/targets/xtensa-softmmu.mak
    M default-configs/targets/xtensaeb-linux-user.mak
    M default-configs/targets/xtensaeb-softmmu.mak
    M target/xtensa/cpu.c
    M target/xtensa/cpu.h
    M target/xtensa/exc_helper.c
    M target/xtensa/helper.c
    M target/xtensa/translate.c
    A tests/tcg/xtensa/test_load_store.S

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/xtensa/tags/20210521-xtensa' into 
staging

target/xtensa updates for v6.1:

- don't generate extra EXCP_DEBUG on exception
- fix l32ex access ring
- clean up unaligned access

# gpg: Signature made Fri 21 May 2021 14:59:30 BST
# gpg:                using RSA key 2B67854B98E5327DCDEB17D851F9CC91F83FA044
# gpg:                issuer "jcmvbkbc@gmail.com"
# gpg: Good signature from "Max Filippov <filippov@cadence.com>" [unknown]
# gpg:                 aka "Max Filippov <max.filippov@cogentembedded.com>" 
[full]
# gpg:                 aka "Max Filippov <jcmvbkbc@gmail.com>" [full]
# Primary key fingerprint: 2B67 854B 98E5 327D CDEB  17D8 51F9 CC91 F83F A044

* remotes/xtensa/tags/20210521-xtensa:
  target/xtensa: clean up unaligned access
  target/xtensa: fix access ring in l32ex
  target/xtensa: don't generate extra EXCP_DEBUG on exception

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Compare: https://github.com/qemu/qemu/compare/3bbaed2cd0a0...371ebfe28600



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