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[Qemu-commits] [qemu/qemu] 95edd7: aspeed/smc: Use the RAM memory region
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From: |
Peter Maydell |
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Subject: |
[Qemu-commits] [qemu/qemu] 95edd7: aspeed/smc: Use the RAM memory region for DMAs |
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Date: |
Fri, 30 Apr 2021 10:58:34 -0700 |
Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: 95edd76e1cb7dd81e8c7254d9c6f6a2b3df65b62
https://github.com/qemu/qemu/commit/95edd76e1cb7dd81e8c7254d9c6f6a2b3df65b62
Author: Cédric Le Goater <clg@kaod.org>
Date: 2021-04-30 (Fri, 30 Apr 2021)
Changed paths:
M hw/arm/aspeed.c
M hw/ssi/aspeed_smc.c
Log Message:
-----------
aspeed/smc: Use the RAM memory region for DMAs
Instead of passing the memory address space region, simply use the RAM
memory region instead. This simplifies RAM accesses.
This patch breaks migration compatibility.
Fixes: c4e1f0b48322 ("aspeed/smc: Add support for DMAs")
Cc: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20210407171637.777743-2-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: a43b2a18acdca998a64cdc9bf9b09b07b569c627
https://github.com/qemu/qemu/commit/a43b2a18acdca998a64cdc9bf9b09b07b569c627
Author: Cédric Le Goater <clg@kaod.org>
Date: 2021-04-30 (Fri, 30 Apr 2021)
Changed paths:
M hw/arm/aspeed_ast2600.c
M hw/arm/aspeed_soc.c
M hw/ssi/aspeed_smc.c
M include/hw/ssi/aspeed_smc.h
Log Message:
-----------
aspeed/smc: Remove unused "sdram-base" property
Cc: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210407171637.777743-3-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: ed063dd0d806457c9dca06b71f8a9839e922442e
https://github.com/qemu/qemu/commit/ed063dd0d806457c9dca06b71f8a9839e922442e
Author: Cédric Le Goater <clg@kaod.org>
Date: 2021-04-30 (Fri, 30 Apr 2021)
Changed paths:
M hw/i2c/aspeed_i2c.c
Log Message:
-----------
aspeed/i2c: Fix DMA address mask
The RAM memory region is now used for DMAs accesses instead of the
memory address space region. Mask off the top bits of the DMA address
to reflect this change.
Cc: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20210407171637.777743-4-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: 8cb0648e6bb6a28dd1d5a6e609b56e078e05cf00
https://github.com/qemu/qemu/commit/8cb0648e6bb6a28dd1d5a6e609b56e078e05cf00
Author: Cédric Le Goater <clg@kaod.org>
Date: 2021-04-30 (Fri, 30 Apr 2021)
Changed paths:
M hw/i2c/aspeed_i2c.c
Log Message:
-----------
aspeed/i2c: Rename DMA address space
It improves 'info mtree' output.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210407171637.777743-5-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: 05772d50f08e5bf5d7ebd42c92273f4d9dbccd5d
https://github.com/qemu/qemu/commit/05772d50f08e5bf5d7ebd42c92273f4d9dbccd5d
Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
Date: 2021-04-30 (Fri, 30 Apr 2021)
Changed paths:
M hw/ssi/aspeed_smc.c
M include/hw/ssi/aspeed_smc.h
Log Message:
-----------
hw/arm/aspeed: Do not sysbus-map mmio flash region directly, use alias
The flash mmio region is exposed as an AddressSpace.
AddressSpaces must not be sysbus-mapped, therefore map
the region using an alias.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
[ clg : Fix DMA_FLASH_ADDR() ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20210312182851.1922972-3-f4bug@amsat.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20210407171637.777743-6-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: 696d9a795c54315b858f4616f2646e26852e94e2
https://github.com/qemu/qemu/commit/696d9a795c54315b858f4616f2646e26852e94e2
Author: Joel Stanley <joel@jms.id.au>
Date: 2021-04-30 (Fri, 30 Apr 2021)
Changed paths:
M docs/system/arm/aspeed.rst
A hw/misc/aspeed_hace.c
M hw/misc/meson.build
A include/hw/misc/aspeed_hace.h
Log Message:
-----------
hw: Model ASPEED's Hash and Crypto Engine
The HACE (Hash and Crypto Engine) is a device that offloads MD5, SHA1,
SHA2, RSA and other cryptographic algorithms.
This initial model implements a subset of the device's functionality;
currently only MD5/SHA hashing, and on the ast2600's scatter gather
engine.
Co-developed-by: Klaus Heinrich Kiwi <klaus@linux.vnet.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Message-Id: <20210409000253.1475587-2-joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: 24751aa0d49ba7d8aea34494e35aaf2cd31bee9a
https://github.com/qemu/qemu/commit/24751aa0d49ba7d8aea34494e35aaf2cd31bee9a
Author: Joel Stanley <joel@jms.id.au>
Date: 2021-04-30 (Fri, 30 Apr 2021)
Changed paths:
M docs/system/arm/aspeed.rst
M hw/arm/aspeed_ast2600.c
M hw/arm/aspeed_soc.c
M include/hw/arm/aspeed_soc.h
Log Message:
-----------
aspeed: Integrate HACE
Add the hash and crypto engine model to the Aspeed socs.
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Klaus Heinrich Kiwi <klaus@linux.vnet.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Message-Id: <20210409000253.1475587-3-joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: 7741c1e606d007e45411b61c070b20bc320ace0a
https://github.com/qemu/qemu/commit/7741c1e606d007e45411b61c070b20bc320ace0a
Author: Joel Stanley <joel@jms.id.au>
Date: 2021-04-30 (Fri, 30 Apr 2021)
Changed paths:
M MAINTAINERS
A tests/qtest/aspeed_hace-test.c
M tests/qtest/meson.build
Log Message:
-----------
tests/qtest: Add test for Aspeed HACE
This adds a test for the Aspeed Hash and Crypto (HACE) engine. It tests
the currently implemented behavior of the hash functionality.
The tests are similar, but are cut/pasted instead of broken out into a
common function so the assert machinery produces useful output when a
test fails.
Co-developed-by: Cédric Le Goater <clg@kaod.org>
Co-developed-by: Klaus Heinrich Kiwi <klaus@linux.vnet.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Klaus Heinrich Kiwi <klaus@linux.vnet.ibm.com>
Acked-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Message-Id: <20210409000253.1475587-4-joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: bd0d5141a3110ff137246d3b7c3cfe2b41a2ece2
https://github.com/qemu/qemu/commit/bd0d5141a3110ff137246d3b7c3cfe2b41a2ece2
Author: Joel Stanley <joel@jms.id.au>
Date: 2021-04-30 (Fri, 30 Apr 2021)
Changed paths:
M tests/acceptance/boot_linux_console.py
Log Message:
-----------
tests/acceptance: Test ast2400 and ast2500 machines
Test MTD images from the OpenBMC project on AST2400 and AST2500 SoCs
from ASPEED, by booting Palmetto and Romulus BMC machines.
The images are fetched from OpenBMC's release directory on github.
Cc: Cleber Rosa <crosa@redhat.com>
Cc: Wainer dos Santos Moschetta <wainersm@redhat.com>
Co-developed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Tested-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cleber Rosa <crosa@redhat.com>
Tested-by: Cleber Rosa <crosa@redhat.com>
[ clg : - removed comment
- removed ending self.vm.shutdown() ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20210304123951.163411-2-joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Willian Rampazzo <willianr@redhat.com>
Message-Id: <20210407171637.777743-12-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: d4240b50467daea4da007ebb1974c1583e9bf9eb
https://github.com/qemu/qemu/commit/d4240b50467daea4da007ebb1974c1583e9bf9eb
Author: Joel Stanley <joel@jms.id.au>
Date: 2021-04-30 (Fri, 30 Apr 2021)
Changed paths:
M tests/acceptance/boot_linux_console.py
Log Message:
-----------
tests/acceptance: Test ast2600 machine
This tests a Debian multi-soc arm32 Linux kernel on the AST2600 based
Tacoma BMC machine.
There is no root file system so the test terminates when boot reaches
the stage where it attempts and fails to mount something.
Cc: Cleber Rosa <crosa@redhat.com>
Cc: Wainer dos Santos Moschetta <wainersm@redhat.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Tested-by: Cédric Le Goater <clg@kaod.org>
[ clg : - removed comment
- removed ending self.vm.shutdown() ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20210304123951.163411-3-joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Willian Rampazzo <willianr@redhat.com>
Message-Id: <20210407171637.777743-13-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: e58329a25d581a4dfb23878869d6e17c8426579a
https://github.com/qemu/qemu/commit/e58329a25d581a4dfb23878869d6e17c8426579a
Author: Cédric Le Goater <clg@kaod.org>
Date: 2021-04-30 (Fri, 30 Apr 2021)
Changed paths:
M hw/arm/aspeed_ast2600.c
M hw/arm/aspeed_soc.c
M hw/misc/aspeed_xdma.c
M include/hw/misc/aspeed_xdma.h
Log Message:
-----------
hw/misc/aspeed_xdma: Add AST2600 support
When we introduced support for the AST2600 SoC, the XDMA controller
was forgotten. It went unnoticed because it's not used under emulation.
But the register layout being different, the reset procedure is bogus
and this breaks kexec.
Add a AspeedXDMAClass to take into account the register differences.
Cc: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Eddie James <eajames@linux.ibm.com>
Message-Id: <20210407171637.777743-14-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: 7f86ada08dee83a3bb01a8cffd4ed58c33437ebb
https://github.com/qemu/qemu/commit/7f86ada08dee83a3bb01a8cffd4ed58c33437ebb
Author: Cédric Le Goater <clg@kaod.org>
Date: 2021-04-30 (Fri, 30 Apr 2021)
Changed paths:
M hw/ssi/aspeed_smc.c
M include/hw/ssi/aspeed_smc.h
Log Message:
-----------
aspeed/smc: Add a 'features' attribute to the object class
It will simplify extensions of the SMC model.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-Id: <20210407171637.777743-15-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: 35bbe95f32b417cde07c997fe9bf253ea3e924d0
https://github.com/qemu/qemu/commit/35bbe95f32b417cde07c997fe9bf253ea3e924d0
Author: Cédric Le Goater <clg@kaod.org>
Date: 2021-04-30 (Fri, 30 Apr 2021)
Changed paths:
M hw/ssi/aspeed_smc.c
M include/hw/ssi/aspeed_smc.h
Log Message:
-----------
aspeed/smc: Add extra controls to request DMA
The AST2600 SPI controllers have a set of bits to request/grant DMA
access. Add a new SMC feature for these controllers and use it to
check access to the DMA registers.
Cc: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-Id: <20210407171637.777743-16-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: 5760fa8e2582d8959c2061e322031ebb55774c35
https://github.com/qemu/qemu/commit/5760fa8e2582d8959c2061e322031ebb55774c35
Author: Cédric Le Goater <clg@kaod.org>
Date: 2021-04-30 (Fri, 30 Apr 2021)
Changed paths:
A tests/qtest/aspeed_smc-test.c
R tests/qtest/m25p80-test.c
M tests/qtest/meson.build
Log Message:
-----------
tests/qtest: Rename m25p80 test in aspeed_smc test
The m25p80 test depends on the Aspeed SMC controller to test our
SPI-NOR flash support. Reflect this dependency by changing the name.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-Id: <20210407171637.777743-17-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: 396f3029b621254324c2dca018721d10c23e2f93
https://github.com/qemu/qemu/commit/396f3029b621254324c2dca018721d10c23e2f93
Author: Cédric Le Goater <clg@kaod.org>
Date: 2021-04-30 (Fri, 30 Apr 2021)
Changed paths:
M docs/system/deprecated.rst
M hw/arm/aspeed.c
Log Message:
-----------
aspeed: Deprecate the swift-bmc machine
The SWIFT machine never came out of the lab and we already have enough
AST2500 based OpenPower machines.
Cc: Adriana Kobylak <anoo@us.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: e4aa17e006625b0c59e9156d84363fd011f8e4e9
https://github.com/qemu/qemu/commit/e4aa17e006625b0c59e9156d84363fd011f8e4e9
Author: Cédric Le Goater <clg@kaod.org>
Date: 2021-04-30 (Fri, 30 Apr 2021)
Changed paths:
M hw/arm/aspeed.c
Log Message:
-----------
aspeed: Add support for the rainier-bmc board
The Rainier BMC board is a board for the middle range POWER10 IBM systems.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-Id: <20210407171637.777743-19-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: 2c1e263f3ddf4d74b0681319664e4ef811745a91
https://github.com/qemu/qemu/commit/2c1e263f3ddf4d74b0681319664e4ef811745a91
Author: Cédric Le Goater <clg@kaod.org>
Date: 2021-04-30 (Fri, 30 Apr 2021)
Changed paths:
M hw/block/m25p80.c
Log Message:
-----------
hw/block: m25p80: Add support for mt25ql02g and mt25qu02g
The Micron mt25ql02g is a 3V 2Gb serial NOR flash memory supporting
dual I/O and quad I/O, 4KB, 32KB, 64KB sector erase. It also supports
4B opcodes. The mt25qu02g operates at 1.8V.
https://4donline.ihs.com/images/VipMasterIC/IC/MICT/MICT-S-A0008500026/MICT-S-A0008511423-1.pdf?hkey=52A5661711E402568146F3353EA87419
Cc: Alistair Francis <alistair.francis@wdc.com>
Cc: Francisco Iglesias <francisco.iglesias@xilinx.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: 1401dcd8aac9039797b995bfab078877a820c9c5
https://github.com/qemu/qemu/commit/1401dcd8aac9039797b995bfab078877a820c9c5
Author: Patrick Venture <venture@google.com>
Date: 2021-04-30 (Fri, 30 Apr 2021)
Changed paths:
M hw/arm/aspeed.c
Log Message:
-----------
aspeed: Add support for the quanta-q7l1-bmc board
The Quanta-Q71l BMC board is a board supported by OpenBMC.
Tested: Booted quanta-q71l firmware.
Signed-off-by: Patrick Venture <venture@google.com>
Reviewed-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20210416162426.3217033-1-venture@google.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: 752f26d69b2d1b58d07ed19b323dc09629da8baf
https://github.com/qemu/qemu/commit/752f26d69b2d1b58d07ed19b323dc09629da8baf
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-04-30 (Fri, 30 Apr 2021)
Changed paths:
M MAINTAINERS
M docs/system/arm/aspeed.rst
M docs/system/deprecated.rst
M hw/arm/aspeed.c
M hw/arm/aspeed_ast2600.c
M hw/arm/aspeed_soc.c
M hw/block/m25p80.c
M hw/i2c/aspeed_i2c.c
A hw/misc/aspeed_hace.c
M hw/misc/aspeed_xdma.c
M hw/misc/meson.build
M hw/ssi/aspeed_smc.c
M include/hw/arm/aspeed_soc.h
A include/hw/misc/aspeed_hace.h
M include/hw/misc/aspeed_xdma.h
M include/hw/ssi/aspeed_smc.h
M tests/acceptance/boot_linux_console.py
A tests/qtest/aspeed_hace-test.c
A tests/qtest/aspeed_smc-test.c
R tests/qtest/m25p80-test.c
M tests/qtest/meson.build
Log Message:
-----------
Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20210430'
into staging
Aspeed patches :
* Fixes for the DMA space
* New model for ASPEED's Hash and Crypto Engine (Joel and Klaus)
* Acceptance tests (Joel)
* A fix for the XDMA model
* Some extra features for the SMC controller.
* Two new boards : rainier-bmc and quanta-q7l1-bmc (Patrick)
# gpg: Signature made Fri 30 Apr 2021 17:30:46 BST
# gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1
* remotes/legoater/tags/pull-aspeed-20210430:
aspeed: Add support for the quanta-q7l1-bmc board
hw/block: m25p80: Add support for mt25ql02g and mt25qu02g
aspeed: Add support for the rainier-bmc board
aspeed: Deprecate the swift-bmc machine
tests/qtest: Rename m25p80 test in aspeed_smc test
aspeed/smc: Add extra controls to request DMA
aspeed/smc: Add a 'features' attribute to the object class
hw/misc/aspeed_xdma: Add AST2600 support
tests/acceptance: Test ast2600 machine
tests/acceptance: Test ast2400 and ast2500 machines
tests/qtest: Add test for Aspeed HACE
aspeed: Integrate HACE
hw: Model ASPEED's Hash and Crypto Engine
hw/arm/aspeed: Do not sysbus-map mmio flash region directly, use alias
aspeed/i2c: Rename DMA address space
aspeed/i2c: Fix DMA address mask
aspeed/smc: Remove unused "sdram-base" property
aspeed/smc: Use the RAM memory region for DMAs
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Compare: https://github.com/qemu/qemu/compare/8f860d2633ba...752f26d69b2d
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Peter Maydell <=