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[Qemu-commits] [qemu/qemu] e6fa97: hw/arm/virt: Disable pl011 clock migr


From: Peter Maydell
Subject: [Qemu-commits] [qemu/qemu] e6fa97: hw/arm/virt: Disable pl011 clock migration if needed
Date: Tue, 23 Mar 2021 15:28:50 -0700

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: e6fa978d8343ec7cf20b9c8b2dcb390646242457
      
https://github.com/qemu/qemu/commit/e6fa978d8343ec7cf20b9c8b2dcb390646242457
  Author: Gavin Shan <gshan@redhat.com>
  Date:   2021-03-23 (Tue, 23 Mar 2021)

  Changed paths:
    M hw/char/pl011.c
    M hw/core/machine.c
    M include/hw/char/pl011.h

  Log Message:
  -----------
  hw/arm/virt: Disable pl011 clock migration if needed

A clock is added by commit aac63e0e6ea3 ("hw/char/pl011: add a clock
input") since v5.2.0 which corresponds to virt-5.2 machine type. It
causes backwards migration failure from upstream to downstream (v5.1.0)
when the machine type is specified with virt-5.1.

This fixes the issue by following instructions from section "Connecting
subsections to properties" in docs/devel/migration.rst. With this applied,
the PL011 clock is migrated based on the machine type.

   virt-5.2 or newer:  migration
   virt-5.1 or older:  non-migration

Cc: qemu-stable@nongnu.org # v5.2.0+
Fixes: aac63e0e6ea3 ("hw/char/pl011: add a clock input")
Suggested-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Message-id: 20210318023801.18287-1-gshan@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: d1e8cf77f1739018b792ddc6b377b509fbf8e7c8
      
https://github.com/qemu/qemu/commit/d1e8cf77f1739018b792ddc6b377b509fbf8e7c8
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-03-23 (Tue, 23 Mar 2021)

  Changed paths:
    M include/exec/memory.h
    M tests/qtest/fuzz/generic_fuzz.c

  Log Message:
  -----------
  memory: Make flatview_cb return bool, not int

The return value of the flatview_cb callback passed to the
flatview_for_each_range() function is zero if the iteration through
the ranges should continue, or non-zero to break out of it.  Use a
bool for this rather than int.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210318174823.18066-2-peter.maydell@linaro.org


  Commit: a5e32ec1ed6353b853ec0b7874fd59eedc83c5ea
      
https://github.com/qemu/qemu/commit/a5e32ec1ed6353b853ec0b7874fd59eedc83c5ea
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-03-23 (Tue, 23 Mar 2021)

  Changed paths:
    M include/exec/memory.h

  Log Message:
  -----------
  memory: Document flatview_for_each_range()

Add a documentation comment describing flatview_for_each_range().

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210318174823.18066-3-peter.maydell@linaro.org


  Commit: b3566001d4d4c3f4626442584556bd18b0e7243b
      
https://github.com/qemu/qemu/commit/b3566001d4d4c3f4626442584556bd18b0e7243b
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-03-23 (Tue, 23 Mar 2021)

  Changed paths:
    M include/exec/memory.h
    M softmmu/memory.c
    M tests/qtest/fuzz/generic_fuzz.c

  Log Message:
  -----------
  memory: Add offset_in_region to flatview_cb arguments

The function flatview_for_each_range() calls a callback for each
range in a FlatView.  Currently the callback gets the start and
length of the range and the MemoryRegion involved, but not the offset
within the MemoryRegion.  Add this to the callback's arguments; we're
going to want it for a new use in the next commit.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210318174823.18066-4-peter.maydell@linaro.org


  Commit: 1228c4596a0046b3e4e71f62773caa835dfc79df
      
https://github.com/qemu/qemu/commit/1228c4596a0046b3e4e71f62773caa835dfc79df
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-03-23 (Tue, 23 Mar 2021)

  Changed paths:
    M hw/core/loader.c
    M include/hw/loader.h

  Log Message:
  -----------
  hw/core/loader: Add new function rom_ptr_for_as()

For accesses to rom blob data before or during reset, we have a
function rom_ptr() which looks for a rom blob that would be loaded to
the specified address, and returns a pointer into the rom blob data
corresponding to that address.  This allows board or CPU code to say
"what is the data that is going to be loaded to this address?".

However, this function does not take account of memory region
aliases.  If for instance a machine model has RAM at address
0x0000_0000 which is aliased to also appear at 0x1000_0000, a
rom_ptr() query for address 0x0000_0000 will only return a match if
the guest image provided by the user was loaded at 0x0000_0000 and
not if it was loaded at 0x1000_0000, even though they are the same
RAM and a run-time guest CPU read of 0x0000_0000 will read the data
loaded to 0x1000_0000.

Provide a new function rom_ptr_for_as() which takes an AddressSpace
argument, so that it can check whether the MemoryRegion corresponding
to the address is also mapped anywhere else in the AddressSpace and
look for rom blobs that loaded to that alias.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210318174823.18066-5-peter.maydell@linaro.org


  Commit: 75ce72b785a7c9fcb9af2779854142a34825da59
      
https://github.com/qemu/qemu/commit/75ce72b785a7c9fcb9af2779854142a34825da59
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-03-23 (Tue, 23 Mar 2021)

  Changed paths:
    M target/arm/cpu.c

  Log Message:
  -----------
  target/arm: Make M-profile VTOR loads on reset handle memory aliasing

For Arm M-profile CPUs, on reset the CPU must load its initial PC and
SP from a vector table in guest memory.  Because we can't guarantee
reset ordering, we have to handle the possibility that the ROM blob
loader's reset function has not yet run when the CPU resets, in which
case the data in an ELF file specified by the user won't be in guest
memory to be read yet.

We work around the reset ordering problem by checking whether the ROM
blob loader has any data for the address where the vector table is,
using rom_ptr().  Unfortunately this does not handle the possibility
of memory aliasing.  For many M-profile boards, memory can be
accessed via multiple possible physical addresses; if the board has
the vector table at address X but the user's ELF file loads data via
a different address Y which is an alias to the same underlying guest
RAM then rom_ptr() will not find it.

Use the new rom_ptr_for_as() function, which deals with memory
aliasing when locating a relevant ROM blob.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210318174823.18066-6-peter.maydell@linaro.org


  Commit: dad90de78e9e9d47cefcbcd30115706b98e6ec87
      
https://github.com/qemu/qemu/commit/dad90de78e9e9d47cefcbcd30115706b98e6ec87
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-03-23 (Tue, 23 Mar 2021)

  Changed paths:
    M target/arm/tlb_helper.c

  Log Message:
  -----------
  target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill

Pretend the fault always happens at page table level 3.

Failure to set this leaves level = 0, which is impossible for
ARMFault_Permission, and produces an invalid syndrome, which
reaches g_assert_not_reached in cpu_loop.

Fixes: 8db94ab4e5db ("linux-user/aarch64: Pass syndrome to EXC_*_ABORT")
Reported-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20210320000606.1788699-1-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 1a4d83b5643e8e965cbc16950f78066a7cd27cb4
      
https://github.com/qemu/qemu/commit/1a4d83b5643e8e965cbc16950f78066a7cd27cb4
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-03-23 (Tue, 23 Mar 2021)

  Changed paths:
    M hw/char/pl011.c
    M hw/core/loader.c
    M hw/core/machine.c
    M include/exec/memory.h
    M include/hw/char/pl011.h
    M include/hw/loader.h
    M softmmu/memory.c
    M target/arm/cpu.c
    M target/arm/tlb_helper.c
    M tests/qtest/fuzz/generic_fuzz.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210323' 
into staging

target-arm queue:
 * hw/arm/virt: Disable pl011 clock migration if needed
 * target/arm: Make M-profile VTOR loads on reset handle memory aliasing
 * target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill

# gpg: Signature made Tue 23 Mar 2021 14:26:09 GMT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" 
[ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20210323:
  target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill
  target/arm: Make M-profile VTOR loads on reset handle memory aliasing
  hw/core/loader: Add new function rom_ptr_for_as()
  memory: Add offset_in_region to flatview_cb arguments
  memory: Document flatview_for_each_range()
  memory: Make flatview_cb return bool, not int
  hw/arm/virt: Disable pl011 clock migration if needed

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Compare: https://github.com/qemu/qemu/compare/ae3845efb306...1a4d83b5643e



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