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[Qemu-commits] [qemu/qemu] 999be4: tests/qtest: Test PWM fan RPM using M


From: Peter Maydell
Subject: [Qemu-commits] [qemu/qemu] 999be4: tests/qtest: Test PWM fan RPM using MFT in PWM test
Date: Sun, 14 Mar 2021 06:19:22 -0700

  Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: 999be4a2d3d156ba38d4620e3dbfc8851943874f
      
https://github.com/qemu/qemu/commit/999be4a2d3d156ba38d4620e3dbfc8851943874f
  Author: Hao Wu <wuhaotsh@google.com>
  Date:   2021-03-12 (Fri, 12 Mar 2021)

  Changed paths:
    M tests/qtest/npcm7xx_pwm-test.c

  Log Message:
  -----------
  tests/qtest: Test PWM fan RPM using MFT in PWM test

This patch adds testing of PWM fan RPMs in the existing npcm7xx pwm
test. It tests whether the MFT module can measure correct fan values
for a PWM fan in NPCM7XX boards.

Reviewed-by: Doug Evans <dje@google.com>
Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20210311180855.149764-6-wuhaotsh@google.com
[PMM: fixed format strings for printing uint64_t]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 62bdc8c1646fe710c35f34d0b63a2b520807696c
      
https://github.com/qemu/qemu/commit/62bdc8c1646fe710c35f34d0b63a2b520807696c
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-03-14 (Sun, 14 Mar 2021)

  Changed paths:
    M hw/display/pl110.c

  Log Message:
  -----------
  hw/display/pl110: Remove dead code for non-32-bpp surfaces

For a long time now the UI layer has guaranteed that the console
surface is always 32 bits per pixel. Remove the legacy dead
code from the pl110 display device which was handling the
possibility that the console surface was some other format.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id: 20210211141515.8755-2-peter.maydell@linaro.org


  Commit: 560ebce6b2c54367e63757567230344c13999dc7
      
https://github.com/qemu/qemu/commit/560ebce6b2c54367e63757567230344c13999dc7
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-03-14 (Sun, 14 Mar 2021)

  Changed paths:
    M hw/display/pl110.c
    M hw/display/pl110_template.h

  Log Message:
  -----------
  hw/display/pl110: Pull included-once parts of template header into pl110.c

The pl110_template.h header has a doubly-nested multiple-include pattern:
 * pl110.c includes it once for each host bit depth (now always 32)
 * every time it is included, it includes itself 6 times, to account
   for multiple guest device pixel and byte orders

Now we only have to deal with 32-bit host bit depths, we can move the
code corresponding to the outer layer of this double-nesting to be
directly in pl110.c and reduce the template header to a single layer
of nesting.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id: 20210211141515.8755-3-peter.maydell@linaro.org


  Commit: ba1c16e425011cf5ad73a07d3fdcf080e08c91e4
      
https://github.com/qemu/qemu/commit/ba1c16e425011cf5ad73a07d3fdcf080e08c91e4
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-03-14 (Sun, 14 Mar 2021)

  Changed paths:
    M hw/display/pl110.c
    M hw/display/pl110_template.h

  Log Message:
  -----------
  hw/display/pl110: Remove use of BITS from pl110_template.h

BITS is always 32, so remove all uses of it from the template header,
by dropping the trailing '32' from the draw function names and
not constructing the name of rgb_to_pixel32() via the glue() macro.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id: 20210211141515.8755-4-peter.maydell@linaro.org


  Commit: e834dfc64c8df1b28b3bf903a6fc231d033e7d5e
      
https://github.com/qemu/qemu/commit/e834dfc64c8df1b28b3bf903a6fc231d033e7d5e
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-03-14 (Sun, 14 Mar 2021)

  Changed paths:
    M hw/display/pxa2xx_lcd.c

  Log Message:
  -----------
  hw/display/pxa2xx_lcd: Remove dead code for non-32-bpp surfaces

For a long time now the UI layer has guaranteed that the console
surface is always 32 bits per pixel.  Remove the legacy dead code
from the pxa2xx_lcd display device which was handling the possibility
that the console surface was some other format.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id: 20210211141515.8755-5-peter.maydell@linaro.org


  Commit: 9e53ecdc20c0d94550c7bfde217e63e4362196f3
      
https://github.com/qemu/qemu/commit/9e53ecdc20c0d94550c7bfde217e63e4362196f3
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-03-14 (Sun, 14 Mar 2021)

  Changed paths:
    M hw/display/pxa2xx_lcd.c

  Log Message:
  -----------
  hw/display/pxa2xx_lcd: Remove dest_width state field

Since the dest_width is now always 4 because the output surface is
32bpp, we can replace the dest_width state field with a constant.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id: 20210211141515.8755-6-peter.maydell@linaro.org


  Commit: b48b884fc45cfc1d615ed5d028abbe278992800a
      
https://github.com/qemu/qemu/commit/b48b884fc45cfc1d615ed5d028abbe278992800a
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-03-14 (Sun, 14 Mar 2021)

  Changed paths:
    M hw/display/pxa2xx_template.h

  Log Message:
  -----------
  hw/display/pxa2xx: Remove use of BITS in pxa2xx_template.h

Now that BITS is always 32, expand out all its uses in the template
header, including removing now-useless uses of the glue() macro.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id: 20210211141515.8755-7-peter.maydell@linaro.org


  Commit: 9347e042088430e3bb860692b02fdec6be1ac4da
      
https://github.com/qemu/qemu/commit/9347e042088430e3bb860692b02fdec6be1ac4da
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-03-14 (Sun, 14 Mar 2021)

  Changed paths:
    M hw/display/pxa2xx_template.h

  Log Message:
  -----------
  hw/display/pxa2xx: Apply brace-related coding style fixes to template header

We're about to move code from the template header into pxa2xx_lcd.c.
Before doing that, make coding style fixes so checkpatch doesn't
complain about the patch which moves the code. This commit fixes
missing braces in the SKIP_PIXEL() macro definition and in if()
statements.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id: 20210211141515.8755-8-peter.maydell@linaro.org


  Commit: 540817e22f6bf92b68ef894dacccb2a057d3b668
      
https://github.com/qemu/qemu/commit/540817e22f6bf92b68ef894dacccb2a057d3b668
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-03-14 (Sun, 14 Mar 2021)

  Changed paths:
    M hw/display/pxa2xx_template.h

  Log Message:
  -----------
  hw/display/pxa2xx: Apply whitespace-only coding style fixes to template header

We're about to move code from the template header into pxa2xx_lcd.c.
Before doing that, make coding style fixes so checkpatch doesn't
complain about the patch which moves the code. This commit is
whitespace changes only:
 * avoid hard-coded tabs
 * fix ident on function prototypes
 * no newline before open brace on array definitions

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id: 20210211141515.8755-9-peter.maydell@linaro.org


  Commit: 6500ac13ff8e5c64ca69f5ef5d456028cfda6139
      
https://github.com/qemu/qemu/commit/6500ac13ff8e5c64ca69f5ef5d456028cfda6139
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-03-14 (Sun, 14 Mar 2021)

  Changed paths:
    M hw/display/pxa2xx_lcd.c
    R hw/display/pxa2xx_template.h

  Log Message:
  -----------
  hw/display/pxa2xx: Inline template header

The template header is now included only once; just inline its contents
in hw/display/pxa2xx_lcd.c.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id: 20210211141515.8755-10-peter.maydell@linaro.org


  Commit: 6f8a81fc296535f73c48cf9563862e088cc71c57
      
https://github.com/qemu/qemu/commit/6f8a81fc296535f73c48cf9563862e088cc71c57
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-03-14 (Sun, 14 Mar 2021)

  Changed paths:
    M accel/kvm/kvm-all.c
    M docs/system/arm/nuvoton.rst
    M docs/system/arm/xlnx-versal-virt.rst
    M hw/arm/npcm7xx.c
    M hw/arm/npcm7xx_boards.c
    M hw/arm/smmu-common.c
    M hw/arm/smmu-internal.h
    M hw/arm/smmuv3.c
    M hw/arm/trace-events
    M hw/arm/virt.c
    M hw/arm/xlnx-versal.c
    M hw/display/pl110.c
    M hw/display/pl110_template.h
    M hw/display/pxa2xx_lcd.c
    R hw/display/pxa2xx_template.h
    M hw/i386/intel_iommu.c
    M hw/misc/meson.build
    A hw/misc/npcm7xx_mft.c
    M hw/misc/npcm7xx_pwm.c
    M hw/misc/trace-events
    A hw/misc/xlnx-versal-xramc.c
    M hw/net/allwinner-sun8i-emac.c
    M hw/timer/sse-timer.c
    M hw/virtio/virtio-iommu.c
    M include/hw/arm/npcm7xx.h
    M include/hw/arm/xlnx-versal.h
    M include/hw/boards.h
    A include/hw/misc/npcm7xx_mft.h
    M include/hw/misc/npcm7xx_pwm.h
    A include/hw/misc/xlnx-versal-xramc.h
    M include/sysemu/dma.h
    M softmmu/dma-helpers.c
    M target/arm/kvm.c
    M target/arm/kvm_arm.h
    M target/arm/sve_helper.c
    M target/arm/translate-sve.c
    M tests/acceptance/boot_linux_console.py
    M tests/acceptance/replay_kernel.py
    M tests/qtest/npcm7xx_pwm-test.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210314' 
into staging

target-arm queue:
 * versal: Support XRAMs and XRAM controller
 * smmu: Various minor bug fixes
 * SVE emulation: fix bugs handling odd vector lengths
 * allwinner-sun8i-emac: traverse transmit queue using TX_CUR_DESC register 
value
 * tests/acceptance: fix orangepi-pc acceptance tests
 * hw/timer/sse-timer: Propagate eventual error in sse_timer_realize()
 * hw/arm/virt: KVM: The IPA lower bound is 32
 * npcm7xx: support MFT module
 * pl110, pxa2xx_lcd: tidy up template headers

# gpg: Signature made Sun 14 Mar 2021 13:17:43 GMT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" 
[ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20210314: (39 commits)
  hw/display/pxa2xx: Inline template header
  hw/display/pxa2xx: Apply whitespace-only coding style fixes to template header
  hw/display/pxa2xx: Apply brace-related coding style fixes to template header
  hw/display/pxa2xx: Remove use of BITS in pxa2xx_template.h
  hw/display/pxa2xx_lcd: Remove dest_width state field
  hw/display/pxa2xx_lcd: Remove dead code for non-32-bpp surfaces
  hw/display/pl110: Remove use of BITS from pl110_template.h
  hw/display/pl110: Pull included-once parts of template header into pl110.c
  hw/display/pl110: Remove dead code for non-32-bpp surfaces
  tests/qtest: Test PWM fan RPM using MFT in PWM test
  hw/arm: Connect PWM fans in NPCM7XX boards
  hw/arm: Add MFT device to NPCM7xx Soc
  hw/misc: Add NPCM7XX MFT Module
  hw/misc: Add GPIOs for duty in NPCM7xx PWM
  hw/arm/virt: KVM: The IPA lower bound is 32
  accel: kvm: Fix kvm_type invocation
  hw/timer/sse-timer: Propagate eventual error in sse_timer_realize()
  tests/acceptance: drop ARMBIAN_ARTIFACTS_CACHED condition for orangepi-pc, 
cubieboard tests
  tests/acceptance: update sunxi kernel from armbian to 5.10.16
  tests/acceptance/boot_linux_console: change URL for 
test_arm_orangepi_bionic_20_08
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Compare: https://github.com/qemu/qemu/compare/9a954a4a62a7...6f8a81fc2965



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