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[Qemu-commits] [qemu/qemu] d9c585: tcg: Introduce target-specific page d
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From: |
Peter Maydell |
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Subject: |
[Qemu-commits] [qemu/qemu] d9c585: tcg: Introduce target-specific page data for user-... |
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Date: |
Wed, 17 Feb 2021 05:03:26 -0800 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: d9c5858570a57f374b71216c5da39ee381fa92f5
https://github.com/qemu/qemu/commit/d9c5858570a57f374b71216c5da39ee381fa92f5
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M accel/tcg/translate-all.c
M include/exec/cpu-all.h
M linux-user/mmap.c
M linux-user/syscall.c
Log Message:
-----------
tcg: Introduce target-specific page data for user-only
This data can be allocated by page_alloc_target_data() and
released by page_set_flags(start, end, prot | PAGE_RESET).
This data will be used to hold tag memory for AArch64 MTE.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-2-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 26bab757d41b853ea84cb52a10fafc9c10069658
https://github.com/qemu/qemu/commit/26bab757d41b853ea84cb52a10fafc9c10069658
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M include/exec/cpu-all.h
M linux-user/mmap.c
Log Message:
-----------
linux-user: Introduce PAGE_ANON
Record whether the backing page is anonymous, or if it has file
backing. This will allow us to get close to the Linux AArch64
ABI for MTE, which allows tag memory only on ram-backed VMAs.
The real ABI allows tag memory on files, when those files are
on ram-backed filesystems, such as tmpfs. We will not be able
to implement that in QEMU linux-user.
Thankfully, anonymous memory for malloc arenas is the primary
consumer of this feature, so this restricted version should
still be of use.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 5ca870b9f6c0e9f544356f6cbdc453432b09e086
https://github.com/qemu/qemu/commit/5ca870b9f6c0e9f544356f6cbdc453432b09e086
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M bsd-user/main.c
M include/exec/cpu-all.h
M linux-user/elfload.c
M linux-user/main.c
Log Message:
-----------
exec: Use uintptr_t for guest_base
This is more descriptive than 'unsigned long'.
No functional change, since these match on all linux+bsd hosts.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210212184902.1251044-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 9abf09ffdeb0812b8eee527894d6e55b2df45915
https://github.com/qemu/qemu/commit/9abf09ffdeb0812b8eee527894d6e55b2df45915
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M include/exec/cpu_ldst.h
Log Message:
-----------
exec: Use uintptr_t in cpu_ldst.h
This is more descriptive than 'unsigned long'.
No functional change, since these match on all linux+bsd hosts.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210212184902.1251044-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 19d3c905fef84ace72010d1cab2d09d69ebfcdcb
https://github.com/qemu/qemu/commit/19d3c905fef84ace72010d1cab2d09d69ebfcdcb
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M include/exec/cpu_ldst.h
Log Message:
-----------
exec: Improve types for guest_addr_valid
Return bool not int; pass abi_ulong not 'unsigned long'.
All callers use abi_ulong already, so the change in type
has no effect.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210212184902.1251044-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 4feac83a9ca12af2eaa1354867b6cdac0e69a17b
https://github.com/qemu/qemu/commit/4feac83a9ca12af2eaa1354867b6cdac0e69a17b
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M linux-user/qemu.h
Log Message:
-----------
linux-user: Check for overflow in access_ok
Verify that addr + size - 1 does not wrap around.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-7-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 68f77666649bcb033b2c563998b7c19016de6d8b
https://github.com/qemu/qemu/commit/68f77666649bcb033b2c563998b7c19016de6d8b
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M linux-user/qemu.h
Log Message:
-----------
linux-user: Tidy VERIFY_READ/VERIFY_WRITE
These constants are only ever used with access_ok, and friends.
Rather than translating them to PAGE_* bits, let them equal
the PAGE_* bits to begin.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-8-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 1720751f94492bb5947ac0e6e200950f824b9389
https://github.com/qemu/qemu/commit/1720751f94492bb5947ac0e6e200950f824b9389
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M bsd-user/qemu.h
Log Message:
-----------
bsd-user: Tidy VERIFY_READ/VERIFY_WRITE
These constants are only ever used with access_ok, and friends.
Rather than translating them to PAGE_* bits, let them equal
the PAGE_* bits to begin.
Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-9-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 57096f2977fe4b926343162df504652445dfcbcf
https://github.com/qemu/qemu/commit/57096f2977fe4b926343162df504652445dfcbcf
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M include/exec/cpu_ldst.h
Log Message:
-----------
linux-user: Do not use guest_addr_valid for h2g_valid
This is the only use of guest_addr_valid that does not begin
with a guest address, but a host address being transformed to
a guest address.
We will shortly adjust guest_addr_valid to handle guest memory
tags, and the host address should not be subjected to that.
Move h2g_valid adjacent to the other h2g macros.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-10-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: a78a6363cb8e55cc8ede334ba68d54ba8a185409
https://github.com/qemu/qemu/commit/a78a6363cb8e55cc8ede334ba68d54ba8a185409
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M include/exec/cpu_ldst.h
Log Message:
-----------
linux-user: Fix guest_addr_valid vs reserved_va
We must always use GUEST_ADDR_MAX, because even 32-bit hosts can
use -R <reserved_va> to restrict the memory address of the guest.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-11-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 141a56d844e0b57d46026c2913179c5ac05e6010
https://github.com/qemu/qemu/commit/141a56d844e0b57d46026c2913179c5ac05e6010
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M include/exec/cpu_ldst.h
Log Message:
-----------
exec: Introduce cpu_untagged_addr
Provide an identity fallback for target that do not
use tagged addresses.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-12-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 3e8f1628e864201692aa28996f8f64f9761555af
https://github.com/qemu/qemu/commit/3e8f1628e864201692aa28996f8f64f9761555af
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M accel/tcg/translate-all.c
M accel/tcg/user-exec.c
M bsd-user/elfload.c
M bsd-user/main.c
M bsd-user/mmap.c
M bsd-user/qemu.h
M include/exec/cpu_ldst.h
M include/exec/exec-all.h
M linux-user/elfload.c
M linux-user/flatload.c
M linux-user/hppa/cpu_loop.c
M linux-user/i386/cpu_loop.c
M linux-user/mmap.c
M linux-user/ppc/signal.c
M linux-user/qemu.h
M linux-user/syscall.c
M target/arm/helper-a64.c
M target/hppa/op_helper.c
M target/i386/tcg/mem_helper.c
M target/s390x/mem_helper.c
Log Message:
-----------
exec: Use cpu_untagged_addr in g2h; split out g2h_untagged
Use g2h_untagged in contexts that have no cpu, e.g. the binary
loaders that operate before the primary cpu is created. As a
colollary, target_mmap and friends must use untagged addresses,
since they are used by the loaders.
Use g2h_untagged on values returned from target_mmap, as the
kernel never applies a tag itself.
Use g2h_untagged on all pc values. The only current user of
tags, aarch64, removes tags from code addresses upon branch,
so "pc" is always untagged.
Use g2h with the cpu context on hand wherever possible.
Use g2h_untagged in lock_user, which will be updated soon.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-13-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: ee1bf83de79143e5893f19e1aa657d1c37ba0c70
https://github.com/qemu/qemu/commit/ee1bf83de79143e5893f19e1aa657d1c37ba0c70
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M linux-user/syscall.c
Log Message:
-----------
linux-user: Explicitly untag memory management syscalls
We define target_mmap et al as untagged, so that they can be
used from the binary loaders. Explicitly call cpu_untagged_addr
for munmap, mprotect, mremap syscall entry points.
Add a few comments for the syscalls that are exempted by the
kernel's tagged-address-abi.rst.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-14-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 114556c533acdaf4c2cdada245890572985b2912
https://github.com/qemu/qemu/commit/114556c533acdaf4c2cdada245890572985b2912
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M linux-user/qemu.h
Log Message:
-----------
linux-user: Use guest_range_valid in access_ok
We're currently open-coding the range check in access_ok;
use guest_range_valid when size != 0.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-15-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 46b12f461ca063e2cecc53d5805232f05336f02d
https://github.com/qemu/qemu/commit/46b12f461ca063e2cecc53d5805232f05336f02d
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M accel/tcg/user-exec.c
M include/exec/cpu_ldst.h
M linux-user/mmap.c
M linux-user/qemu.h
M linux-user/syscall.c
Log Message:
-----------
exec: Rename guest_{addr,range}_valid to *_untagged
The places that use these are better off using untagged
addresses, so do not provide a tagged versions. Rename
to make it clear about the address type.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-16-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: c7169b022b329a121d0c7acb550a08efa04d816a
https://github.com/qemu/qemu/commit/c7169b022b329a121d0c7acb550a08efa04d816a
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M linux-user/elfload.c
M linux-user/hppa/cpu_loop.c
M linux-user/i386/cpu_loop.c
M linux-user/i386/signal.c
M linux-user/qemu.h
M linux-user/syscall.c
Log Message:
-----------
linux-user: Use cpu_untagged_addr in access_ok; split out *_untagged
Provide both tagged and untagged versions of access_ok.
In a few places use thread_cpu, as the user is several
callees removed from do_syscall1.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-17-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 687ca797893ca1e8538592f19ac61e9eafd0b899
https://github.com/qemu/qemu/commit/687ca797893ca1e8538592f19ac61e9eafd0b899
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M linux-user/qemu.h
M linux-user/uaccess.c
Log Message:
-----------
linux-user: Move lock_user et al out of line
These functions are not small, except for unlock_user
without debugging enabled. Move them out of line, and
add missing braces on the way.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210212184902.1251044-18-richard.henderson@linaro.org
[PMM: fixed the sense of an ifdef test in qemu.h]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 09f679b62dffd437446307884597273618004b2c
https://github.com/qemu/qemu/commit/09f679b62dffd437446307884597273618004b2c
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M linux-user/qemu.h
M linux-user/uaccess.c
Log Message:
-----------
linux-user: Fix types in uaccess.c
For copy_*_user, only 0 and -TARGET_EFAULT are returned; no need
to involve abi_long. Use size_t for lengths. Use bool for the
lock_user copy argument. Use ssize_t for target_strlen, because
we can't overflow the host memory space.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210212184902.1251044-19-richard.henderson@linaro.org
[PMM: moved fix for ifdef error to previous commit]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 31c048342db09e70ab887aba9c7e0818c18d0fb1
https://github.com/qemu/qemu/commit/31c048342db09e70ab887aba9c7e0818c18d0fb1
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M linux-user/uaccess.c
Log Message:
-----------
linux-user: Handle tags in lock_user/unlock_user
Resolve the untagged address once, using thread_cpu.
Tidy the DEBUG_REMAP code using glib routines.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-20-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 0e0c030c681730f3ec55ba3b223b608a8f3e8282
https://github.com/qemu/qemu/commit/0e0c030c681730f3ec55ba3b223b608a8f3e8282
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M linux-user/aarch64/target_syscall.h
M linux-user/syscall.c
M target/arm/cpu-param.h
M target/arm/cpu.h
Log Message:
-----------
linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE
This is the prctl bit that controls whether syscalls accept tagged
addresses. See Documentation/arm64/tagged-address-abi.rst in the
linux kernel.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-21-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 2169b5c6f7a791ef9c43c72412efaafae3245114
https://github.com/qemu/qemu/commit/2169b5c6f7a791ef9c43c72412efaafae3245114
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M target/arm/translate-a64.c
Log Message:
-----------
target/arm: Improve gen_top_byte_ignore
Use simple arithmetic instead of a conditional
move when tbi0 != tbi1.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-22-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 16c849784873d10d0da257d698e391fddea1f0e4
https://github.com/qemu/qemu/commit/16c849784873d10d0da257d698e391fddea1f0e4
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M target/arm/cpu.c
M target/arm/internals.h
M tests/tcg/aarch64/pauth-2.c
Log Message:
-----------
target/arm: Use the proper TBI settings for linux-user
We were fudging TBI1 enabled to speed up the generated code.
Now that we've improved the code generation, remove this.
Also, tidy the comment to reflect the current code.
The pauth test was testing a kernel address (-1) and making
incorrect assumptions about TBI1; stick to userland addresses.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-23-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: bfd0572f43eea3162949fef02b4fd3fd6a3871d4
https://github.com/qemu/qemu/commit/bfd0572f43eea3162949fef02b4fd3fd6a3871d4
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M linux-user/aarch64/target_syscall.h
M linux-user/syscall.c
Log Message:
-----------
linux-user/aarch64: Implement PR_MTE_TCF and PR_MTE_TAG
These prctl fields are required for the function of MTE.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-24-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: d109b46d8d3568bcab76295ac31aa1d9d4268e11
https://github.com/qemu/qemu/commit/d109b46d8d3568bcab76295ac31aa1d9d4268e11
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M include/exec/cpu-all.h
M linux-user/mmap.c
M linux-user/syscall_defs.h
M target/arm/cpu.h
Log Message:
-----------
linux-user/aarch64: Implement PROT_MTE
Remember the PROT_MTE bit as PAGE_MTE/PAGE_TARGET_2.
Otherwise this does not yet have effect.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-25-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 1fe27859427bd377a45708310947de54c687d9ff
https://github.com/qemu/qemu/commit/1fe27859427bd377a45708310947de54c687d9ff
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M target/arm/internals.h
A target/arm/syndrome.h
Log Message:
-----------
target/arm: Split out syndrome.h from internals.h
Move everything related to syndromes to a new file,
which can be shared with linux-user.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210212184902.1251044-26-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 8db94ab4e5db798b29ad73aad42af0da9c09ec35
https://github.com/qemu/qemu/commit/8db94ab4e5db798b29ad73aad42af0da9c09ec35
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M linux-user/aarch64/cpu_loop.c
M target/arm/tlb_helper.c
Log Message:
-----------
linux-user/aarch64: Pass syndrome to EXC_*_ABORT
A proper syndrome is required to fill in the proper si_code.
Use page_get_flags to determine permission vs translation for user-only.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-27-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 61dbe03787f2f8bdd61da99ea19fd80b0d5c2bfa
https://github.com/qemu/qemu/commit/61dbe03787f2f8bdd61da99ea19fd80b0d5c2bfa
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M linux-user/aarch64/cpu_loop.c
M linux-user/aarch64/target_signal.h
Log Message:
-----------
linux-user/aarch64: Signal SEGV_MTESERR for sync tag check fault
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-28-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 5d70c3510b2cb5664430d25da5d9bcbb7443f63f
https://github.com/qemu/qemu/commit/5d70c3510b2cb5664430d25da5d9bcbb7443f63f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M linux-user/aarch64/cpu_loop.c
M linux-user/aarch64/target_signal.h
M target/arm/mte_helper.c
Log Message:
-----------
linux-user/aarch64: Signal SEGV_MTEAERR for async tag check error
The real kernel collects _TIF_MTE_ASYNC_FAULT into the current thread's
state on any kernel entry (interrupt, exception etc), and then delivers
the signal in advance of resuming the thread.
This means that while the signal won't be delivered immediately, it will
not be delayed forever -- at minimum it will be delivered after the next
clock interrupt.
We don't have a clock interrupt in linux-user, so we issue a cpu_kick
to signal a return to the main loop at the end of the current TB.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-29-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: a11d3830d96ad8077440ce4e0aa60608f1f12dde
https://github.com/qemu/qemu/commit/a11d3830d96ad8077440ce4e0aa60608f1f12dde
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M target/arm/mte_helper.c
Log Message:
-----------
target/arm: Add allocation tag storage for user mode
Use the now-saved PAGE_ANON and PAGE_MTE bits,
and the per-page saved data.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-30-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: e32328645ed6fc4f20f0164dfc9ce1bf7e667cc4
https://github.com/qemu/qemu/commit/e32328645ed6fc4f20f0164dfc9ce1bf7e667cc4
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M target/arm/cpu.c
Log Message:
-----------
target/arm: Enable MTE for user-only
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-31-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 36cd5fbdbf4e1cb540d479e9b1708cdd81dac298
https://github.com/qemu/qemu/commit/36cd5fbdbf4e1cb540d479e9b1708cdd81dac298
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M tests/tcg/aarch64/Makefile.target
A tests/tcg/aarch64/mte-1.c
A tests/tcg/aarch64/mte-2.c
A tests/tcg/aarch64/mte-3.c
A tests/tcg/aarch64/mte-4.c
A tests/tcg/aarch64/mte.h
M tests/tcg/configure.sh
Log Message:
-----------
tests/tcg/aarch64: Add mte smoke tests
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-32-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 94e778793954afc6ed47ef8e161044c79488e446
https://github.com/qemu/qemu/commit/94e778793954afc6ed47ef8e161044c79488e446
Author: Hao Wu <wuhaotsh@google.com>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M docs/system/arm/nuvoton.rst
M hw/arm/npcm7xx.c
M hw/i2c/meson.build
A hw/i2c/npcm7xx_smbus.c
M hw/i2c/trace-events
M include/hw/arm/npcm7xx.h
A include/hw/i2c/npcm7xx_smbus.h
Log Message:
-----------
hw/i2c: Implement NPCM7XX SMBus Module Single Mode
This commit implements the single-byte mode of the SMBus.
Each Nuvoton SoC has 16 System Management Bus (SMBus). These buses
compliant with SMBus and I2C protocol.
This patch implements the single-byte mode of the SMBus. In this mode,
the user sends or receives a byte each time. The SMBus device transmits
it to the underlying i2c device and sends an interrupt back to the QEMU
guest.
Reviewed-by: Doug Evans<dje@google.com>
Reviewed-by: Tyrong Ting<kfting@nuvoton.com>
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Corey Minyard <cminyard@mvista.com>
Message-id: 20210210220426.3577804-2-wuhaotsh@google.com
Acked-by: Corey Minyard <cminyard@mvista.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 86248f533e51e607236359203fd98be7cee25d63
https://github.com/qemu/qemu/commit/86248f533e51e607236359203fd98be7cee25d63
Author: Hao Wu <wuhaotsh@google.com>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M hw/arm/npcm7xx_boards.c
Log Message:
-----------
hw/arm: Add I2C sensors for NPCM750 eval board
Add I2C temperature sensors for NPCM750 eval board.
Reviewed-by: Doug Evans<dje@google.com>
Reviewed-by: Tyrong Ting<kfting@nuvoton.com>
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20210210220426.3577804-3-wuhaotsh@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 2ef1e0d7dc4bf1bede368807dd9ea4038262a2b1
https://github.com/qemu/qemu/commit/2ef1e0d7dc4bf1bede368807dd9ea4038262a2b1
Author: Hao Wu <wuhaotsh@google.com>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M hw/arm/Kconfig
M hw/arm/npcm7xx_boards.c
Log Message:
-----------
hw/arm: Add I2C sensors and EEPROM for GSJ machine
Add AT24 EEPROM and temperature sensors for GSJ machine.
Reviewed-by: Doug Evans<dje@google.com>
Reviewed-by: Tyrong Ting<kfting@nuvoton.com>
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Message-id: 20210210220426.3577804-4-wuhaotsh@google.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: d986bf729c3cfc8672cfc6f3ab99c2d5c2eb11f1
https://github.com/qemu/qemu/commit/d986bf729c3cfc8672cfc6f3ab99c2d5c2eb11f1
Author: Hao Wu <wuhaotsh@google.com>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M tests/qtest/meson.build
A tests/qtest/npcm7xx_smbus-test.c
Log Message:
-----------
hw/i2c: Add a QTest for NPCM7XX SMBus Device
This patch adds a QTest for NPCM7XX SMBus's single byte mode. It sends a
byte to a device in the evaluation board, and verify the retrieved value
is equivalent to the sent value.
Reviewed-by: Doug Evans<dje@google.com>
Reviewed-by: Tyrong Ting<kfting@nuvoton.com>
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20210210220426.3577804-5-wuhaotsh@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 6b6e7570d6ebc8bc6d9bc1356ae46708f02d3eeb
https://github.com/qemu/qemu/commit/6b6e7570d6ebc8bc6d9bc1356ae46708f02d3eeb
Author: Hao Wu <wuhaotsh@google.com>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M hw/i2c/npcm7xx_smbus.c
M hw/i2c/trace-events
M include/hw/i2c/npcm7xx_smbus.h
M tests/qtest/npcm7xx_smbus-test.c
Log Message:
-----------
hw/i2c: Implement NPCM7XX SMBus Module FIFO Mode
This patch implements the FIFO mode of the SMBus module. In FIFO, the
user transmits or receives at most 16 bytes at a time. The FIFO mode
allows the module to transmit large amount of data faster than single
byte mode.
Since we only added the device in a patch that is only a few commits
away in the same patch set. We do not increase the VMstate version
number in this special case.
Reviewed-by: Doug Evans<dje@google.com>
Reviewed-by: Tyrong Ting<kfting@nuvoton.com>
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Corey Minyard <cminyard@mvista.com>
Message-id: 20210210220426.3577804-6-wuhaotsh@google.com
Acked-by: Corey Minyard <cminyard@mvista.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 59c7a187dd8bd8ef675768dd8af9de11528ea7e2
https://github.com/qemu/qemu/commit/59c7a187dd8bd8ef675768dd8af9de11528ea7e2
Author: Luc Michel <luc@lmichel.fr>
Date: 2021-02-16 (Tue, 16 Feb 2021)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: add myself maintainer for the clock framework
Also add Damien as a reviewer.
Signed-off-by: Luc Michel <luc@lmichel.fr>
Acked-by: Damien Hedde <damien.hedde@greensocs.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210211085318.2507-1-luc@lmichel.fr
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 65d6ae4927d2974bcfe9326c3fdfa0fac5c6295b
https://github.com/qemu/qemu/commit/65d6ae4927d2974bcfe9326c3fdfa0fac5c6295b
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-02-17 (Wed, 17 Feb 2021)
Changed paths:
M MAINTAINERS
M accel/tcg/translate-all.c
M accel/tcg/user-exec.c
M bsd-user/elfload.c
M bsd-user/main.c
M bsd-user/mmap.c
M bsd-user/qemu.h
M docs/system/arm/nuvoton.rst
M hw/arm/Kconfig
M hw/arm/npcm7xx.c
M hw/arm/npcm7xx_boards.c
M hw/i2c/meson.build
A hw/i2c/npcm7xx_smbus.c
M hw/i2c/trace-events
M include/exec/cpu-all.h
M include/exec/cpu_ldst.h
M include/exec/exec-all.h
M include/hw/arm/npcm7xx.h
A include/hw/i2c/npcm7xx_smbus.h
M linux-user/aarch64/cpu_loop.c
M linux-user/aarch64/target_signal.h
M linux-user/aarch64/target_syscall.h
M linux-user/elfload.c
M linux-user/flatload.c
M linux-user/hppa/cpu_loop.c
M linux-user/i386/cpu_loop.c
M linux-user/i386/signal.c
M linux-user/main.c
M linux-user/mmap.c
M linux-user/ppc/signal.c
M linux-user/qemu.h
M linux-user/syscall.c
M linux-user/syscall_defs.h
M linux-user/uaccess.c
M target/arm/cpu-param.h
M target/arm/cpu.c
M target/arm/cpu.h
M target/arm/helper-a64.c
M target/arm/internals.h
M target/arm/mte_helper.c
A target/arm/syndrome.h
M target/arm/tlb_helper.c
M target/arm/translate-a64.c
M target/hppa/op_helper.c
M target/i386/tcg/mem_helper.c
M target/s390x/mem_helper.c
M tests/qtest/meson.build
A tests/qtest/npcm7xx_smbus-test.c
M tests/tcg/aarch64/Makefile.target
A tests/tcg/aarch64/mte-1.c
A tests/tcg/aarch64/mte-2.c
A tests/tcg/aarch64/mte-3.c
A tests/tcg/aarch64/mte-4.c
A tests/tcg/aarch64/mte.h
M tests/tcg/aarch64/pauth-2.c
M tests/tcg/configure.sh
Log Message:
-----------
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210217'
into staging
target-arm queue:
* Support ARMv8.5-MemTag for linux-user
* ncpm7xx: Support SMBus
* MAINTAINERS: add section for Clock framework
# gpg: Signature made Wed 17 Feb 2021 11:01:45 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
[ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20210217: (37 commits)
MAINTAINERS: add myself maintainer for the clock framework
hw/i2c: Implement NPCM7XX SMBus Module FIFO Mode
hw/i2c: Add a QTest for NPCM7XX SMBus Device
hw/arm: Add I2C sensors and EEPROM for GSJ machine
hw/arm: Add I2C sensors for NPCM750 eval board
hw/i2c: Implement NPCM7XX SMBus Module Single Mode
tests/tcg/aarch64: Add mte smoke tests
target/arm: Enable MTE for user-only
target/arm: Add allocation tag storage for user mode
linux-user/aarch64: Signal SEGV_MTEAERR for async tag check error
linux-user/aarch64: Signal SEGV_MTESERR for sync tag check fault
linux-user/aarch64: Pass syndrome to EXC_*_ABORT
target/arm: Split out syndrome.h from internals.h
linux-user/aarch64: Implement PROT_MTE
linux-user/aarch64: Implement PR_MTE_TCF and PR_MTE_TAG
target/arm: Use the proper TBI settings for linux-user
target/arm: Improve gen_top_byte_ignore
linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE
linux-user: Handle tags in lock_user/unlock_user
linux-user: Fix types in uaccess.c
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Compare: https://github.com/qemu/qemu/compare/18543229fd7a...65d6ae4927d2