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[Qemu-commits] [qemu/qemu] 7265bc: spapr.c: use g_auto* with 'nodename'
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From: |
Peter Maydell |
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Subject: |
[Qemu-commits] [qemu/qemu] 7265bc: spapr.c: use g_auto* with 'nodename' in CPU DT fun... |
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Date: |
Wed, 10 Feb 2021 05:39:08 -0800 |
Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: 7265bc3e5429a630a8de2459d510d5d66a072af9
https://github.com/qemu/qemu/commit/7265bc3e5429a630a8de2459d510d5d66a072af9
Author: Daniel Henrique Barboza <danielhb413@gmail.com>
Date: 2021-02-10 (Wed, 10 Feb 2021)
Changed paths:
M hw/ppc/spapr.c
Log Message:
-----------
spapr.c: use g_auto* with 'nodename' in CPU DT functions
Next patch will use the 'nodename' string in spapr_core_dt_populate()
after the point it's being freed today.
Instead of moving 'g_free(nodename)' around, let's do a QoL change in
both CPU DT functions where 'nodename' is being freed, and use
g_autofree to avoid the 'g_free()' call altogether.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20210120232305.241521-2-danielhb413@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: a85bb34e1c6c5da3a75d016b75587b763aa8ae94
https://github.com/qemu/qemu/commit/a85bb34e1c6c5da3a75d016b75587b763aa8ae94
Author: Daniel Henrique Barboza <danielhb413@gmail.com>
Date: 2021-02-10 (Wed, 10 Feb 2021)
Changed paths:
M hw/ppc/spapr.c
Log Message:
-----------
spapr.c: add 'name' property for hotplugged CPUs nodes
In the CPU hotunplug bug [1] the guest kernel throws a scary
message in dmesg:
pseries-hotplug-cpu: Failed to offline CPU <NULL>, rc: -16
The reason isn't related to the bug though. This happens because the
kernel file arch/powerpc/platform/pseries/hotplug-cpu.c, function
dlpar_cpu_remove(), is not finding the device_node.name of the offending
CPU.
We're not populating the 'name' property for hotplugged CPUs. Since the
kernel relies on device_node.name for identifying CPU nodes, and the
CPUs that are coldplugged has the 'name' property filled by SLOF, this
is creating an unneeded inconsistency between hotplug and coldplug CPUs
in the kernel.
Let's fill the 'name' property for hotplugged CPUs as well. This will
make the guest dmesg throws a less intimidating message when we try to
unplug the last online CPU:
pseries-hotplug-cpu: Failed to offline CPU PowerPC,POWER9@1, rc: -16
[1] https://bugzilla.redhat.com/1911414
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20210120232305.241521-3-danielhb413@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 040bdafce12f750816d879442014df2999a995c4
https://github.com/qemu/qemu/commit/040bdafce12f750816d879442014df2999a995c4
Author: Greg Kurz <groug@kaod.org>
Date: 2021-02-10 (Wed, 10 Feb 2021)
Changed paths:
M hw/ppc/spapr.c
M hw/ppc/spapr_pci.c
M include/hw/pci-host/spapr.h
Log Message:
-----------
spapr: Adjust firmware path of PCI devices
It is currently not possible to perform a strict boot from USB storage:
$ qemu-system-ppc64 -accel kvm -nodefaults -nographic -serial stdio \
-boot strict=on \
-device qemu-xhci \
-device usb-storage,drive=disk,bootindex=0 \
-blockdev driver=file,node-name=disk,filename=fedora-ppc64le.qcow2
SLOF **********************************************************************
QEMU Starting
Build Date = Jul 17 2020 11:15:24
FW Version = git-e18ddad8516ff2cf
Press "s" to enter Open Firmware.
Populating /vdevice methods
Populating /vdevice/vty@71000000
Populating /vdevice/nvram@71000001
Populating /pci@800000020000000
00 0000 (D) : 1b36 000d serial bus [ usb-xhci ]
No NVRAM common partition, re-initializing...
Scanning USB
XHCI: Initializing
USB Storage
SCSI: Looking for devices
101000000000000 DISK : "QEMU QEMU HARDDISK 2.5+"
Using default console: /vdevice/vty@71000000
Welcome to Open Firmware
Copyright (c) 2004, 2017 IBM Corporation All rights reserved.
This program and the accompanying materials are made available
under the terms of the BSD License available at
http://www.opensource.org/licenses/bsd-license.php
Trying to load: from:
/pci@800000020000000/usb@0/storage@1/disk@101000000000000 ...
E3405: No such device
E3407: Load failed
Type 'boot' and press return to continue booting the system.
Type 'reset-all' and press return to reboot the system.
Ready!
0 >
The device tree handed over by QEMU to SLOF indeed contains:
qemu,boot-list =
"/pci@800000020000000/usb@0/storage@1/disk@101000000000000 HALT";
but the device node is named usb-xhci@0, not usb@0.
This happens because the firmware names of PCI devices returned
by get_boot_devices_list() come from pcibus_get_fw_dev_path(),
while the sPAPR PHB code uses a different naming scheme for
device nodes. This inconsistency has always been there but it was
hidden for a long time because SLOF used to rename USB device
nodes, until this commit, merged in QEMU 4.2.0 :
commit 85164ad4ed9960cac842fa4cc067c6b6699b0994
Author: Alexey Kardashevskiy <aik@ozlabs.ru>
Date: Wed Sep 11 16:24:32 2019 +1000
pseries: Update SLOF firmware image
This fixes USB host bus adapter name in the device tree to match QEMU's
one.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Fortunately, sPAPR implements the firmware path provider interface.
This provides a way to override the default firmware paths.
Just factor out the sPAPR PHB naming logic from spapr_dt_pci_device()
to a helper, and use it in the sPAPR firmware path provider hook.
Fixes: 85164ad4ed99 ("pseries: Update SLOF firmware image")
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20210122170157.246374-1-groug@kaod.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 1f38f48900f6ebfa80f958bda8e2ec81ad4dabb9
https://github.com/qemu/qemu/commit/1f38f48900f6ebfa80f958bda8e2ec81ad4dabb9
Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
Date: 2021-02-10 (Wed, 10 Feb 2021)
Changed paths:
M target/ppc/cpu.h
Log Message:
-----------
target/ppc: Remove unused MMU definitions
Remove these confusing and unused definitions.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210127232401.3525126-1-f4bug@amsat.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 2cfc9f1a968f8f832c7bf23f2491b058bdde028b
https://github.com/qemu/qemu/commit/2cfc9f1a968f8f832c7bf23f2491b058bdde028b
Author: Cédric Le Goater <clg@kaod.org>
Date: 2021-02-10 (Wed, 10 Feb 2021)
Changed paths:
M hw/intc/pnv_xive.c
M hw/intc/trace-events
M hw/pci-host/pnv_phb4.c
M hw/pci-host/trace-events
Log Message:
-----------
ppc/pnv: Add trace events for PCI event notification
On POWER9 systems, PHB controllers signal the XIVE interrupt controller
of a source interrupt notification using a store on a MMIO region. Add
traces for such events.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20210126171059.307867-2-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: cb9428642e0526bb4a106934cd8209b2553a153a
https://github.com/qemu/qemu/commit/cb9428642e0526bb4a106934cd8209b2553a153a
Author: Cédric Le Goater <clg@kaod.org>
Date: 2021-02-10 (Wed, 10 Feb 2021)
Changed paths:
M hw/intc/xive.c
M include/hw/ppc/xive_regs.h
Log Message:
-----------
ppc/xive: Add firmware bit when dumping the ENDs
ENDs allocated by OPAL for the HW thread VPs are tagged as owned by FW.
Dump the state in 'info pic'.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20210126171059.307867-3-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 05ce9b73b877d4a91f722e4a359315d7c9e1adc9
https://github.com/qemu/qemu/commit/05ce9b73b877d4a91f722e4a359315d7c9e1adc9
Author: Cédric Le Goater <clg@kaod.org>
Date: 2021-02-10 (Wed, 10 Feb 2021)
Changed paths:
M hw/ppc/pnv.c
Log Message:
-----------
ppc/pnv: Use skiboot addresses to load kernel and ramfs
The current settings are useful to load large kernels (with debug) but
it moves the initrd image in a memory region not protected by
skiboot. If skiboot is compiled with DEBUG=1, memory poisoning will
corrupt the initrd.
Cc: Murilo Opsfelder Araujo <muriloo@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20210126171059.307867-4-clg@kaod.org>
Reviewed-by: Murilo Opsfelder Araujo <muriloo@linux.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 60ef80101e3764f40a6b96c67b407a44e0b9330d
https://github.com/qemu/qemu/commit/60ef80101e3764f40a6b96c67b407a44e0b9330d
Author: Cédric Le Goater <clg@kaod.org>
Date: 2021-02-10 (Wed, 10 Feb 2021)
Changed paths:
M hw/ppc/pnv_bmc.c
Log Message:
-----------
ppc/pnv: Simplify pnv_bmc_create()
and reuse pnv_bmc_set_pnor() to share the setting of the PNOR.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20210126171059.307867-5-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 50ae2452b5ae9659d8ec85c6d34a190474e429d1
https://github.com/qemu/qemu/commit/50ae2452b5ae9659d8ec85c6d34a190474e429d1
Author: Cédric Le Goater <clg@kaod.org>
Date: 2021-02-10 (Wed, 10 Feb 2021)
Changed paths:
M hw/ppc/pnv_bmc.c
Log Message:
-----------
ppc/pnv: Discard internal BMC initialization when BMC is external
The PowerNV machine can be run with an external IPMI BMC device
connected to a remote QEMU machine acting as BMC, using these options :
-chardev socket,id=ipmi0,host=localhost,port=9002,reconnect=10 \
-device ipmi-bmc-extern,id=bmc0,chardev=ipmi0 \
-device isa-ipmi-bt,bmc=bmc0,irq=10 \
-nodefaults
In that case, some aspects of the BMC initialization should be
skipped, since they rely on the simulator interface.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20210126171059.307867-6-clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 8304ab79054fd96ba0b8bd5ba14aa5100b01c212
https://github.com/qemu/qemu/commit/8304ab79054fd96ba0b8bd5ba14aa5100b01c212
Author: Cédric Le Goater <clg@kaod.org>
Date: 2021-02-10 (Wed, 10 Feb 2021)
Changed paths:
M hw/ppc/pnv_lpc.c
Log Message:
-----------
ppc/pnv: Remove default disablement of the PNOR contents
On PowerNV systems, the BMC is in charge of mapping the PNOR contents
on the LPC FW address space using the HIOMAP protocol. Under QEMU, we
emulate this behavior and we also add an extra control on the flash
accesses by letting the HIOMAP command handler decide whether the
memory region is accessible or not depending on the firmware requests.
However, this behavior is not compatible with hostboot like firmwares
which need this mapping to be always available. For this reason, the
PNOR memory region is initially disabled for skiboot mode only.
This is badly placed under the LPC model and requires the use of the
machine. Since it doesn't add much, simply remove the initial setting.
The extra control in the HIOMAP command handler will still be performed.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20210126171059.307867-7-clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 032c226bc6de2be0d5c88940ca7534a80cf0dd1a
https://github.com/qemu/qemu/commit/032c226bc6de2be0d5c88940ca7534a80cf0dd1a
Author: Cédric Le Goater <clg@kaod.org>
Date: 2021-02-10 (Wed, 10 Feb 2021)
Changed paths:
M hw/ppc/pnv.c
M hw/ppc/pnv_lpc.c
M include/hw/ppc/pnv.h
Log Message:
-----------
ppc/pnv: Introduce a LPC FW memory region attribute to map the PNOR
This to map the PNOR from the machine init handler directly and finish
the cleanup of the LPC model.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20210126171059.307867-8-clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 3b880445e61b6509a9a5b4236eaf07718ae4a51a
https://github.com/qemu/qemu/commit/3b880445e61b6509a9a5b4236eaf07718ae4a51a
Author: Daniel Henrique Barboza <danielhb413@gmail.com>
Date: 2021-02-10 (Wed, 10 Feb 2021)
Changed paths:
M hw/ppc/spapr.c
M hw/ppc/spapr_numa.c
M include/hw/ppc/spapr.h
Log Message:
-----------
spapr: move spapr_machine_using_legacy_numa() to spapr_numa.c
This function is used only in spapr_numa.c.
Tested-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Greg Kurz <groug@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20210128174213.1349181-2-danielhb413@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 6640706972c50aac4f620d7385d4e228a118e289
https://github.com/qemu/qemu/commit/6640706972c50aac4f620d7385d4e228a118e289
Author: Daniel Henrique Barboza <danielhb413@gmail.com>
Date: 2021-02-10 (Wed, 10 Feb 2021)
Changed paths:
M hw/ppc/spapr.c
M hw/ppc/spapr_numa.c
M include/hw/ppc/spapr_numa.h
Log Message:
-----------
spapr_numa.c: create spapr_numa_initial_nvgpu_numa_id() helper
We'll need to check the initial value given to spapr->gpu_numa_id when
building the rtas DT, so put it in a helper for easier access and to
avoid repetition.
Tested-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Greg Kurz <groug@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20210128174213.1349181-3-danielhb413@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: b01fec3659f7e595d5066fc052fb31a94a8a969b
https://github.com/qemu/qemu/commit/b01fec3659f7e595d5066fc052fb31a94a8a969b
Author: Daniel Henrique Barboza <danielhb413@gmail.com>
Date: 2021-02-10 (Wed, 10 Feb 2021)
Changed paths:
M hw/ppc/spapr_numa.c
Log Message:
-----------
spapr_numa.c: fix ibm,max-associativity-domains calculation
The current logic for calculating 'maxdomain' making it a sum of
numa_state->num_nodes with spapr->gpu_numa_id. spapr->gpu_numa_id is
used as a index to determine the next available NUMA id that a
given NVGPU can use.
The problem is that the initial value of gpu_numa_id, for any topology
that has more than one NUMA node, is equal to numa_state->num_nodes.
This means that our maxdomain will always be, at least, twice the
amount of existing NUMA nodes. This means that a guest with 4 NUMA
nodes will end up with the following max-associativity-domains:
rtas/ibm,max-associativity-domains
00000004 00000008 00000008 00000008 00000008
This overtuning of maxdomains doesn't go unnoticed in the guest, being
detected in SLUB during boot:
dmesg | grep SLUB
[ 0.000000] SLUB: HWalign=128, Order=0-3, MinObjects=0, CPUs=4, Nodes=8
SLUB is detecting 8 total nodes, with 4 nodes being online.
This patch fixes ibm,max-associativity-domains by considering the amount
of NVGPUs NUMA nodes presented in the guest, instead of just
spapr->gpu_numa_id.
Reported-by: Cédric Le Goater <clg@kaod.org>
Tested-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20210128174213.1349181-4-danielhb413@gmail.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: dd7ef911b398d96a7b9f2fb26f741045538d7d9b
https://github.com/qemu/qemu/commit/dd7ef911b398d96a7b9f2fb26f741045538d7d9b
Author: Cédric Le Goater <clg@kaod.org>
Date: 2021-02-10 (Wed, 10 Feb 2021)
Changed paths:
M hw/ppc/pnv.c
Log Message:
-----------
ppc/pnv: Set default RAM size to 1 GB
The memory layout of the PowerNV machine is defined as :
#define KERNEL_LOAD_BASE ((void *)0x20000000)
#define KERNEL_LOAD_SIZE 0x08000000
#define INITRAMFS_LOAD_BASE KERNEL_LOAD_BASE + KERNEL_LOAD_SIZE
#define INITRAMFS_LOAD_SIZE 0x08000000
#define SKIBOOT_BASE 0x30000000
#define SKIBOOT_SIZE 0x01c10000
#define CPU_STACKS_BASE (SKIBOOT_BASE + SKIBOOT_SIZE)
#define STACK_SHIFT 15
#define STACK_SIZE (1 << STACK_SHIFT)
The overall size of the CPU stacks is (max PIR + 1) * 32K and the
machine easily reaches 800MB of minimum required RAM.
Any value below will result in a skiboot crash :
[ 0.034949905,3] MEM: Partial overlap detected between regions:
[ 0.034959039,3] MEM: ibm,firmware-stacks [0x31c10000-0x3a450000] (new)
[ 0.034968576,3] MEM: ibm,firmware-allocs-memory@0
[0x31c10000-0x38400000]
[ 0.034980367,3] Out of memory adding skiboot reserved areas
[ 0.035074945,3] ***********************************************
[ 0.035093627,3] < assert failed at core/mem_region.c:1129 >
[ 0.035104247,3] .
[ 0.035108025,3] .
[ 0.035111651,3] .
[ 0.035115231,3] OO__)
[ 0.035119198,3] <"__/
[ 0.035122980,3] ^ ^
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20210129111719.790692-1-clg@kaod.org>
Reviewed-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 0c36ab7114056caa78471016b8990f983168ff47
https://github.com/qemu/qemu/commit/0c36ab7114056caa78471016b8990f983168ff47
Author: Bin Meng <bin.meng@windriver.com>
Date: 2021-02-10 (Wed, 10 Feb 2021)
Changed paths:
M hw/ppc/e500.c
Log Message:
-----------
hw/ppc: e500: Use a macro for the platform clock frequency
At present the platform clock frequency is using a magic number.
Convert it to a macro and use it everywhere.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <1612362288-22216-1-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 11dbcc70c6423162d8c6131db1e09944818b35b9
https://github.com/qemu/qemu/commit/11dbcc70c6423162d8c6131db1e09944818b35b9
Author: Bin Meng <bin.meng@windriver.com>
Date: 2021-02-10 (Wed, 10 Feb 2021)
Changed paths:
M hw/ppc/e500.c
Log Message:
-----------
hw/ppc: e500: Fill in correct <clock-frequency> for the serial nodes
At present the <clock-frequency> property of the serial node is
populated with value zero. U-Boot's ns16550 driver is not happy
about this, so let's fill in a meaningful value.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <1612362288-22216-2-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: ce8e43760e8e7e08c3ab11af874db404d9419a27
https://github.com/qemu/qemu/commit/ce8e43760e8e7e08c3ab11af874db404d9419a27
Author: Bin Meng <bin.meng@windriver.com>
Date: 2021-02-10 (Wed, 10 Feb 2021)
Changed paths:
M hw/net/fsl_etsec/rings.c
Log Message:
-----------
hw/net: fsl_etsec: Reverse the RCTRL.RSF logic
Per MPC8548ERM [1] chapter 14.5.3.4.1:
When RCTRL.RSF is 1, frames less than 64 bytes are accepted upon
a DA match. But currently QEMU does the opposite. This commit
reverses the RCTRL.RSF testing logic to match the manual.
Due to the reverse of the logic, certain guests may potentially
break if they don't program eTSEC to have RCTRL.RSF bit set.
When RCTRL.RSF is 0, short frames are silently dropped, however
as of today both slirp and tap networking do not pad short frames
(e.g.: an ARP packet) to the minimum frame size of 60 bytes. So
ARP requests will be dropped, preventing the guest from becoming
visible on the network.
The same issue was reported on e1000 and vmxenet3 before, see:
commit 78aeb23eded2 ("e1000: Pad short frames to minimum size (60 bytes)")
commit 40a87c6c9b11 ("vmxnet3: Pad short frames to minimum size (60 bytes)")
[1] https://www.nxp.com/docs/en/reference-manual/MPC8548ERM.pdf
Fixes: eb1e7c3e5146 ("Add Enhanced Three-Speed Ethernet Controller (eTSEC)")
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Message-Id: <1612923021-19746-1-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 298091f831db1a8f360686369f9760849e90dd03
https://github.com/qemu/qemu/commit/298091f831db1a8f360686369f9760849e90dd03
Author: Bin Meng <bin.meng@windriver.com>
Date: 2021-02-10 (Wed, 10 Feb 2021)
Changed paths:
M target/ppc/cpu.h
M target/ppc/translate_init.c.inc
Log Message:
-----------
target/ppc: Add E500 L2CSR0 write helper
Per EREF 2.0 [1] chapter 3.11.2:
The following bits in L2CSR0 (exists in the e500mc/e5500/e6500 core):
- L2FI (L2 cache flash invalidate)
- L2FL (L2 cache flush)
- L2LFC (L2 cache lock flash clear)
when set, a cache operation is initiated by hardware, and these bits
will be cleared when the operation is complete.
Since we don't model cache in QEMU, let's add a write helper to emulate
the cache operations completing instantly.
[1] https://www.nxp.com/files-static/32bit/doc/ref_manual/EREFRM.pdf
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Message-Id: <1612925152-20913-1-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Commit: 7b2c4cdd794e499883281c18770b2d16adebfaac
https://github.com/qemu/qemu/commit/7b2c4cdd794e499883281c18770b2d16adebfaac
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-02-10 (Wed, 10 Feb 2021)
Changed paths:
M hw/intc/pnv_xive.c
M hw/intc/trace-events
M hw/intc/xive.c
M hw/net/fsl_etsec/rings.c
M hw/pci-host/pnv_phb4.c
M hw/pci-host/trace-events
M hw/ppc/e500.c
M hw/ppc/pnv.c
M hw/ppc/pnv_bmc.c
M hw/ppc/pnv_lpc.c
M hw/ppc/spapr.c
M hw/ppc/spapr_numa.c
M hw/ppc/spapr_pci.c
M include/hw/pci-host/spapr.h
M include/hw/ppc/pnv.h
M include/hw/ppc/spapr.h
M include/hw/ppc/spapr_numa.h
M include/hw/ppc/xive_regs.h
M target/ppc/cpu.h
M target/ppc/translate_init.c.inc
Log Message:
-----------
Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.0-20210210'
into staging
ppc patch queue for 20201-02-10
Here's the latest batch of patches for the ppc target and machine
types. Highlights are:
* Several fixes for E500 from Bin Meng
* Fixes and cleanups for PowerNV from Cédric Le Goater
* Assorted other fixes and cleanups
# gpg: Signature made Wed 10 Feb 2021 06:16:53 GMT
# gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full]
# gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full]
# gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
[full]
# gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>"
[unknown]
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392
* remotes/dg-gitlab/tags/ppc-for-6.0-20210210:
target/ppc: Add E500 L2CSR0 write helper
hw/net: fsl_etsec: Reverse the RCTRL.RSF logic
hw/ppc: e500: Fill in correct <clock-frequency> for the serial nodes
hw/ppc: e500: Use a macro for the platform clock frequency
ppc/pnv: Set default RAM size to 1 GB
spapr_numa.c: fix ibm,max-associativity-domains calculation
spapr_numa.c: create spapr_numa_initial_nvgpu_numa_id() helper
spapr: move spapr_machine_using_legacy_numa() to spapr_numa.c
ppc/pnv: Introduce a LPC FW memory region attribute to map the PNOR
ppc/pnv: Remove default disablement of the PNOR contents
ppc/pnv: Discard internal BMC initialization when BMC is external
ppc/pnv: Simplify pnv_bmc_create()
ppc/pnv: Use skiboot addresses to load kernel and ramfs
ppc/xive: Add firmware bit when dumping the ENDs
ppc/pnv: Add trace events for PCI event notification
target/ppc: Remove unused MMU definitions
spapr: Adjust firmware path of PCI devices
spapr.c: add 'name' property for hotplugged CPUs nodes
spapr.c: use g_auto* with 'nodename' in CPU DT functions
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Compare: https://github.com/qemu/qemu/compare/1214d55d1c41...7b2c4cdd794e
- [Qemu-commits] [qemu/qemu] 7265bc: spapr.c: use g_auto* with 'nodename' in CPU DT fun...,
Peter Maydell <=