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[Qemu-commits] [qemu/qemu] 281c5c: hw/sd: ssi-sd: Fix incorrect card res


From: Peter Maydell
Subject: [Qemu-commits] [qemu/qemu] 281c5c: hw/sd: ssi-sd: Fix incorrect card response sequence
Date: Mon, 25 Jan 2021 03:52:40 -0800

  Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: 281c5c95b259a0d9809977c9f407d4654c3a79aa
      
https://github.com/qemu/qemu/commit/281c5c95b259a0d9809977c9f407d4654c3a79aa
  Author: Bin Meng <bin.meng@windriver.com>
  Date:   2021-01-24 (Sun, 24 Jan 2021)

  Changed paths:
    M hw/sd/ssi-sd.c

  Log Message:
  -----------
  hw/sd: ssi-sd: Fix incorrect card response sequence

Per the "Physical Layer Specification Version 8.00" chapter 7.5.1,
"Command/Response", there is a minimum 8 clock cycles (Ncr) before
the card response shows up on the data out line. However current
implementation jumps directly to the sending response state after
all 6 bytes command is received, which is a spec violation.

Add a new state PREP_RESP in the ssi-sd state machine to handle it.

Fixes: 775616c3ae8c ("Partial SD card SPI mode support")
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210123104016.17485-4-bmeng.cn@gmail.com>
[PMD: Change VMState version id 2 -> 3]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: dec6d33849f3589426c5a14dce264d5c6f86e85b
      
https://github.com/qemu/qemu/commit/dec6d33849f3589426c5a14dce264d5c6f86e85b
  Author: Bin Meng <bin.meng@windriver.com>
  Date:   2021-01-24 (Sun, 24 Jan 2021)

  Changed paths:
    M hw/sd/sd.c

  Log Message:
  -----------
  hw/sd: sd: Support CMD59 for SPI mode

After the card is put into SPI mode, CRC check for all commands
including CMD0 will be done according to CMD59 setting. But this
command is currently unimplemented. Simply allow the decoding of
CMD59, but the CRC remains unchecked.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210123104016.17485-5-bmeng.cn@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: e9d28020d267fc76aa261537c0114d4402d678da
      
https://github.com/qemu/qemu/commit/e9d28020d267fc76aa261537c0114d4402d678da
  Author: Bin Meng <bin.meng@windriver.com>
  Date:   2021-01-24 (Sun, 24 Jan 2021)

  Changed paths:
    M hw/sd/sd.c

  Log Message:
  -----------
  hw/sd: sd: Drop sd_crc16()

commit f6fb1f9b319f ("sdcard: Correct CRC16 offset in sd_function_switch()")
changed the 16-bit CRC to be stored at offset 64. In fact, this CRC
calculation is completely wrong. From the original codes, it wants
to calculate the CRC16 of the first 64 bytes of sd->data[], however
passing 64 as the `width` to sd_crc16() actually counts 256 bytes
starting from the `message` for the CRC16 calculation, which is not
what we want.

Besides that, it seems existing sd_crc16() algorithm does not match
the SD spec, which says CRC16 is the CCITT one but the calculation
does not produce expected result. It turns out the CRC16 was never
transferred outside the sd core, as in sd_read_byte() we see:

    if (sd->data_offset >= 64)
        sd->state = sd_transfer_state;

Given above reasons, let's drop it.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210123104016.17485-6-bmeng.cn@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 0b73ce30604c4fc9a004338cac6a28bc3f3e2fab
      
https://github.com/qemu/qemu/commit/0b73ce30604c4fc9a004338cac6a28bc3f3e2fab
  Author: Bin Meng <bin.meng@windriver.com>
  Date:   2021-01-24 (Sun, 24 Jan 2021)

  Changed paths:
    A include/qemu/crc-ccitt.h
    A util/crc-ccitt.c
    M util/meson.build

  Log Message:
  -----------
  util: Add CRC16 (CCITT) calculation routines

Import CRC16 calculation routines from Linux kernel v5.10:

  include/linux/crc-ccitt.h
  lib/crc-ccitt.c

to QEMU:

  include/qemu/crc-ccitt.h
  util/crc-ccitt.c

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20210123104016.17485-7-bmeng.cn@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
[PMD: Restrict compilation to system emulation]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 2d174cc38bf1e86ff0cf534510c0d097e3b23680
      
https://github.com/qemu/qemu/commit/2d174cc38bf1e86ff0cf534510c0d097e3b23680
  Author: Bin Meng <bin.meng@windriver.com>
  Date:   2021-01-24 (Sun, 24 Jan 2021)

  Changed paths:
    M hw/sd/ssi-sd.c

  Log Message:
  -----------
  hw/sd: ssi-sd: Suffix a data block with CRC16

Per the SD spec, a valid data block is suffixed with a 16-bit CRC
generated by the standard CCITT polynomial x16+x12+x5+1. This part
is currently missing in the ssi-sd state machine. Without it, all
data block transfer fails in guest software because the expected
CRC16 is missing on the data out line.

Fixes: 775616c3ae8c ("Partial SD card SPI mode support")
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210123104016.17485-8-bmeng.cn@gmail.com>
[PMD: Change VMState version id 3 -> 4,
      check s->mode validity in post_load()]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 3a67cbe619179c390908bf415159290acbe96ccd
      
https://github.com/qemu/qemu/commit/3a67cbe619179c390908bf415159290acbe96ccd
  Author: Bin Meng <bin.meng@windriver.com>
  Date:   2021-01-24 (Sun, 24 Jan 2021)

  Changed paths:
    M hw/sd/ssi-sd.c

  Log Message:
  -----------
  hw/sd: ssi-sd: Add a state representing Nac

Per the "Physical Layer Specification Version 8.00" chapter 7.5.2,
"Data Read", there is a minimum 8 clock cycles (Nac) after the card
response and before data block shows up on the data out line. This
applies to both single and multiple block read operations.

Current implementation of single block read already satisfies the
timing requirement as in the RESPONSE state after all responses are
transferred the state remains unchanged. In the next 8 clock cycles
it jumps to DATA_START state if data is ready.

However we need an explicit state when expanding our support to
multiple block read in the future. Let's add a new state PREP_DATA
explicitly in the ssi-sd state machine to represent Nac.

Note we don't change the single block read state machine to let it
jump from RESPONSE state to DATA_START state as that effectively
generates a 16 clock cycles Nac, which might not be safe. As the
spec says the maximum Nac shall be calculated from several fields
encoded in the CSD register, we don't want to bother updating CSD
to ensure our Nac is within range to complicate things.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210123104016.17485-9-bmeng.cn@gmail.com>
[PMD: Change VMState version id 4 -> 5]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 1fb85c42ca47e48dd0cfe153db85bdfc1213aedb
      
https://github.com/qemu/qemu/commit/1fb85c42ca47e48dd0cfe153db85bdfc1213aedb
  Author: Bin Meng <bin.meng@windriver.com>
  Date:   2021-01-24 (Sun, 24 Jan 2021)

  Changed paths:
    M hw/sd/ssi-sd.c

  Log Message:
  -----------
  hw/sd: ssi-sd: Fix the wrong command index for STOP_TRANSMISSION

This fixes the wrong command index for STOP_TRANSMISSION, the
required command to interrupt the multiple block read command,
in the old codes. It should be CMD12 (0x4c), not CMD13 (0x4d).

Fixes: 775616c3ae8c ("Partial SD card SPI mode support")
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210123104016.17485-10-bmeng.cn@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: bc1edaf2041f28d99c8ab102e14b948613080e17
      
https://github.com/qemu/qemu/commit/bc1edaf2041f28d99c8ab102e14b948613080e17
  Author: Bin Meng <bin.meng@windriver.com>
  Date:   2021-01-24 (Sun, 24 Jan 2021)

  Changed paths:
    M hw/sd/ssi-sd.c

  Log Message:
  -----------
  hw/sd: ssi-sd: Use macros for the dummy value and tokens in the transfer

At present the codes use hardcoded numbers (0xff/0xfe) for the dummy
value and block start token. Replace them with macros.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210123104016.17485-12-bmeng.cn@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 3f20ccd359913013723f64e2443dd513786039f6
      
https://github.com/qemu/qemu/commit/3f20ccd359913013723f64e2443dd513786039f6
  Author: Bin Meng <bin.meng@windriver.com>
  Date:   2021-01-24 (Sun, 24 Jan 2021)

  Changed paths:
    M include/hw/sd/sd.h

  Log Message:
  -----------
  hw/sd: sd.h: Cosmetic change of using spaces

QEMU coding convention prefers spaces over tabs.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210123104016.17485-15-bmeng.cn@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 55d98950a642d3526a0b2e1e106744b007c8adf6
      
https://github.com/qemu/qemu/commit/55d98950a642d3526a0b2e1e106744b007c8adf6
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-01-25 (Mon, 25 Jan 2021)

  Changed paths:
    M hw/sd/sd.c
    M hw/sd/ssi-sd.c
    M include/hw/sd/sd.h
    A include/qemu/crc-ccitt.h
    A util/crc-ccitt.c
    M util/meson.build

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/philmd-gitlab/tags/sdmmc-20210124' into 
staging

SD/MMC patches

- Various improvements for SD cards in SPI mode (Bin Meng)

# gpg: Signature made Sun 24 Jan 2021 19:16:55 GMT
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" 
[full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* remotes/philmd-gitlab/tags/sdmmc-20210124:
  hw/sd: sd.h: Cosmetic change of using spaces
  hw/sd: ssi-sd: Use macros for the dummy value and tokens in the transfer
  hw/sd: ssi-sd: Fix the wrong command index for STOP_TRANSMISSION
  hw/sd: ssi-sd: Add a state representing Nac
  hw/sd: ssi-sd: Suffix a data block with CRC16
  util: Add CRC16 (CCITT) calculation routines
  hw/sd: sd: Drop sd_crc16()
  hw/sd: sd: Support CMD59 for SPI mode
  hw/sd: ssi-sd: Fix incorrect card response sequence

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Compare: https://github.com/qemu/qemu/compare/e672f1d39755...55d98950a642



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