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[Qemu-commits] [qemu/qemu] 5d593b: pci/shpc: don't push attention button
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From: |
Peter Maydell |
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Subject: |
[Qemu-commits] [qemu/qemu] 5d593b: pci/shpc: don't push attention button when ejectin... |
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Date: |
Sun, 17 Jan 2021 09:33:56 -0800 |
Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: 5d593bdf10aace376c83161aa6d6c828cd6fd428
https://github.com/qemu/qemu/commit/5d593bdf10aace376c83161aa6d6c828cd6fd428
Author: Roman Kagan <rvkagan@yandex-team.ru>
Date: 2021-01-13 (Wed, 13 Jan 2021)
Changed paths:
M hw/pci/shpc.c
Log Message:
-----------
pci/shpc: don't push attention button when ejecting powered-off device
When the slot is in steady powered-off state and the device is being
removed, there's no need to press the attention button. Nor is it
mandated by the Standard Hot-Plug Controller Specification, Rev. 1.0.
Moreover it confuses the guest, Linux in particular, as it assumes that
the attention button pressed in this state indicates that the device has
been inserted and will need to be powered on. Therefore it transitions
the slot into BLINKING_ON state for 5 seconds, and discovers at the end
that no device is actually inserted:
... unplug request
[12685.451329] shpchp 0000:01:00.0: Button pressed on Slot(2)
[12685.455478] shpchp 0000:01:00.0: PCI slot #2 - powering off due to button
press
... in 5 seconds OS powers off the slot, QEMU ejects the device
[12690.632282] shpchp 0000:01:00.0: Latch open on Slot(2)
... excessive button press in steady powered-off state
[12690.634267] shpchp 0000:01:00.0: Button pressed on Slot(2)
[12690.636256] shpchp 0000:01:00.0: Card not present on Slot(2)
... the last button press spawns powering on the slot
[12690.638909] shpchp 0000:01:00.0: PCI slot #2 - powering on due to button
press
... in 5 more seconds attempt to power on discovers empty slot
[12695.735986] shpchp 0000:01:00.0: No adapter on slot(2)
Worse, if the real device insertion happens within 5 seconds from the
apparent completion of the previous device removal (signaled via
DEVICE_DELETED event), the new button press will be interpreted as the
cancellation of that misguided powering on:
[13448.965295] shpchp 0000:01:00.0: Button pressed on Slot(2)
[13448.969430] shpchp 0000:01:00.0: PCI slot #2 - powering off due to button
press
[13454.025107] shpchp 0000:01:00.0: Latch open on Slot(2)
[13454.027101] shpchp 0000:01:00.0: Button pressed on Slot(2)
[13454.029165] shpchp 0000:01:00.0: Card not present on Slot(2)
... the excessive button press spawns powering on the slot
... device has already been ejected by QEMU
[13454.031949] shpchp 0000:01:00.0: PCI slot #2 - powering on due to button
press
... new device is inserted in the slot
[13456.861545] shpchp 0000:01:00.0: Latch close on Slot(2)
... valid button press arrives before 5 s since the wrong one
[13456.864894] shpchp 0000:01:00.0: Button pressed on Slot(2)
[13456.869211] shpchp 0000:01:00.0: Card present on Slot(2)
... the valid button press is counted as cancellation of the wrong one
[13456.873173] shpchp 0000:01:00.0: Button cancel on Slot(2)
[13456.877101] shpchp 0000:01:00.0: PCI slot #2 - action canceled due to button
press
As a result, the newly inserted device isn't brought up by the guest.
Avoid this situation by not pushing the attention button when the device
in the slot is in powered-off state and is being ejected.
FWIW pcie implementation doesn't suffer from this problem.
Signed-off-by: Roman Kagan <rvkagan@yandex-team.ru>
Message-Id: <20201102053750.2281818-1-rvkagan@yandex-team.ru>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 6da32fe5efdd71c9d254a436ce972194ff631285
https://github.com/qemu/qemu/commit/6da32fe5efdd71c9d254a436ce972194ff631285
Author: Laszlo Ersek <lersek@redhat.com>
Date: 2021-01-13 (Wed, 13 Jan 2021)
Changed paths:
M hw/virtio/vhost-user-fs-pci.c
M hw/virtio/vhost-user-fs.c
M include/hw/virtio/vhost-user-fs.h
Log Message:
-----------
vhost-user-fs: add the "bootindex" property
virtio-fs qualifies as a bootable device minimally under OVMF, but
currently the necessary "bootindex" property is missing. Add the property.
Expose the property only in the PCI device, for now. There is no boot
support for virtiofs on s390x (ccw) for the time being [1] [2], so leave
the CCW device unchanged. Add the property to the base device still,
because adding the alias to the CCW device later will be easier this way
[3].
[1] https://lists.gnu.org/archive/html/qemu-devel/2021-01/msg01745.html
[2] https://lists.gnu.org/archive/html/qemu-devel/2021-01/msg01870.html
[3] https://lists.gnu.org/archive/html/qemu-devel/2021-01/msg01751.html
Example OpenFirmware device path for the "vhost-user-fs-pci" device in the
"bootorder" fw_cfg file:
/pci@i0cf8/pci-bridge@1,6/pci1af4,105a@0/filesystem@0
Cc: "Dr. David Alan Gilbert" <dgilbert@redhat.com>
Cc: "Michael S. Tsirkin" <mst@redhat.com>
Cc: Ján Tomko <jtomko@redhat.com>
Cc: Stefan Hajnoczi <stefanha@redhat.com>
Cc: virtio-fs@redhat.com
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Message-Id: <20210112131603.12686-1-lersek@redhat.com>
Acked-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 6f9ec653f328fe57ba490afaaa51b49d974b438f
https://github.com/qemu/qemu/commit/6f9ec653f328fe57ba490afaaa51b49d974b438f
Author: Jiahui Cen <cenjiahui@huawei.com>
Date: 2021-01-17 (Sun, 17 Jan 2021)
Changed paths:
M tests/qtest/bios-tables-test-allowed-diff.h
Log Message:
-----------
acpi: Allow DSDT acpi table changes
Acked-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Message-Id: <20210114100643.10617-2-cenjiahui@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 4c4465ff1cddc2543abf5ee4c2e4c283cace6da0
https://github.com/qemu/qemu/commit/4c4465ff1cddc2543abf5ee4c2e4c283cace6da0
Author: Jiahui Cen <cenjiahui@huawei.com>
Date: 2021-01-17 (Sun, 17 Jan 2021)
Changed paths:
M tests/data/acpi/virt/DSDT.pxb
Log Message:
-----------
acpi: Fix unmatched expected DSDT.pxb file
Commit fe1127da11 ("unit-test: Add the binary file and clear diff.h") does
not use the up-to-date expected file for pxb for ARM virt.
Fix the expected DSDT.pxb file.
Full diff of changed file disassembly:
@@ -5,13 +5,13 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT.pxb, Thu Jan 14 09:33:09 2021
+ * Disassembly of tests/data/acpi/virt/DSDT.pxb, Thu Jan 14 13:34:47 2021
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x00001E7A (7802)
+ * Length 0x00001DF9 (7673)
* Revision 0x02
- * Checksum 0x57
+ * Checksum 0x42
* OEM ID "BOCHS "
* OEM Table ID "BXPCDSDT"
* OEM Revision 0x00000001 (1)
@@ -45,32 +45,6 @@
})
}
- Device (FLS0)
- {
- Name (_HID, "LNRO0015") // _HID: Hardware ID
- Name (_UID, Zero) // _UID: Unique ID
- Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
- {
- Memory32Fixed (ReadWrite,
- 0x00000000, // Address Base
- 0x04000000, // Address Length
- )
- })
- }
-
- Device (FLS1)
- {
- Name (_HID, "LNRO0015") // _HID: Hardware ID
- Name (_UID, One) // _UID: Unique ID
- Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
- {
- Memory32Fixed (ReadWrite,
- 0x04000000, // Address Base
- 0x04000000, // Address Length
- )
- })
- }
-
Device (FWCF)
{
Name (_HID, "QEMU0002") // _HID: Hardware ID
@@ -665,9 +639,6 @@
{
Name (_HID, "PNP0A08" /* PCI Express Bus */) // _HID: Hardware ID
Name (_CID, "PNP0A03" /* PCI Bus */) // _CID: Compatible ID
- Name (_ADR, Zero) // _ADR: Address
- Name (_CCA, One) // _CCA: Cache Coherency Attribute
- Name (_SEG, Zero) // _SEG: PCI Segment
Name (_BBN, 0x80) // _BBN: BIOS Bus Number
Name (_UID, 0x80) // _UID: Unique ID
Name (_STR, Unicode ("pxb Device")) // _STR: Description String
@@ -1857,7 +1828,7 @@
Name (_CID, "PNP0A03" /* PCI Bus */) // _CID: Compatible ID
Name (_SEG, Zero) // _SEG: PCI Segment
Name (_BBN, Zero) // _BBN: BIOS Bus Number
- Name (_UID, "PCI0") // _UID: Unique ID
+ Name (_UID, Zero) // _UID: Unique ID
Name (_STR, Unicode ("PCIe 0 Device")) // _STR: Description String
Name (_CCA, One) // _CCA: Cache Coherency Attribute
Name (_PRT, Package (0x80) // _PRT: PCI Routing Table
@@ -2983,41 +2954,37 @@
Return (0x0000004010000000)
}
- Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
- Return (ResourceTemplate ()
- {
- WordBusNumber (ResourceProducer, MinFixed, MaxFixed,
PosDecode,
- 0x0000, // Granularity
- 0x0000, // Range Minimum
- 0x007F, // Range Maximum
- 0x0000, // Translation Offset
- 0x0080, // Length
- ,, )
- DWordMemory (ResourceProducer, PosDecode, MinFixed,
MaxFixed, NonCacheable, ReadWrite,
- 0x00000000, // Granularity
- 0x10000000, // Range Minimum
- 0x3EFEFFFF, // Range Maximum
- 0x00000000, // Translation Offset
- 0x2EFF0000, // Length
- ,, , AddressRangeMemory, TypeStatic)
- DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode,
EntireRange,
- 0x00000000, // Granularity
- 0x00000000, // Range Minimum
- 0x0000FFFF, // Range Maximum
- 0x3EFF0000, // Translation Offset
- 0x00010000, // Length
- ,, , TypeStatic, DenseTranslation)
- QWordMemory (ResourceProducer, PosDecode, MinFixed,
MaxFixed, NonCacheable, ReadWrite,
- 0x0000000000000000, // Granularity
- 0x0000008000000000, // Range Minimum
- 0x000000FFFFFFFFFF, // Range Maximum
- 0x0000000000000000, // Translation Offset
- 0x0000008000000000, // Length
- ,, , AddressRangeMemory, TypeStatic)
- })
- }
-
+ WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
+ 0x0000, // Granularity
+ 0x0000, // Range Minimum
+ 0x007F, // Range Maximum
+ 0x0000, // Translation Offset
+ 0x0080, // Length
+ ,, )
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
NonCacheable, ReadWrite,
+ 0x00000000, // Granularity
+ 0x10000000, // Range Minimum
+ 0x3EFEFFFF, // Range Maximum
+ 0x00000000, // Translation Offset
+ 0x2EFF0000, // Length
+ ,, , AddressRangeMemory, TypeStatic)
+ DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode,
EntireRange,
+ 0x00000000, // Granularity
+ 0x00000000, // Range Minimum
+ 0x0000FFFF, // Range Maximum
+ 0x3EFF0000, // Translation Offset
+ 0x00010000, // Length
+ ,, , TypeStatic, DenseTranslation)
+ QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
NonCacheable, ReadWrite,
+ 0x0000000000000000, // Granularity
+ 0x0000008000000000, // Range Minimum
+ 0x000000FFFFFFFFFF, // Range Maximum
+ 0x0000000000000000, // Translation Offset
+ 0x0000008000000000, // Length
+ ,, , AddressRangeMemory, TypeStatic)
+ })
Name (SUPP, Zero)
Name (CTRL, Zero)
Method (_OSC, 4, NotSerialized) // _OSC: Operating System
Capabilities
Fixes: fe1127da11 ("unit-test: Add the binary file and clear diff.h")
Acked-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Message-Id: <20210114100643.10617-3-cenjiahui@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: e41ee855283b79dfd0734e573e9b8d091070190b
https://github.com/qemu/qemu/commit/e41ee855283b79dfd0734e573e9b8d091070190b
Author: Jiahui Cen <cenjiahui@huawei.com>
Date: 2021-01-17 (Sun, 17 Jan 2021)
Changed paths:
M hw/acpi/aml-build.c
M hw/i386/acpi-build.c
M hw/pci-host/gpex-acpi.c
M include/hw/acpi/aml-build.h
Log Message:
-----------
acpi: Add addr offset in build_crs
AML needs Address Translation offset to describe how a bridge translates
addresses accross the bridge when using an address descriptor, and
especially on ARM, the translation offset of pio resource is usually
non zero.
Therefore, it's necessary to pass offset for pio, mmio32, mmio64 and bus
number into build_crs.
Acked-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Message-Id: <20210114100643.10617-4-cenjiahui@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 0cf8882fd06ba0aeb1e90fa6f23fce85504d7e14
https://github.com/qemu/qemu/commit/0cf8882fd06ba0aeb1e90fa6f23fce85504d7e14
Author: Jiahui Cen <cenjiahui@huawei.com>
Date: 2021-01-17 (Sun, 17 Jan 2021)
Changed paths:
M hw/pci-host/gpex-acpi.c
Log Message:
-----------
acpi/gpex: Inform os to keep firmware resource map
There may be some differences in pci resource assignment between guest os
and firmware.
Eg. A Bridge with Bus [d2]
-+-[0000:d2]---01.0-[d3]----01.0
where [d2:01.00] is a pcie-pci-bridge with BAR0 (mem, 64-bit, non-pref)
[size=256]
[d3:01.00] is a PCI Device with BAR0 (mem, 64-bit, pref) [size=128K]
BAR4 (mem, 64-bit, pref) [size=64M]
In EDK2, the Resource Map would be:
PciBus: Resource Map for Bridge [D2|01|00]
Type = PMem64; Base = 0x8004000000; Length = 0x4100000;
Alignment = 0x3FFFFFF
Base = 0x8004000000; Length = 0x4000000; Alignment = 0x3FFFFFF;
Owner = PCI [D3|01|00:20]
Base = 0x8008000000; Length = 0x20000; Alignment = 0x1FFFF;
Owner = PCI [D3|01|00:10]
Type = Mem64; Base = 0x8008100000; Length = 0x100; Alignment =
0xFFF
It would use 0x4100000 to calculate the root bus's PMem64 resource window.
While in Linux, kernel will use 0x1FFFFFF as the alignment to calculate
the PMem64 size, which would be 0x6000000. So kernel would try to
allocate 0x6000000 from the PMem64 resource window, but since the window
size is 0x4100000 as assigned by EDK2, the allocation would fail.
The diffences could result in resource assignment failure.
Using _DSM #5 method to inform guest os not to ignore the PCI configuration
that firmware has done at boot time could handle the differences.
Acked-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Message-Id: <20210114100643.10617-5-cenjiahui@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: aee519c210f2508b5070c4f85ed0e09892042e05
https://github.com/qemu/qemu/commit/aee519c210f2508b5070c4f85ed0e09892042e05
Author: Jiahui Cen <cenjiahui@huawei.com>
Date: 2021-01-17 (Sun, 17 Jan 2021)
Changed paths:
M hw/pci-host/gpex-acpi.c
Log Message:
-----------
acpi/gpex: Exclude pxb's resources from PCI0
Exclude the resources of extra root bridges from PCI0's _CRS. Otherwise,
the resource windows would overlap in guest, and the IO resource window
would fail to be registered.
Acked-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Message-Id: <20210114100643.10617-6-cenjiahui@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: cc9346e4a9794a8db79a90119f64cdc87cf3e4bc
https://github.com/qemu/qemu/commit/cc9346e4a9794a8db79a90119f64cdc87cf3e4bc
Author: Jiahui Cen <cenjiahui@huawei.com>
Date: 2021-01-17 (Sun, 17 Jan 2021)
Changed paths:
M hw/pci-bridge/Kconfig
Log Message:
-----------
Kconfig: Compile PXB for ARM_VIRT
PXB is now supported on ARM, so let's compile for arm_virt machine.
Acked-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Message-Id: <20210114100643.10617-7-cenjiahui@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: f698a88a7723e6ebae736a7f458b4cd1e9582d83
https://github.com/qemu/qemu/commit/f698a88a7723e6ebae736a7f458b4cd1e9582d83
Author: Jiahui Cen <cenjiahui@huawei.com>
Date: 2021-01-17 (Sun, 17 Jan 2021)
Changed paths:
M tests/qtest/bios-tables-test.c
Log Message:
-----------
acpi: Enable pxb unit-test for ARM virt machine
No matter whether the pxb is enabled or not, the CONFIG_PXB macro in test
would keep undefined. And since pxb is now enabled for ARM Virt machine
by default, let's enable pxb unit-test by removing the CONFIG_PXB.
Acked-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Message-Id: <20210114100643.10617-8-cenjiahui@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: ccee1a8140211c569156ae649474cc520eb2a36b
https://github.com/qemu/qemu/commit/ccee1a8140211c569156ae649474cc520eb2a36b
Author: Jiahui Cen <cenjiahui@huawei.com>
Date: 2021-01-17 (Sun, 17 Jan 2021)
Changed paths:
M tests/data/acpi/microvm/DSDT.pcie
M tests/data/acpi/virt/DSDT
M tests/data/acpi/virt/DSDT.memhp
M tests/data/acpi/virt/DSDT.numamem
M tests/data/acpi/virt/DSDT.pxb
M tests/qtest/bios-tables-test-allowed-diff.h
Log Message:
-----------
acpi: Update _DSM method in expected files
A new _DSM #5 method is added.
Update expected DSDT files accordingly, and re-enable their testing.
Full diff of changed files disassembly:
tests/data/acpi/microvm/DSDT.pcie.dsl:
@@ -5,13 +5,13 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/microvm/DSDT.pcie, Thu Jan 14 13:39:35 2021
+ * Disassembly of tests/data/acpi/microvm/DSDT.pcie, Thu Jan 14 13:51:13 2021
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x00000BCF (3023)
+ * Length 0x00000BD7 (3031)
* Revision 0x02
- * Checksum 0x29
+ * Checksum 0x99
* OEM ID "BOCHS "
* OEM Table ID "BXPCDSDT"
* OEM Revision 0x00000001 (1)
@@ -1302,9 +1302,14 @@
{
Return (Buffer (One)
{
- 0x01
// .
+ 0x21
// !
})
}
+
+ If ((Arg2 == 0x05))
+ {
+ Return (Zero)
+ }
}
Return (Buffer (One)
tests/data/acpi/virt/DSDT.dsl:
@@ -5,13 +5,13 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT, Thu Jan 14 13:39:35 2021
+ * Disassembly of tests/data/acpi/virt/DSDT, Thu Jan 14 13:51:13 2021
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x0000144C (5196)
+ * Length 0x00001454 (5204)
* Revision 0x02
- * Checksum 0xF0
+ * Checksum 0x60
* OEM ID "BOCHS "
* OEM Table ID "BXPCDSDT"
* OEM Revision 0x00000001 (1)
@@ -1838,9 +1838,14 @@
{
Return (Buffer (One)
{
- 0x01
// .
+ 0x21
// !
})
}
+
+ If ((Arg2 == 0x05))
+ {
+ Return (Zero)
+ }
}
Return (Buffer (One)
tests/data/acpi/virt/DSDT.memhp.dsl:
@@ -5,13 +5,13 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT.memhp, Thu Jan 14 13:39:35 2021
+ * Disassembly of tests/data/acpi/virt/DSDT.memhp, Thu Jan 14 13:51:13 2021
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x0000199D (6557)
+ * Length 0x000019A5 (6565)
* Revision 0x02
- * Checksum 0x11
+ * Checksum 0x90
* OEM ID "BOCHS "
* OEM Table ID "BXPCDSDT"
* OEM Revision 0x00000001 (1)
@@ -1840,9 +1840,14 @@
{
Return (Buffer (One)
{
- 0x01
// .
+ 0x21
// !
})
}
+
+ If ((Arg2 == 0x05))
+ {
+ Return (Zero)
+ }
}
Return (Buffer (One)
tests/data/acpi/virt/DSDT.numamem.dsl:
@@ -5,13 +5,13 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT.numamem, Thu Jan 14 13:39:35 2021
+ * Disassembly of tests/data/acpi/virt/DSDT.numamem, Thu Jan 14 13:51:13 2021
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x0000144C (5196)
+ * Length 0x00001454 (5204)
* Revision 0x02
- * Checksum 0xF0
+ * Checksum 0x60
* OEM ID "BOCHS "
* OEM Table ID "BXPCDSDT"
* OEM Revision 0x00000001 (1)
@@ -1838,9 +1838,14 @@
{
Return (Buffer (One)
{
- 0x01
// .
+ 0x21
// !
})
}
+
+ If ((Arg2 == 0x05))
+ {
+ Return (Zero)
+ }
}
Return (Buffer (One)
tests/data/acpi/virt/DSDT.pxb.dsl:
@@ -5,13 +5,13 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT.pxb, Thu Jan 14 13:39:35 2021
+ * Disassembly of tests/data/acpi/virt/DSDT.pxb, Thu Jan 14 13:51:13 2021
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x00001DF9 (7673)
+ * Length 0x00001E09 (7689)
* Revision 0x02
- * Checksum 0x42
+ * Checksum 0x30
* OEM ID "BOCHS "
* OEM Table ID "BXPCDSDT"
* OEM Revision 0x00000001 (1)
@@ -1810,9 +1810,14 @@
{
Return (Buffer (One)
{
- 0x01
// .
+ 0x21
// !
})
}
+
+ If ((Arg2 == 0x05))
+ {
+ Return (Zero)
+ }
}
Return (Buffer (One)
@@ -3025,9 +3030,14 @@
{
Return (Buffer (One)
{
- 0x01
// .
+ 0x21
// !
})
}
+
+ If ((Arg2 == 0x05))
+ {
+ Return (Zero)
+ }
}
Return (Buffer (One)
Acked-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Message-Id: <20210114100643.10617-9-cenjiahui@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: e0cbcf1eea16e81f116560130a1b36da711fb102
https://github.com/qemu/qemu/commit/e0cbcf1eea16e81f116560130a1b36da711fb102
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-01-17 (Sun, 17 Jan 2021)
Changed paths:
M hw/acpi/aml-build.c
M hw/i386/acpi-build.c
M hw/pci-bridge/Kconfig
M hw/pci-host/gpex-acpi.c
M hw/pci/shpc.c
M hw/virtio/vhost-user-fs-pci.c
M hw/virtio/vhost-user-fs.c
M include/hw/acpi/aml-build.h
M include/hw/virtio/vhost-user-fs.h
M tests/data/acpi/microvm/DSDT.pcie
M tests/data/acpi/virt/DSDT
M tests/data/acpi/virt/DSDT.memhp
M tests/data/acpi/virt/DSDT.numamem
M tests/data/acpi/virt/DSDT.pxb
M tests/qtest/bios-tables-test.c
Log Message:
-----------
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
pc,pci,virtio: fixes, features
Fixes all over the place.
PXB support for ARM.
boot index for vhost-user-fs.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
# gpg: Signature made Sun 17 Jan 2021 11:44:55 GMT
# gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469
# gpg: issuer "mst@redhat.com"
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full]
# gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full]
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67
# Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469
* remotes/mst/tags/for_upstream:
acpi: Update _DSM method in expected files
acpi: Enable pxb unit-test for ARM virt machine
Kconfig: Compile PXB for ARM_VIRT
acpi/gpex: Exclude pxb's resources from PCI0
acpi/gpex: Inform os to keep firmware resource map
acpi: Add addr offset in build_crs
acpi: Fix unmatched expected DSDT.pxb file
acpi: Allow DSDT acpi table changes
vhost-user-fs: add the "bootindex" property
pci/shpc: don't push attention button when ejecting powered-off device
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Compare: https://github.com/qemu/qemu/compare/825a215c003c...e0cbcf1eea16
- [Qemu-commits] [qemu/qemu] 5d593b: pci/shpc: don't push attention button when ejectin...,
Peter Maydell <=