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[Qemu-commits] [qemu/qemu] e4d51a: target/arm: Don't decode insns in the
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From: |
Peter Maydell |
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Subject: |
[Qemu-commits] [qemu/qemu] e4d51a: target/arm: Don't decode insns in the XScale/iWMMX... |
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Date: |
Tue, 12 Jan 2021 13:31:30 -0800 |
Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: e4d51ac6921dc861bfb3d20e4c7dcf345840a9da
https://github.com/qemu/qemu/commit/e4d51ac6921dc861bfb3d20e4c7dcf345840a9da
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-01-12 (Tue, 12 Jan 2021)
Changed paths:
M target/arm/translate.c
Log Message:
-----------
target/arm: Don't decode insns in the XScale/iWMMXt space as cp insns
In commit cd8be50e58f63413c0 we converted the A32 coprocessor
insns to decodetree. This accidentally broke XScale/iWMMXt insns,
because it moved the handling of "cp insns which are handled
by looking up the cp register in the hashtable" from after the
call to the legacy disas_xscale_insn() decode to before it,
with the result that all XScale/iWMMXt insns now UNDEF.
Update valid_cp() so that it knows that on XScale cp 0 and 1
are not standard coprocessor instructions; this will cause
the decodetree trans_ functions to ignore them, so that
execution will correctly get through to the legacy decode again.
Cc: qemu-stable@nongnu.org
Reported-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Message-id: 20210108195157.32067-1-peter.maydell@linaro.org
Commit: e7e29fdbbe07fb762d85af9c4d8eeff9b0f52a8e
https://github.com/qemu/qemu/commit/e7e29fdbbe07fb762d85af9c4d8eeff9b0f52a8e
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-01-12 (Tue, 12 Jan 2021)
Changed paths:
M hw/net/lan9118.c
Log Message:
-----------
hw/net/lan9118: Fix RX Status FIFO PEEK value
A copy-and-paste error meant that the return value for register offset 0x44
(the RX Status FIFO PEEK register) returned a byte from a bogus offset in
the rx status FIFO. Fix the typo.
Cc: qemu-stable@nongnu.org
Fixes: https://bugs.launchpad.net/qemu/+bug/1904954
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210108180401.2263-2-peter.maydell@linaro.org
Commit: 5cab6d5a5abb165296a2b6d7c06e15ec1c99e0a6
https://github.com/qemu/qemu/commit/5cab6d5a5abb165296a2b6d7c06e15ec1c99e0a6
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-01-12 (Tue, 12 Jan 2021)
Changed paths:
M hw/net/lan9118.c
Log Message:
-----------
hw/net/lan9118: Add symbolic constants for register offsets
The lan9118 code mostly uses symbolic constants for register offsets;
the exceptions are those which the datasheet doesn't give an official
symbolic name to.
Add some names for the registers which don't already have them, based
on the longer names they are given in the memory map.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210108180401.2263-3-peter.maydell@linaro.org
Commit: bcda710f6c44098fc828b61630449cabcce0ae55
https://github.com/qemu/qemu/commit/bcda710f6c44098fc828b61630449cabcce0ae55
Author: Hao Wu <wuhaotsh@google.com>
Date: 2021-01-12 (Tue, 12 Jan 2021)
Changed paths:
M hw/misc/npcm7xx_clk.c
M include/hw/misc/npcm7xx_clk.h
Log Message:
-----------
hw/misc: Add clock converter in NPCM7XX CLK module
This patch allows NPCM7XX CLK module to compute clocks that are used by
other NPCM7XX modules.
Add a new struct NPCM7xxClockConverterState which represents a
single converter. Each clock converter in CLK module represents one
converter in NPCM7XX CLK Module(PLL, SEL or Divider). Each converter
takes one or more input clocks and converts them into one output clock.
They form a clock hierarchy in the CLK module and are responsible for
outputing clocks for various other modules in an NPCM7XX SoC.
Each converter has a function pointer called "convert" which represents
the unique logic for that converter.
The clock contains two initialization information: ConverterInitInfo and
ConverterConnectionInfo. They represent the vertices and edges in the
clock diagram respectively.
Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com>
Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20210108190945.949196-2-wuhaotsh@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 0be12dc76aabda6399a28d9b5e450da2bb94cb22
https://github.com/qemu/qemu/commit/0be12dc76aabda6399a28d9b5e450da2bb94cb22
Author: Hao Wu <wuhaotsh@google.com>
Date: 2021-01-12 (Tue, 12 Jan 2021)
Changed paths:
M hw/arm/npcm7xx.c
M hw/timer/npcm7xx_timer.c
M include/hw/misc/npcm7xx_clk.h
M include/hw/timer/npcm7xx_timer.h
Log Message:
-----------
hw/timer: Refactor NPCM7XX Timer to use CLK clock
This patch makes NPCM7XX Timer to use a the timer clock generated by the
CLK module instead of the magic number TIMER_REF_HZ.
Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com>
Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Message-id: 20210108190945.949196-3-wuhaotsh@google.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 77c05b0b746119a78bffb595b0313d39ac6b20fc
https://github.com/qemu/qemu/commit/77c05b0b746119a78bffb595b0313d39ac6b20fc
Author: Hao Wu <wuhaotsh@google.com>
Date: 2021-01-12 (Tue, 12 Jan 2021)
Changed paths:
M docs/system/arm/nuvoton.rst
M hw/adc/meson.build
A hw/adc/npcm7xx_adc.c
A hw/adc/trace-events
A hw/adc/trace.h
M hw/arm/npcm7xx.c
A include/hw/adc/npcm7xx_adc.h
M include/hw/arm/npcm7xx.h
M meson.build
M tests/qtest/meson.build
A tests/qtest/npcm7xx_adc-test.c
Log Message:
-----------
hw/adc: Add an ADC module for NPCM7XX
The ADC is part of NPCM7XX Module. Its behavior is controled by the
ADC_CON register. It converts one of the eight analog inputs into a
digital input and stores it in the ADC_DATA register when enabled.
Users can alter input value by using qom-set QMP command.
Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com>
Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Message-id: 20210108190945.949196-4-wuhaotsh@google.com
[PMM: Added missing hw/adc/trace.h file]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 1e943c586a03f049be8f4080376884f1d4971592
https://github.com/qemu/qemu/commit/1e943c586a03f049be8f4080376884f1d4971592
Author: Hao Wu <wuhaotsh@google.com>
Date: 2021-01-12 (Tue, 12 Jan 2021)
Changed paths:
M docs/system/arm/nuvoton.rst
M hw/arm/npcm7xx.c
M hw/misc/meson.build
A hw/misc/npcm7xx_pwm.c
M hw/misc/trace-events
M include/hw/arm/npcm7xx.h
A include/hw/misc/npcm7xx_pwm.h
Log Message:
-----------
hw/misc: Add a PWM module for NPCM7XX
The PWM module is part of NPCM7XX module. Each NPCM7XX module has two
identical PWM modules. Each module contains 4 PWM entries. Each PWM has
two outputs: frequency and duty_cycle. Both are computed using inputs
from software side.
This module does not model detail pulse signals since it is expensive.
It also does not model interrupts and watchdogs that are dependant on
the detail models. The interfaces for these are left in the module so
that anyone in need for these functionalities can implement on their
own.
The user can read the duty cycle and frequency using qom-get command.
Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com>
Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Message-id: 20210108190945.949196-5-wuhaotsh@google.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 73314f1384588e9dfd98b50f7232a9d8b4a60e2a
https://github.com/qemu/qemu/commit/73314f1384588e9dfd98b50f7232a9d8b4a60e2a
Author: Hao Wu <wuhaotsh@google.com>
Date: 2021-01-12 (Tue, 12 Jan 2021)
Changed paths:
M tests/qtest/meson.build
A tests/qtest/npcm7xx_pwm-test.c
Log Message:
-----------
hw/misc: Add QTest for NPCM7XX PWM Module
We add a qtest for the PWM in the previous patch. It proves it works as
expected.
Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com>
Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20210108190945.949196-6-wuhaotsh@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 828d651c585c1c2a2b8d4e67da36c9f91124855a
https://github.com/qemu/qemu/commit/828d651c585c1c2a2b8d4e67da36c9f91124855a
Author: Hao Wu <wuhaotsh@google.com>
Date: 2021-01-12 (Tue, 12 Jan 2021)
Changed paths:
M hw/arm/npcm7xx_boards.c
M hw/mem/npcm7xx_mc.c
M hw/misc/npcm7xx_clk.c
M hw/misc/npcm7xx_gcr.c
M hw/misc/npcm7xx_rng.c
M hw/nvram/npcm7xx_otp.c
M hw/ssi/npcm7xx_fiu.c
Log Message:
-----------
hw/*: Use type casting for SysBusDevice in NPCM7XX
A device shouldn't access its parent object which is QOM internal.
Instead it should use type cast for this purporse. This patch fixes this
issue for all NPCM7XX Devices.
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20210108190945.949196-7-wuhaotsh@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 1ff5a063d60c7737de11465516331b8ca8700865
https://github.com/qemu/qemu/commit/1ff5a063d60c7737de11465516331b8ca8700865
Author: Roman Bolshakov <r.bolshakov@yadro.com>
Date: 2021-01-12 (Tue, 12 Jan 2021)
Changed paths:
M ui/cocoa.m
Log Message:
-----------
ui/cocoa: Fix openFile: deprecation on Big Sur
ui/cocoa.m:1188:44: warning: 'openFile:' is deprecated: first deprecated in
macOS 11.0 - Use -[NSWorkspace openURL:] instead.
[-Wdeprecated-declarations]
if ([[NSWorkspace sharedWorkspace] openFile: full_file_path] == YES) {
^
/Library/Developer/CommandLineTools/SDKs/MacOSX.sdk/System/Library/Frameworks/AppKit.framework/Headers/NSWorkspace.h:350:1:
note:
'openFile:' has been explicitly marked deprecated here
- (BOOL)openFile:(NSString *)fullPath API_DEPRECATED("Use -[NSWorkspace
openURL:] instead.", macos(10.0, 11.0));
^
Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20210102150718.47618-1-r.bolshakov@yadro.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: f8e1d8852e393b3fd524fb005e38590063d99bc0
https://github.com/qemu/qemu/commit/f8e1d8852e393b3fd524fb005e38590063d99bc0
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-01-12 (Tue, 12 Jan 2021)
Changed paths:
M docs/meson.build
M docs/system/arm/nuvoton.rst
M hw/adc/meson.build
A hw/adc/npcm7xx_adc.c
A hw/adc/trace-events
A hw/adc/trace.h
M hw/arm/npcm7xx.c
M hw/arm/npcm7xx_boards.c
M hw/mem/npcm7xx_mc.c
M hw/misc/meson.build
M hw/misc/npcm7xx_clk.c
M hw/misc/npcm7xx_gcr.c
A hw/misc/npcm7xx_pwm.c
M hw/misc/npcm7xx_rng.c
M hw/misc/trace-events
M hw/net/lan9118.c
M hw/nvram/npcm7xx_otp.c
M hw/ssi/npcm7xx_fiu.c
M hw/timer/npcm7xx_timer.c
A include/hw/adc/npcm7xx_adc.h
M include/hw/arm/npcm7xx.h
M include/hw/misc/npcm7xx_clk.h
A include/hw/misc/npcm7xx_pwm.h
M include/hw/timer/npcm7xx_timer.h
M meson.build
M target/arm/cpu.h
M target/arm/cpu64.c
M target/arm/helper.c
M target/arm/translate.c
M tests/qtest/meson.build
A tests/qtest/npcm7xx_adc-test.c
A tests/qtest/npcm7xx_pwm-test.c
M ui/cocoa.m
Log Message:
-----------
Merge remote-tracking branch
'remotes/pmaydell/tags/pull-target-arm-20210112-1' into staging
target-arm queue:
* arm: Support emulation of ARMv8.4-TTST extension
* arm: Update cpu.h ID register field definitions
* arm: Fix breakage of XScale instruction emulation
* hw/net/lan9118: Fix RX Status FIFO PEEK value
* npcm7xx: Add ADC and PWM emulation
* ui/cocoa: Make "open docs" help menu entry work again when binary
is run from the build tree
* ui/cocoa: Fix openFile: deprecation on Big Sur
* docs: Add qemu-storage-daemon(1) manpage to meson.build
# gpg: Signature made Tue 12 Jan 2021 21:22:15 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
[ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20210112-1:
ui/cocoa: Fix openFile: deprecation on Big Sur
hw/*: Use type casting for SysBusDevice in NPCM7XX
hw/misc: Add QTest for NPCM7XX PWM Module
hw/misc: Add a PWM module for NPCM7XX
hw/adc: Add an ADC module for NPCM7XX
hw/timer: Refactor NPCM7XX Timer to use CLK clock
hw/misc: Add clock converter in NPCM7XX CLK module
hw/net/lan9118: Add symbolic constants for register offsets
hw/net/lan9118: Fix RX Status FIFO PEEK value
target/arm: Don't decode insns in the XScale/iWMMXt space as cp insns
docs: Add qemu-storage-daemon(1) manpage to meson.build
ui/cocoa: Update path to docs in build tree
target/arm: add aarch32 ID register fields to cpu.h
target/arm: add aarch64 ID register fields to cpu.h
target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h
target/arm: make ARMCPU.ctr 64-bit
target/arm: make ARMCPU.clidr 64-bit
target/arm: fix typo in cpu.h ID_AA64PFR1 field name
target/arm: enable Small Translation tables in max CPU
target/arm: ARMv8.4-TTST extension
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Compare: https://github.com/qemu/qemu/compare/7f96aee7ea19...f8e1d8852e39
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