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[Qemu-commits] [qemu/qemu] 4663b7: intc/arm_gic: Fix gic_irq_signaling_e
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From: |
Peter Maydell |
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Subject: |
[Qemu-commits] [qemu/qemu] 4663b7: intc/arm_gic: Fix gic_irq_signaling_enabled() for ... |
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Date: |
Fri, 08 Jan 2021 09:52:37 -0800 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 4663b72a48fd540cbe16053b01d6839a95656440
https://github.com/qemu/qemu/commit/4663b72a48fd540cbe16053b01d6839a95656440
Author: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Date: 2021-01-08 (Fri, 08 Jan 2021)
Changed paths:
M hw/intc/arm_gic.c
Log Message:
-----------
intc/arm_gic: Fix gic_irq_signaling_enabled() for vCPUs
Correct the indexing into s->cpu_ctlr for vCPUs.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Message-id: 20201214222154.3480243-2-edgar.iglesias@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 9cd07db94b41e849dab8a547fb778718a11f487d
https://github.com/qemu/qemu/commit/9cd07db94b41e849dab8a547fb778718a11f487d
Author: Andrew Jones <drjones@redhat.com>
Date: 2021-01-08 (Fri, 08 Jan 2021)
Changed paths:
M hw/arm/virt-acpi-build.c
M hw/arm/virt.c
M include/hw/arm/virt.h
Log Message:
-----------
hw/arm/virt: Remove virt machine state 'smp_cpus'
virt machine's 'smp_cpus' and machine->smp.cpus must always have the
same value. And, anywhere we have virt machine state we have machine
state. So let's remove the redundancy. Also, to make it easier to see
that machine->smp is the true source for "smp_cpus" and "max_cpus",
avoid passing them in function parameters, preferring instead to get
them from the state.
No functional change intended.
Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: David Edmondson <david.edmondson@oracle.com>
Reviewed-by: Ying Fang <fangying1@huawei.com>
Message-id: 20201215174815.51520-1-drjones@redhat.com
[PMM: minor formatting tweak to smp_cpus variable declaration]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: cc97b0019bb590b9b3c2a623e9ebee48831e0ce3
https://github.com/qemu/qemu/commit/cc97b0019bb590b9b3c2a623e9ebee48831e0ce3
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-08 (Fri, 08 Jan 2021)
Changed paths:
M target/arm/helper.c
Log Message:
-----------
target/arm: Fix MTE0_ACTIVE
In 50244cc76abc we updated mte_check_fail to match the ARM
pseudocode, using the correct EL to select the TCF field.
But we failed to update MTE0_ACTIVE the same way, which led
to g_assert_not_reached().
Cc: qemu-stable@nongnu.org
Buglink: https://bugs.launchpad.net/bugs/1907137
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201221204426.88514-1-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 5b7d63706ea460d3999ee9ff3e3e010419d906ca
https://github.com/qemu/qemu/commit/5b7d63706ea460d3999ee9ff3e3e010419d906ca
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-01-08 (Fri, 08 Jan 2021)
Changed paths:
M hw/intc/armv7m_nvic.c
Log Message:
-----------
hw/intc/armv7m_nvic: Correct handling of CCR.BFHFNMIGN
The CCR is a register most of whose bits are banked between security
states but where BFHFNMIGN is not, and we keep it in the non-secure
entry of the v7m.ccr[] array. The logic which tries to handle this
bit fails to implement the "RAZ/WI from Nonsecure if AIRCR.BFHFNMINS
is zero" requirement; correct the omission.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201210201433.26262-2-peter.maydell@linaro.org
Commit: 7fbf95a037d79c5e923ffb51ac902dbe9599c87f
https://github.com/qemu/qemu/commit/7fbf95a037d79c5e923ffb51ac902dbe9599c87f
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-01-08 (Fri, 08 Jan 2021)
Changed paths:
M target/arm/translate-vfp.c.inc
Log Message:
-----------
target/arm: Correct store of FPSCR value via FPCXT_S
In commit 64f863baeedc8659 we implemented the v8.1M FPCXT_S register,
but we got the write behaviour wrong. On read, this register reads
bits [27:0] of FPSCR plus the CONTROL.SFPA bit. On write, it doesn't
just write back those bits -- it writes a value to the whole FPSCR,
whose upper 4 bits are zeroes.
We also incorrectly implemented the write-to-FPSCR as a simple store
to vfp.xregs; this skips the "update the softfloat flags" part of
the vfp_set_fpscr helper so the value would read back correctly but
not actually take effect.
Fix both of these things by doing a complete write to the FPSCR
using the helper function.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201210201433.26262-3-peter.maydell@linaro.org
Commit: eb20dafdbff92063a88624176fdc396e01961bf3
https://github.com/qemu/qemu/commit/eb20dafdbff92063a88624176fdc396e01961bf3
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-01-08 (Fri, 08 Jan 2021)
Changed paths:
M target/arm/translate-vfp.c.inc
Log Message:
-----------
target/arm: Implement FPCXT_NS fp system register
Implement the v8.1M FPCXT_NS floating-point system register. This is
a little more complicated than FPCXT_S, because it has specific
handling for "current FP state is inactive", and it only wants to do
PreserveFPState(), not the full set of actions done by
ExecuteFPCheck() which vfp_access_check() implements.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201210201433.26262-4-peter.maydell@linaro.org
Commit: 590e05d6b48937f6d3c631354fd706f8e005b8f6
https://github.com/qemu/qemu/commit/590e05d6b48937f6d3c631354fd706f8e005b8f6
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-01-08 (Fri, 08 Jan 2021)
Changed paths:
M target/arm/cpu_tcg.c
Log Message:
-----------
target/arm: Implement Cortex-M55 model
Now that we have implemented all the features needed by the v8.1M
architecture, we can add the model of the Cortex-M55. This is the
configuration without MVE support; we'll add MVE later.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201210201433.26262-5-peter.maydell@linaro.org
Commit: 416dd95295b1c13fc9f1f2dbb2803ad581de415a
https://github.com/qemu/qemu/commit/416dd95295b1c13fc9f1f2dbb2803ad581de415a
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-01-08 (Fri, 08 Jan 2021)
Changed paths:
M hw/arm/highbank.c
Log Message:
-----------
hw/arm/highbank: Drop dead KVM support code
Support for running KVM on 32-bit Arm hosts was removed in commit
82bf7ae84ce739e. You can still run a 32-bit guest on a 64-bit Arm
host CPU, but because Arm KVM requires the host and guest CPU types
to match, it is not possible to run a guest that requires a Cortex-A9
or Cortex-A15 CPU there. That means that the code in the
highbank/midway board models to support KVM is no longer used, and we
can delete it.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20201215144215.28482-1-peter.maydell@linaro.org
Commit: 5f8e93c3e262ab518c9e8f9a5bb2b391b3d64be9
https://github.com/qemu/qemu/commit/5f8e93c3e262ab518c9e8f9a5bb2b391b3d64be9
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-01-08 (Fri, 08 Jan 2021)
Changed paths:
M include/qemu/timer.h
Log Message:
-----------
util/qemu-timer: Make timer_free() imply timer_del()
Currently timer_free() is a simple wrapper for g_free(). This means
that the timer being freed must not be currently active, as otherwise
QEMU might crash later when the active list is processed and still
has a pointer to freed memory on it. As a result almost all calls to
timer_free() are preceded by a timer_del() call, as can be seen in
the output of
git grep -B1 '\<timer_free\>'
This is unfortunate API design as it makes it easy to accidentally
misuse (by forgetting the timer_del()), and the correct use is
annoyingly verbose.
Make timer_free() imply a timer_del().
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201215154107.3255-2-peter.maydell@linaro.org
Commit: 01b3e68bb18d1a37f013ffac41423faa7c00958f
https://github.com/qemu/qemu/commit/01b3e68bb18d1a37f013ffac41423faa7c00958f
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-01-08 (Fri, 08 Jan 2021)
Changed paths:
A scripts/coccinelle/timer-del-timer-free.cocci
Log Message:
-----------
scripts/coccinelle: New script to remove unnecessary timer_del() calls
Now that timer_free() implicitly calls timer_del(), sequences
timer_del(mytimer);
timer_free(mytimer);
can be simplified to just
timer_free(mytimer);
Add a Coccinelle script to do this transformation.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201215154107.3255-3-peter.maydell@linaro.org
Commit: 729cc683735309bdcd55604be19292950877ecf5
https://github.com/qemu/qemu/commit/729cc683735309bdcd55604be19292950877ecf5
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-01-08 (Fri, 08 Jan 2021)
Changed paths:
M block/iscsi.c
M block/nbd.c
M block/qcow2.c
M hw/block/nvme.c
M hw/char/serial.c
M hw/char/virtio-serial-bus.c
M hw/ide/core.c
M hw/input/hid.c
M hw/intc/apic.c
M hw/intc/ioapic.c
M hw/ipmi/ipmi_bmc_extern.c
M hw/net/e1000.c
M hw/net/e1000e_core.c
M hw/net/pcnet-pci.c
M hw/net/rtl8139.c
M hw/net/spapr_llan.c
M hw/net/virtio-net.c
M hw/s390x/s390-pci-inst.c
M hw/sd/sd.c
M hw/sd/sdhci.c
M hw/usb/dev-hub.c
M hw/usb/hcd-ehci.c
M hw/usb/hcd-ohci-pci.c
M hw/usb/hcd-uhci.c
M hw/usb/hcd-xhci.c
M hw/usb/redirect.c
M hw/vfio/display.c
M hw/virtio/vhost-vsock-common.c
M hw/virtio/virtio-balloon.c
M hw/virtio/virtio-rng.c
M hw/watchdog/wdt_diag288.c
M hw/watchdog/wdt_i6300esb.c
M migration/colo.c
M monitor/hmp-cmds.c
M net/announce.c
M net/colo-compare.c
M net/slirp.c
M replay/replay-debugging.c
M target/s390x/cpu.c
M ui/console.c
M ui/spice-core.c
M util/throttle.c
Log Message:
-----------
Remove superfluous timer_del() calls
This commit is the result of running the timer-del-timer-free.cocci
script on the whole source tree.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Corey Minyard <cminyard@mvista.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201215154107.3255-4-peter.maydell@linaro.org
Commit: 2d3bf6532733a07671141019f784c945e997d285
https://github.com/qemu/qemu/commit/2d3bf6532733a07671141019f784c945e997d285
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-01-08 (Fri, 08 Jan 2021)
Changed paths:
M target/arm/cpu.c
Log Message:
-----------
target/arm: Remove timer_del()/timer_deinit() before timer_free()
The Arm CPU finalize function uses a sequence of timer_del(), timer_deinit(),
timer_free() to free the timer. The timer_deinit() step in this was always
unnecessary, and now the timer_del() is implied by timer_free(), so we can
collapse this down to simply calling timer_free().
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201215154107.3255-5-peter.maydell@linaro.org
Commit: ea492b124586d224ffb962f62c201adb862ca5c7
https://github.com/qemu/qemu/commit/ea492b124586d224ffb962f62c201adb862ca5c7
Author: Gan Qixin <ganqixin@huawei.com>
Date: 2021-01-08 (Fri, 08 Jan 2021)
Changed paths:
M hw/timer/digic-timer.c
Log Message:
-----------
digic-timer: Use ptimer_free() in the finalize function to avoid memleaks
When running device-introspect-test, a memory leak occurred in the
digic_timer_init function, so use ptimer_free() in the finalize function to
avoid it.
ASAN shows memory leak stack:
Indirect leak of 288 byte(s) in 3 object(s) allocated from:
#0 0xffffab97e1f0 in __interceptor_calloc (/lib64/libasan.so.5+0xee1f0)
#1 0xffffab256800 in g_malloc0 (/lib64/libglib-2.0.so.0+0x56800)
#2 0xaaabf555db78 in ptimer_init /qemu/hw/core/ptimer.c:432
#3 0xaaabf5b04084 in digic_timer_init /qemu/hw/timer/digic-timer.c:142
#4 0xaaabf6339f6c in object_initialize_with_type /qemu/qom/object.c:515
#5 0xaaabf633ca04 in object_initialize_child_with_propsv
/qemu/qom/object.c:564
#6 0xaaabf633cc08 in object_initialize_child_with_props
/qemu/qom/object.c:547
#7 0xaaabf5b40e84 in digic_init /qemu/hw/arm/digic.c:46
#8 0xaaabf6339f6c in object_initialize_with_type /qemu/qom/object.c:515
#9 0xaaabf633a1e0 in object_new_with_type /qemu/qom/object.c:729
#10 0xaaabf6375e40 in qmp_device_list_properties
/qemu/qom/qom-qmp-cmds.c:153
#11 0xaaabf653d8ec in qmp_marshal_device_list_properties
/qemu/qapi/qapi-commands-qdev.c:59
#12 0xaaabf6587d08 in do_qmp_dispatch_bh /qemu/qapi/qmp-dispatch.c:110
Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Gan Qixin <ganqixin@huawei.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: e1c5909b294f1059c46186dcc4aa7901ca19447e
https://github.com/qemu/qemu/commit/e1c5909b294f1059c46186dcc4aa7901ca19447e
Author: Gan Qixin <ganqixin@huawei.com>
Date: 2021-01-08 (Fri, 08 Jan 2021)
Changed paths:
M hw/timer/allwinner-a10-pit.c
Log Message:
-----------
allwinner-a10-pit: Use ptimer_free() in the finalize function to avoid
memleaks
When running device-introspect-test, a memory leak occurred in the a10_pit_init
function, so use ptimer_free() in the finalize function to avoid it.
ASAN shows memory leak stack:
Indirect leak of 288 byte(s) in 6 object(s) allocated from:
#0 0xffffab97e1f0 in __interceptor_calloc (/lib64/libasan.so.5+0xee1f0)
#1 0xffffab256800 in g_malloc0 (/lib64/libglib-2.0.so.0+0x56800)
#2 0xaaabf555db84 in timer_new_full /qemu/include/qemu/timer.h:523
#3 0xaaabf555db84 in timer_new /qemu/include/qemu/timer.h:544
#4 0xaaabf555db84 in timer_new_ns /qemu/include/qemu/timer.h:562
#5 0xaaabf555db84 in ptimer_init /qemu/hw/core/ptimer.c:433
#6 0xaaabf57415e8 in a10_pit_init /qemu/hw/timer/allwinner-a10-pit.c:278
#7 0xaaabf6339f6c in object_initialize_with_type /qemu/qom/object.c:515
#8 0xaaabf633ca04 in object_initialize_child_with_propsv
/qemu/qom/object.c:564
#9 0xaaabf633cc08 in object_initialize_child_with_props
/qemu/qom/object.c:547
#10 0xaaabf5b94680 in aw_a10_init /qemu/hw/arm/allwinner-a10.c:49
#11 0xaaabf6339f6c in object_initialize_with_type /qemu/qom/object.c:515
#12 0xaaabf633a1e0 in object_new_with_type /qemu/qom/object.c:729
Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Gan Qixin <ganqixin@huawei.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 3fabd51994566053a65df1c1e10cd96f96e0c30e
https://github.com/qemu/qemu/commit/3fabd51994566053a65df1c1e10cd96f96e0c30e
Author: Gan Qixin <ganqixin@huawei.com>
Date: 2021-01-08 (Fri, 08 Jan 2021)
Changed paths:
M hw/rtc/exynos4210_rtc.c
Log Message:
-----------
exynos4210_rtc: Use ptimer_free() in the finalize function to avoid memleaks
When running device-introspect-test, a memory leak occurred in the
exynos4210_rtc_init function, so use ptimer_free() in the finalize function to
avoid it.
ASAN shows memory leak stack:
Indirect leak of 96 byte(s) in 1 object(s) allocated from:
#0 0xffffab97e1f0 in __interceptor_calloc (/lib64/libasan.so.5+0xee1f0)
#1 0xffffab256800 in g_malloc0 (/lib64/libglib-2.0.so.0+0x56800)
#2 0xaaabf555db78 in ptimer_init /qemu/hw/core/ptimer.c:432
#3 0xaaabf57b3934 in exynos4210_rtc_init /qemu/hw/rtc/exynos4210_rtc.c:567
#4 0xaaabf6339f6c in object_initialize_with_type /qemu/qom/object.c:515
#5 0xaaabf633a1e0 in object_new_with_type /qemu/qom/object.c:729
#6 0xaaabf6375e40 in qmp_device_list_properties /qemu/qom/qom-qmp-cmds.c:153
#7 0xaaabf653d8ec in qmp_marshal_device_list_properties
/qemu/qapi/qapi-commands-qdev.c:59
#8 0xaaabf6587d08 in do_qmp_dispatch_bh /qemu/qapi/qmp-dispatch.c:110
#9 0xaaabf6552708 in aio_bh_call /qemu/util/async.c:136
#10 0xaaabf6552708 in aio_bh_poll /qemu/util/async.c:164
#11 0xaaabf655f19c in aio_dispatch /qemu/util/aio-posix.c:381
#12 0xaaabf65523f4 in aio_ctx_dispatch /qemu/util/async.c:306
Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Gan Qixin <ganqixin@huawei.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: c9342c09f85a5f2f442fabcac58517bbba74b19f
https://github.com/qemu/qemu/commit/c9342c09f85a5f2f442fabcac58517bbba74b19f
Author: Gan Qixin <ganqixin@huawei.com>
Date: 2021-01-08 (Fri, 08 Jan 2021)
Changed paths:
M hw/timer/exynos4210_pwm.c
Log Message:
-----------
exynos4210_pwm: Use ptimer_free() in the finalize function to avoid memleaks
When running device-introspect-test, a memory leak occurred in the
exynos4210_pwm_init function, so use ptimer_free() in the finalize function to
avoid it.
ASAN shows memory leak stack:
Indirect leak of 240 byte(s) in 5 object(s) allocated from:
#0 0xffffab97e1f0 in __interceptor_calloc (/lib64/libasan.so.5+0xee1f0)
#1 0xffffab256800 in g_malloc0 (/lib64/libglib-2.0.so.0+0x56800)
#2 0xaaabf555db84 in timer_new_full /qemu/include/qemu/timer.h:523
#3 0xaaabf555db84 in timer_new /qemu/include/qemu/timer.h:544
#4 0xaaabf555db84 in timer_new_ns /qemu/include/qemu/timer.h:562
#5 0xaaabf555db84 in ptimer_init /qemu/hw/core/ptimer.c:433
#6 0xaaabf56a36cc in exynos4210_pwm_init /qemu/hw/timer/exynos4210_pwm.c:401
#7 0xaaabf6339f6c in object_initialize_with_type /qemu/qom/object.c:515
#8 0xaaabf633a1e0 in object_new_with_type /qemu/qom/object.c:729
#9 0xaaabf6375e40 in qmp_device_list_properties /qemu/qom/qom-qmp-cmds.c:153
#10 0xaaabf653d8ec in qmp_marshal_device_list_properties
/qemu/qapi/qapi-commands-qdev.c:59
#11 0xaaabf6587d08 in do_qmp_dispatch_bh /qemu/qapi/qmp-dispatch.c:110
#12 0xaaabf6552708 in aio_bh_call /qemu/util/async.c:136
Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Gan Qixin <ganqixin@huawei.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: e4940041f68213437e81792fbd3f06c3609e94f3
https://github.com/qemu/qemu/commit/e4940041f68213437e81792fbd3f06c3609e94f3
Author: Gan Qixin <ganqixin@huawei.com>
Date: 2021-01-08 (Fri, 08 Jan 2021)
Changed paths:
M hw/timer/mss-timer.c
Log Message:
-----------
mss-timer: Use ptimer_free() in the finalize function to avoid memleaks
When running device-introspect-test, a memory leak occurred in the
mss_timer_init function, so use ptimer_free() in the finalize function to avoid
it.
ASAN shows memory leak stack:
Indirect leak of 192 byte(s) in 2 object(s) allocated from:
#0 0xffffab97e1f0 in __interceptor_calloc (/lib64/libasan.so.5+0xee1f0)
#1 0xffffab256800 in g_malloc0 (/lib64/libglib-2.0.so.0+0x56800)
#2 0xaaabf555db78 in ptimer_init /qemu/hw/core/ptimer.c:432
#3 0xaaabf58a0010 in mss_timer_init /qemu/hw/timer/mss-timer.c:235
#4 0xaaabf6339f6c in object_initialize_with_type /qemu/qom/object.c:515
#5 0xaaabf633ca04 in object_initialize_child_with_propsv
/qemu/qom/object.c:564
#6 0xaaabf633cc08 in object_initialize_child_with_props
/qemu/qom/object.c:547
#7 0xaaabf5b8316c in m2sxxx_soc_initfn /qemu/hw/arm/msf2-soc.c:70
#8 0xaaabf6339f6c in object_initialize_with_type /qemu/qom/object.c:515
#9 0xaaabf633a1e0 in object_new_with_type /qemu/qom/object.c:729
#10 0xaaabf6375e40 in qmp_device_list_properties
/qemu/qom/qom-qmp-cmds.c:153
#11 0xaaabf653d8ec in qmp_marshal_device_list_properties
/qemu/qapi/qapi-commands-qdev.c:59
#12 0xaaabf6587d08 in do_qmp_dispatch_bh /qemu/qapi/qmp-dispatch.c:110
Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Gan Qixin <ganqixin@huawei.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: a4bc0334bc51fcb975d796f3057c3561e186cde3
https://github.com/qemu/qemu/commit/a4bc0334bc51fcb975d796f3057c3561e186cde3
Author: Gan Qixin <ganqixin@huawei.com>
Date: 2021-01-08 (Fri, 08 Jan 2021)
Changed paths:
M hw/arm/musicpal.c
Log Message:
-----------
musicpal: Use ptimer_free() in the finalize function to avoid memleaks
When running device-introspect-test, a memory leak occurred in the
mv88w8618_pit_init function, so use ptimer_free() in the finalize function to
avoid it.
ASAN shows memory leak stack:
Indirect leak of 192 byte(s) in 4 object(s) allocated from:
#0 0xffffab97e1f0 in __interceptor_calloc (/lib64/libasan.so.5+0xee1f0)
#1 0xffffab256800 in g_malloc0 (/lib64/libglib-2.0.so.0+0x56800)
#2 0xaaabf555db84 in timer_new_full /qemu/include/qemu/timer.h:523
#3 0xaaabf555db84 in timer_new /qemu/include/qemu/timer.h:544
#4 0xaaabf555db84 in timer_new_ns /qemu/include/qemu/timer.h:562
#5 0xaaabf555db84 in ptimer_init /qemu/hw/core/ptimer.c:433
#6 0xaaabf5bb2290 in mv88w8618_timer_init /qemu/hw/arm/musicpal.c:862
#7 0xaaabf5bb2290 in mv88w8618_pit_init /qemu/hw/arm/musicpal.c:954
#8 0xaaabf6339f6c in object_initialize_with_type /qemu/qom/object.c:515
#9 0xaaabf633a1e0 in object_new_with_type /qemu/qom/object.c:729
#10 0xaaabf6375e40 in qmp_device_list_properties
/qemu/qom/qom-qmp-cmds.c:153
#11 0xaaabf5a95540 in qdev_device_help /qemu/softmmu/qdev-monitor.c:283
#12 0xaaabf5a96940 in qmp_device_add /qemu/softmmu/qdev-monitor.c:801
Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Gan Qixin <ganqixin@huawei.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: d97d9152c7baa9f3743aea7ffe124c7977a9b0fa
https://github.com/qemu/qemu/commit/d97d9152c7baa9f3743aea7ffe124c7977a9b0fa
Author: Gan Qixin <ganqixin@huawei.com>
Date: 2021-01-08 (Fri, 08 Jan 2021)
Changed paths:
M hw/timer/exynos4210_mct.c
Log Message:
-----------
exynos4210_mct: Use ptimer_free() in the finalize function to avoid memleaks
When running device-introspect-test, a memory leak occurred in the
exynos4210_mct_init function, so use ptimer_free() in the finalize function to
avoid it.
ASAN shows memory leak stack:
Indirect leak of 96 byte(s) in 1 object(s) allocated from:
#0 0xffffab97e1f0 in __interceptor_calloc (/lib64/libasan.so.5+0xee1f0)
#1 0xffffab256800 in g_malloc0 (/lib64/libglib-2.0.so.0+0x56800)
#2 0xaaabf555db78 in ptimer_init /qemu/hw/core/ptimer.c:432
#3 0xaaabf56b01a0 in exynos4210_mct_init
/qemu/hw/timer/exynos4210_mct.c:1505
#4 0xaaabf6339f6c in object_initialize_with_type /qemu/qom/object.c:515
#5 0xaaabf633a1e0 in object_new_with_type /qemu/qom/object.c:729
#6 0xaaabf6375e40 in qmp_device_list_properties /qemu/qom/qom-qmp-cmds.c:153
#7 0xaaabf653d8ec in qmp_marshal_device_list_properties
/qemu/qapi/qapi-commands-qdev.c:59
#8 0xaaabf6587d08 in do_qmp_dispatch_bh /qemu/qapi/qmp-dispatch.c:110
#9 0xaaabf6552708 in aio_bh_call /qemu/util/async.c:136
#10 0xaaabf6552708 in aio_bh_poll /qemu/util/async.c:164
#11 0xaaabf655f19c in aio_dispatch /qemu/util/aio-posix.c:381
#12 0xaaabf65523f4 in aio_ctx_dispatch /qemu/util/async.c:306
Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Gan Qixin <ganqixin@huawei.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 56a11a9b7580b576a9db930667be07f1dd1564d5
https://github.com/qemu/qemu/commit/56a11a9b7580b576a9db930667be07f1dd1564d5
Author: Bin Meng <bin.meng@windriver.com>
Date: 2021-01-08 (Fri, 08 Jan 2021)
Changed paths:
M hw/misc/imx6_ccm.c
Log Message:
-----------
hw/misc: imx6_ccm: Update PMU_MISC0 reset value
U-Boot expects PMU_MISC0 register bit 7 is set (see init_bandgap()
in arch/arm/mach-imx/mx6/soc.c) during boot. This bit indicates the
bandgap has stabilized.
With this change, the latest upstream U-Boot (v2021.01-rc3) for imx6
sabrelite board (mx6qsabrelite_defconfig), with a slight change made
by switching CONFIG_OF_SEPARATE to CONFIG_OF_EMBED, boots to U-Boot
shell on QEMU with the following command:
$ qemu-system-arm -M sabrelite -smp 4 -m 1G -kernel u-boot \
-display none -serial null -serial stdio
Boot log below:
U-Boot 2021.01-rc3 (Dec 12 2020 - 17:40:02 +0800)
CPU: Freescale i.MX?? rev1.0 at 792 MHz
Reset cause: POR
Model: Freescale i.MX6 Quad SABRE Lite Board
Board: SABRE Lite
I2C: ready
DRAM: 1 GiB
force_idle_bus: sda=0 scl=0 sda.gp=0x5c scl.gp=0x55
force_idle_bus: failed to clear bus, sda=0 scl=0
force_idle_bus: sda=0 scl=0 sda.gp=0x6d scl.gp=0x6c
force_idle_bus: failed to clear bus, sda=0 scl=0
force_idle_bus: sda=0 scl=0 sda.gp=0xcb scl.gp=0x5
force_idle_bus: failed to clear bus, sda=0 scl=0
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... *** Warning - No block device, using default
environment
In: serial
Out: serial
Err: serial
Net: Board Net Initialization Failed
No ethernet found.
starting USB...
Bus usb@2184000: usb dr_mode not found
USB EHCI 1.00
Bus usb@2184200: USB EHCI 1.00
scanning bus usb@2184000 for devices... 1 USB Device(s) found
scanning bus usb@2184200 for devices... 1 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found
scanning usb for ethernet devices... 0 Ethernet Device(s) found
Hit any key to stop autoboot: 0
=>
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20210106063504.10841-2-bmeng.cn@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 459149716331dbf06e21da6e72c0fb4340b47bd2
https://github.com/qemu/qemu/commit/459149716331dbf06e21da6e72c0fb4340b47bd2
Author: Bin Meng <bin.meng@windriver.com>
Date: 2021-01-08 (Fri, 08 Jan 2021)
Changed paths:
M hw/misc/imx6_ccm.c
Log Message:
-----------
hw/msic: imx6_ccm: Correct register value for silicon type
Currently when U-Boot boots, it prints "??" for i.MX processor:
CPU: Freescale i.MX?? rev1.0 at 792 MHz
The register that was used to determine the silicon type is
undocumented in the latest IMX6DQRM (Rev. 6, 05/2020), but we
can refer to get_cpu_rev() in arch/arm/mach-imx/mx6/soc.c in
the U-Boot source codes that USB_ANALOG_DIGPROG is used.
Update its reset value to indicate i.MX6Q.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20210106063504.10841-3-bmeng.cn@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 37e33be7ea6b34e0c883f2b39b0c82d6c2b65bc7
https://github.com/qemu/qemu/commit/37e33be7ea6b34e0c883f2b39b0c82d6c2b65bc7
Author: Bin Meng <bin.meng@windriver.com>
Date: 2021-01-08 (Fri, 08 Jan 2021)
Changed paths:
M hw/arm/sabrelite.c
Log Message:
-----------
hw/arm: sabrelite: Connect the Ethernet PHY at address 6
At present, when booting U-Boot on QEMU sabrelite, we see:
Net: Board Net Initialization Failed
No ethernet found.
U-Boot scans PHY at address 4/5/6/7 (see board_eth_init() in the
U-Boot source: board/boundary/nitrogen6x/nitrogen6x.c). On the real
board, the Ethernet PHY is at address 6. Adjust this by updating the
"fec-phy-num" property of the fsl_imx6 SoC object.
With this change, U-Boot sees the PHY but complains MAC address:
Net: using phy at 6
FEC [PRIME]
Error: FEC address not set.
This is due to U-Boot tries to read the MAC address from the fuse,
which QEMU does not have any valid content filled in. However this
does not prevent the Ethernet from working in QEMU. We just need to
set up the MAC address later in the U-Boot command shell, by:
=> setenv ethaddr 00:11:22:33:44:55
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20210106063504.10841-4-bmeng.cn@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: c9f8511ea8d2b80723af0fea1f716d752c1b5208
https://github.com/qemu/qemu/commit/c9f8511ea8d2b80723af0fea1f716d752c1b5208
Author: Bin Meng <bin.meng@windriver.com>
Date: 2021-01-08 (Fri, 08 Jan 2021)
Changed paths:
A docs/system/arm/sabrelite.rst
M docs/system/target-arm.rst
Log Message:
-----------
docs/system: arm: Add sabrelite board description
This adds the target guide for SABRE Lite board, and documents how
to boot a Linux kernel and U-Boot bootloader.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20210106063504.10841-5-bmeng.cn@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 7b09f127738ae3d0e71716cea086fc8f847a5686
https://github.com/qemu/qemu/commit/7b09f127738ae3d0e71716cea086fc8f847a5686
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-01-08 (Fri, 08 Jan 2021)
Changed paths:
M block/iscsi.c
M block/nbd.c
M block/qcow2.c
A docs/system/arm/sabrelite.rst
M docs/system/target-arm.rst
M hw/arm/highbank.c
M hw/arm/musicpal.c
M hw/arm/sabrelite.c
M hw/arm/virt-acpi-build.c
M hw/arm/virt.c
M hw/block/nvme.c
M hw/char/serial.c
M hw/char/virtio-serial-bus.c
M hw/ide/core.c
M hw/input/hid.c
M hw/intc/apic.c
M hw/intc/arm_gic.c
M hw/intc/armv7m_nvic.c
M hw/intc/ioapic.c
M hw/ipmi/ipmi_bmc_extern.c
M hw/misc/imx6_ccm.c
M hw/net/e1000.c
M hw/net/e1000e_core.c
M hw/net/pcnet-pci.c
M hw/net/rtl8139.c
M hw/net/spapr_llan.c
M hw/net/virtio-net.c
M hw/rtc/exynos4210_rtc.c
M hw/s390x/s390-pci-inst.c
M hw/sd/sd.c
M hw/sd/sdhci.c
M hw/timer/allwinner-a10-pit.c
M hw/timer/digic-timer.c
M hw/timer/exynos4210_mct.c
M hw/timer/exynos4210_pwm.c
M hw/timer/mss-timer.c
M hw/usb/dev-hub.c
M hw/usb/hcd-ehci.c
M hw/usb/hcd-ohci-pci.c
M hw/usb/hcd-uhci.c
M hw/usb/hcd-xhci.c
M hw/usb/redirect.c
M hw/vfio/display.c
M hw/virtio/vhost-vsock-common.c
M hw/virtio/virtio-balloon.c
M hw/virtio/virtio-rng.c
M hw/watchdog/wdt_diag288.c
M hw/watchdog/wdt_i6300esb.c
M include/hw/arm/virt.h
M include/qemu/timer.h
M migration/colo.c
M monitor/hmp-cmds.c
M net/announce.c
M net/colo-compare.c
M net/slirp.c
M replay/replay-debugging.c
A scripts/coccinelle/timer-del-timer-free.cocci
M target/arm/cpu.c
M target/arm/cpu_tcg.c
M target/arm/helper.c
M target/arm/translate-vfp.c.inc
M target/s390x/cpu.c
M ui/console.c
M ui/spice-core.c
M util/throttle.c
Log Message:
-----------
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210108'
into staging
target-arm queue:
* intc/arm_gic: Fix gic_irq_signaling_enabled() for vCPUs
* target/arm: Fix MTE0_ACTIVE
* target/arm: Implement v8.1M and Cortex-M55 model
* hw/arm/highbank: Drop dead KVM support code
* util/qemu-timer: Make timer_free() imply timer_del()
* various devices: Use ptimer_free() in finalize function
* docs/system: arm: Add sabrelite board description
* sabrelite: Minor fixes to allow booting U-Boot
# gpg: Signature made Fri 08 Jan 2021 15:34:25 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
[ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20210108: (23 commits)
docs/system: arm: Add sabrelite board description
hw/arm: sabrelite: Connect the Ethernet PHY at address 6
hw/msic: imx6_ccm: Correct register value for silicon type
hw/misc: imx6_ccm: Update PMU_MISC0 reset value
exynos4210_mct: Use ptimer_free() in the finalize function to avoid memleaks
musicpal: Use ptimer_free() in the finalize function to avoid memleaks
mss-timer: Use ptimer_free() in the finalize function to avoid memleaks
exynos4210_pwm: Use ptimer_free() in the finalize function to avoid memleaks
exynos4210_rtc: Use ptimer_free() in the finalize function to avoid memleaks
allwinner-a10-pit: Use ptimer_free() in the finalize function to avoid
memleaks
digic-timer: Use ptimer_free() in the finalize function to avoid memleaks
target/arm: Remove timer_del()/timer_deinit() before timer_free()
Remove superfluous timer_del() calls
scripts/coccinelle: New script to remove unnecessary timer_del() calls
util/qemu-timer: Make timer_free() imply timer_del()
hw/arm/highbank: Drop dead KVM support code
target/arm: Implement Cortex-M55 model
target/arm: Implement FPCXT_NS fp system register
target/arm: Correct store of FPSCR value via FPCXT_S
hw/intc/armv7m_nvic: Correct handling of CCR.BFHFNMIGN
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Compare: https://github.com/qemu/qemu/compare/e79de63ab1bd...7b09f127738a