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[Qemu-commits] [qemu/qemu] 655a65: linux-user: Conditionalize TUNSETVNET
From: |
Peter Maydell |
Subject: |
[Qemu-commits] [qemu/qemu] 655a65: linux-user: Conditionalize TUNSETVNETLE |
Date: |
Thu, 07 Jan 2021 12:56:14 -0800 |
Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: 655a650aca29c15f782097aac0212f9442e372c1
https://github.com/qemu/qemu/commit/655a650aca29c15f782097aac0212f9442e372c1
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M linux-user/ioctls.h
Log Message:
-----------
linux-user: Conditionalize TUNSETVNETLE
This fixes the build for older ppc64 kernel headers.
Fixes: 6addf06a3c4
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d2ef1b83a7a2047e0e36d7b62b3a5d151ab958f5
https://github.com/qemu/qemu/commit/d2ef1b83a7a2047e0e36d7b62b3a5d151ab958f5
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M tcg/i386/tcg-target.c.inc
M tcg/i386/tcg-target.h
Log Message:
-----------
tcg/i386: Adjust TCG_TARGET_HAS_MEMORY_BSWAP
Always true when movbe is available, otherwise leave
this to generic code.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 07ce0b05300de5bc8f1932a4cfbe38f3323e5ab1
https://github.com/qemu/qemu/commit/07ce0b05300de5bc8f1932a4cfbe38f3323e5ab1
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M include/tcg/tcg-opc.h
M tcg/README
M tcg/aarch64/tcg-target.h
M tcg/arm/tcg-target.h
M tcg/i386/tcg-target.c.inc
M tcg/i386/tcg-target.h
M tcg/mips/tcg-target.h
M tcg/optimize.c
M tcg/ppc/tcg-target.h
M tcg/riscv/tcg-target.h
M tcg/s390/tcg-target.h
M tcg/sparc/tcg-target.h
M tcg/tcg-op.c
M tcg/tcg.c
M tcg/tci/tcg-target.h
Log Message:
-----------
tcg: Introduce INDEX_op_qemu_st8_i32
Enable this on i386 to restrict the set of input registers
for an 8-bit store, as required by the architecture. This
removes the last use of scratch registers for user-only mode.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: dfbd0b873a85021c083d9b4b84630c3732645963
https://github.com/qemu/qemu/commit/dfbd0b873a85021c083d9b4b84630c3732645963
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M util/oslib-win32.c
Log Message:
-----------
util/oslib-win32: Use _aligned_malloc for qemu_try_memalign
We do not need or want to be allocating page sized quanta.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Message-Id: <20201018164836.1149452-1-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: ed6f53f9ca9eda16f5edb157fbfe6be09cefc537
https://github.com/qemu/qemu/commit/ed6f53f9ca9eda16f5edb157fbfe6be09cefc537
Author: Philippe Mathieu-Daudé <philmd@redhat.com>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M util/oslib-posix.c
M util/oslib-win32.c
Log Message:
-----------
util/oslib: Assert qemu_try_memalign() alignment is a power of 2
qemu_try_memalign() expects a power of 2 alignment:
- posix_memalign(3):
The address of the allocated memory will be a multiple of alignment,
which must be a power of two and a multiple of sizeof(void *).
- _aligned_malloc()
The alignment value, which must be an integer power of 2.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20201021173803.2619054-3-philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: df5d2b1658b988cb2be557e9f3114115935506ef
https://github.com/qemu/qemu/commit/df5d2b1658b988cb2be557e9f3114115935506ef
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M tcg/tcg.c
Log Message:
-----------
tcg: Do not flush icache for interpreter
This is currently a no-op within tci/tcg-target.h, but
is about to be moved to a more generic location.
Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 1da8de39a39c55560cb4bf0cea94d598fea035cd
https://github.com/qemu/qemu/commit/1da8de39a39c55560cb4bf0cea94d598fea035cd
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M include/qemu/cacheflush.h
M softmmu/physmem.c
M tcg/aarch64/tcg-target.c.inc
M tcg/mips/tcg-target.c.inc
M tcg/ppc/tcg-target.c.inc
M tcg/sparc/tcg-target.c.inc
M tcg/tcg.c
M util/cacheflush.c
M util/cacheinfo.c
Log Message:
-----------
util: Enhance flush_icache_range with separate data pointer
We are shortly going to have a split rw/rx jit buffer. Depending
on the host, we need to flush the dcache at the rw data pointer and
flush the icache at the rx code pointer.
For now, the two passed pointers are identical, so there is no
effective change in behaviour.
Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 664a79735e4deb10dd652cee370c9b13d9b10db9
https://github.com/qemu/qemu/commit/664a79735e4deb10dd652cee370c9b13d9b10db9
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M util/cacheflush.c
Log Message:
-----------
util: Specialize flush_idcache_range for aarch64
For darwin, the CTR_EL0 register is not accessible, but there
are system routines that we can use.
For other hosts, copy the single pointer implementation from
libgcc and modify it to support the double pointer interface
we require. This halves the number of cache operations required
when split-rwx is enabled.
Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: b91ccb31157853c89ca86026d2af966e30995f71
https://github.com/qemu/qemu/commit/b91ccb31157853c89ca86026d2af966e30995f71
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M include/tcg/tcg.h
M tcg/tcg.c
M tcg/tci.c
Log Message:
-----------
tcg: Move tcg prologue pointer out of TCGContext
This value is constant across all thread-local copies of TCGContext,
so we might as well move it out of thread-local storage.
Use the correct function pointer type, and name the variable
tcg_qemu_tb_exec, which means that we are able to remove the
macro that does the casting.
Replace HAVE_TCG_QEMU_TB_EXEC with CONFIG_TCG_INTERPRETER,
as this is somewhat clearer in intent.
Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 8b5c2b6260c0bb1233f605663bec9582b55d80c9
https://github.com/qemu/qemu/commit/8b5c2b6260c0bb1233f605663bec9582b55d80c9
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M accel/tcg/tcg-runtime.c
M include/tcg/tcg.h
M tcg/aarch64/tcg-target.c.inc
M tcg/arm/tcg-target.c.inc
M tcg/i386/tcg-target.c.inc
M tcg/mips/tcg-target.c.inc
M tcg/ppc/tcg-target.c.inc
M tcg/riscv/tcg-target.c.inc
M tcg/s390/tcg-target.c.inc
M tcg/sparc/tcg-target.c.inc
M tcg/tcg.c
Log Message:
-----------
tcg: Move tcg epilogue pointer out of TCGContext
This value is constant across all thread-local copies of TCGContext,
so we might as well move it out of thread-local storage.
Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 4846cd37df83b24e65a42bb50e5f407cdb50da72
https://github.com/qemu/qemu/commit/4846cd37df83b24e65a42bb50e5f407cdb50da72
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M accel/tcg/translate-all.c
M include/tcg/tcg.h
Log Message:
-----------
tcg: Add in_code_gen_buffer
Create a function to determine if a pointer is within the buffer.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: db0c51a380394b21b33a6294367aff03ab06b286
https://github.com/qemu/qemu/commit/db0c51a380394b21b33a6294367aff03ab06b286
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M accel/tcg/cpu-exec.c
M accel/tcg/tcg-runtime.c
M accel/tcg/tcg-runtime.h
M accel/tcg/trace-events
M accel/tcg/translate-all.c
M disas.c
M include/disas/disas.h
M include/exec/exec-all.h
M include/exec/log.h
M include/tcg/tcg.h
M tcg/tcg-pool.c.inc
M tcg/tcg.c
M tcg/tci.c
Log Message:
-----------
tcg: Introduce tcg_splitwx_to_{rx,rw}
Add two helper functions, using a global variable to hold
the displacement. The displacement is currently always 0,
so no change in behaviour.
Begin using the functions in tcg common code only.
Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: ffd0e507369cd65de5a07b324a2fab03678aeae1
https://github.com/qemu/qemu/commit/ffd0e507369cd65de5a07b324a2fab03678aeae1
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M include/tcg/tcg.h
M tcg/aarch64/tcg-target.c.inc
M tcg/arm/tcg-target.c.inc
M tcg/mips/tcg-target.c.inc
M tcg/ppc/tcg-target.c.inc
M tcg/s390/tcg-target.c.inc
M tcg/tcg.c
Log Message:
-----------
tcg: Adjust TCGLabel for const
Change TCGLabel.u.value_ptr to const, and initialize it with
tcg_splitwx_to_rx. Propagate const through tcg/host/ only
as far as needed to avoid errors from the value_ptr change.
Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 2be7d76b1557d3ee72cde3b2cf5d4abf25220fb2
https://github.com/qemu/qemu/commit/2be7d76b1557d3ee72cde3b2cf5d4abf25220fb2
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M tcg/aarch64/tcg-target.c.inc
M tcg/arm/tcg-target.c.inc
M tcg/i386/tcg-target.c.inc
M tcg/mips/tcg-target.c.inc
M tcg/ppc/tcg-target.c.inc
M tcg/riscv/tcg-target.c.inc
M tcg/s390/tcg-target.c.inc
M tcg/sparc/tcg-target.c.inc
M tcg/tcg.c
M tcg/tci/tcg-target.c.inc
Log Message:
-----------
tcg: Adjust tcg_out_call for const
We must change all targets at once, since all must match
the declaration in tcg.c.
Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 92ab8e7d621e11df559fc2427ff08df6c3a5a6de
https://github.com/qemu/qemu/commit/92ab8e7d621e11df559fc2427ff08df6c3a5a6de
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M tcg/i386/tcg-target.c.inc
M tcg/tcg.c
Log Message:
-----------
tcg: Adjust tcg_out_label for const
Simplify the arguments to always use s->code_ptr instead of
take it as an argument. That makes it easy to ensure that
the value_ptr is always the rx version.
Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 755bf9e514e3f60ffa3f0495e6bc524fca74f3be
https://github.com/qemu/qemu/commit/755bf9e514e3f60ffa3f0495e6bc524fca74f3be
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M include/tcg/tcg.h
M tcg/aarch64/tcg-target.c.inc
M tcg/arm/tcg-target.c.inc
M tcg/i386/tcg-target.c.inc
M tcg/mips/tcg-target.c.inc
M tcg/ppc/tcg-target.c.inc
M tcg/riscv/tcg-target.c.inc
M tcg/s390/tcg-target.c.inc
M tcg/sparc/tcg-target.c.inc
M tcg/tcg.c
Log Message:
-----------
tcg: Adjust tcg_register_jit for const
We must change all targets at once, since all must match
the declaration in tcg.c.
Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 1acbad0f278ad585bbfc46081b5b639447585be0
https://github.com/qemu/qemu/commit/1acbad0f278ad585bbfc46081b5b639447585be0
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M accel/tcg/cpu-exec.c
M tcg/aarch64/tcg-target.c.inc
M tcg/aarch64/tcg-target.h
M tcg/arm/tcg-target.h
M tcg/i386/tcg-target.h
M tcg/mips/tcg-target.c.inc
M tcg/mips/tcg-target.h
M tcg/ppc/tcg-target.c.inc
M tcg/ppc/tcg-target.h
M tcg/riscv/tcg-target.h
M tcg/s390/tcg-target.h
M tcg/sparc/tcg-target.c.inc
M tcg/sparc/tcg-target.h
M tcg/tci/tcg-target.h
Log Message:
-----------
tcg: Adjust tb_target_set_jmp_target for split-wx
Pass both rx and rw addresses to tb_target_set_jmp_target.
Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d997143533e010b37363b10eddaf18ccb0e5659f
https://github.com/qemu/qemu/commit/d997143533e010b37363b10eddaf18ccb0e5659f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M accel/tcg/translator.c
M include/exec/gen-icount.h
M include/exec/translator.h
M include/tcg/tcg-op.h
M target/arm/translate-a64.c
M tcg/tcg-op.c
Log Message:
-----------
tcg: Make DisasContextBase.tb const
There is nothing within the translators that ought to be
changing the TranslationBlock data, so make it const.
This does not actually use the read-only copy of the
data structure that exists within the rx region.
Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 04a37d4ca4bfef595b2e9bec99eac8bfc806c76b
https://github.com/qemu/qemu/commit/04a37d4ca4bfef595b2e9bec99eac8bfc806c76b
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M include/hw/core/cpu.h
M target/arm/cpu.c
M target/avr/cpu.c
M target/hppa/cpu.c
M target/i386/tcg/tcg-cpu.c
M target/microblaze/cpu.c
M target/mips/cpu.c
M target/riscv/cpu.c
M target/rx/cpu.c
M target/sh4/cpu.c
M target/sparc/cpu.c
M target/tricore/cpu.c
Log Message:
-----------
tcg: Make tb arg to synchronize_from_tb const
There is nothing within the translators that ought to be
changing the TranslationBlock data, so make it const.
This does not actually use the read-only copy of the
data structure that exists within the rx region.
Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 6bc144237a857bc1238e5dcbc0b4f4ed94929463
https://github.com/qemu/qemu/commit/6bc144237a857bc1238e5dcbc0b4f4ed94929463
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M accel/tcg/translate-all.c
Log Message:
-----------
tcg: Use Error with alloc_code_gen_buffer
Report better error messages than just "could not allocate".
Let alloc_code_gen_buffer set ctx->code_gen_buffer_size
and ctx->code_gen_buffer, and simply return bool.
Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: a35b3e14157b9d912898d4800f329dc5f3c200a6
https://github.com/qemu/qemu/commit/a35b3e14157b9d912898d4800f329dc5f3c200a6
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M accel/tcg/tcg-all.c
M accel/tcg/translate-all.c
M bsd-user/main.c
M include/sysemu/tcg.h
M linux-user/main.c
M qemu-options.hx
M tcg/aarch64/tcg-target.h
M tcg/arm/tcg-target.h
M tcg/i386/tcg-target.h
M tcg/mips/tcg-target.h
M tcg/ppc/tcg-target.h
M tcg/riscv/tcg-target.h
M tcg/s390/tcg-target.h
M tcg/sparc/tcg-target.h
M tcg/tci/tcg-target.h
Log Message:
-----------
tcg: Add --accel tcg,split-wx property
Plumb the value through to alloc_code_gen_buffer. This is not
supported by any os or tcg backend, so for now enabling it will
result in an error.
Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: a8c35b2cadfc7bef5221ceee0725493461568528
https://github.com/qemu/qemu/commit/a8c35b2cadfc7bef5221ceee0725493461568528
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M accel/tcg/translate-all.c
Log Message:
-----------
accel/tcg: Support split-wx for linux with memfd
We cannot use a real temp file, because we would need to find
a filesystem that does not have noexec enabled. However, a
memfd is not associated with any filesystem.
Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 6f70ddee19ec7837812bda81cec59dc2681df0a9
https://github.com/qemu/qemu/commit/6f70ddee19ec7837812bda81cec59dc2681df0a9
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M accel/tcg/translate-all.c
Log Message:
-----------
accel/tcg: Support split-wx for darwin/iOS with vm_remap
Cribbed from code posted by Joelle van Dyne <j@getutm.app>,
and rearranged to a cleaner structure.
Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: eba40358b49cb09f4e24764db7951e30987aa416
https://github.com/qemu/qemu/commit/eba40358b49cb09f4e24764db7951e30987aa416
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M accel/tcg/cpu-exec.c
M tcg/tcg-op.c
Log Message:
-----------
tcg: Return the TB pointer from the rx region from exit_tb
This produces a small pc-relative displacement within the
generated code to the TB structure that preceeds it.
Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 705ed477d54c5bccf51d924c403a52049586c3d7
https://github.com/qemu/qemu/commit/705ed477d54c5bccf51d924c403a52049586c3d7
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M tcg/i386/tcg-target.c.inc
M tcg/i386/tcg-target.h
Log Message:
-----------
tcg/i386: Support split-wx code generation
Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: f716bab3a9553259ff90505b3ddd245f4f8c4061
https://github.com/qemu/qemu/commit/f716bab3a9553259ff90505b3ddd245f4f8c4061
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M tcg/aarch64/tcg-target.c.inc
Log Message:
-----------
tcg/aarch64: Use B not BL for tcg_out_goto_long
A typo generated a branch-and-link insn instead of plain branch.
Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: ffba3eb34b71a28bf15da85badbeb56c1be8ac45
https://github.com/qemu/qemu/commit/ffba3eb34b71a28bf15da85badbeb56c1be8ac45
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M tcg/aarch64/tcg-target.c.inc
M tcg/aarch64/tcg-target.h
Log Message:
-----------
tcg/aarch64: Support split-wx code generation
Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: f06176be76ffa96098737665ac770cac0f7bfdb8
https://github.com/qemu/qemu/commit/f06176be76ffa96098737665ac770cac0f7bfdb8
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M disas.c
M disas/capstone.c
M include/disas/dis-asm.h
Log Message:
-----------
disas: Push const down through host disassembly
Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 305daaedf6b8bcaa07133bf445947ef0522c38ac
https://github.com/qemu/qemu/commit/305daaedf6b8bcaa07133bf445947ef0522c38ac
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M tcg/tci.c
Log Message:
-----------
tcg/tci: Push const down through bytecode reading
Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 44c7197f1506f509999a4c370e3ec1f3d1799cfa
https://github.com/qemu/qemu/commit/44c7197f1506f509999a4c370e3ec1f3d1799cfa
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M include/tcg/tcg.h
Log Message:
-----------
tcg: Introduce tcg_tbrel_diff
Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: e6dc7f818fd99d598f08506a3e145abbdf9dc763
https://github.com/qemu/qemu/commit/e6dc7f818fd99d598f08506a3e145abbdf9dc763
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M tcg/ppc/tcg-target.c.inc
Log Message:
-----------
tcg/ppc: Use tcg_tbrel_diff
Use tcg_tbrel_diff when we need a displacement to a label,
and with a NULL argument when we need the normalizing addend.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 2d6f38ebe534f0232228fab6df3044e3819675c6
https://github.com/qemu/qemu/commit/2d6f38ebe534f0232228fab6df3044e3819675c6
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M tcg/ppc/tcg-target.c.inc
Log Message:
-----------
tcg/ppc: Use tcg_out_mem_long to reset TCG_REG_TB
The maximum TB code gen size is UINT16_MAX, which the current
code does not support. Use our utility function to optimally
add an arbitrary constant.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d54401dfeffd1792761162bfed580b0af984c3cc
https://github.com/qemu/qemu/commit/d54401dfeffd1792761162bfed580b0af984c3cc
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M tcg/ppc/tcg-target.c.inc
M tcg/ppc/tcg-target.h
Log Message:
-----------
tcg/ppc: Support split-wx code generation
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 47c2206ba42257861d20aeaf4500c4a270c4d27a
https://github.com/qemu/qemu/commit/47c2206ba42257861d20aeaf4500c4a270c4d27a
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M tcg/sparc/tcg-target.c.inc
Log Message:
-----------
tcg/sparc: Use tcg_tbrel_diff
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 0d8b6191ac66c7046e38d40fbf8d20471b638751
https://github.com/qemu/qemu/commit/0d8b6191ac66c7046e38d40fbf8d20471b638751
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M tcg/sparc/tcg-target.c.inc
M tcg/sparc/tcg-target.h
Log Message:
-----------
tcg/sparc: Support split-wx code generation
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: dd90043f5df744e700176ac27e9e2213b10655fb
https://github.com/qemu/qemu/commit/dd90043f5df744e700176ac27e9e2213b10655fb
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M tcg/s390/tcg-target.c.inc
Log Message:
-----------
tcg/s390: Use tcg_tbrel_diff
Use tcg_tbrel_diff when we need a displacement to a label,
and with a NULL argument when we need the normalizing addend.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 79dae4ddd89eb550401d64232a0f86501600adbf
https://github.com/qemu/qemu/commit/79dae4ddd89eb550401d64232a0f86501600adbf
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M tcg/s390/tcg-target.c.inc
M tcg/s390/tcg-target.h
Log Message:
-----------
tcg/s390: Support split-wx code generation
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 844d0442a53ca40a8d826e7549f27a8d4ac3a582
https://github.com/qemu/qemu/commit/844d0442a53ca40a8d826e7549f27a8d4ac3a582
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M tcg/riscv/tcg-target.c.inc
Log Message:
-----------
tcg/riscv: Fix branch range checks
The offset even checks were folded into the range check incorrectly.
By offsetting by 1, and not decrementing the width, we silently
allowed out of range branches.
Assert that the offset is always even instead. Move tcg_out_goto
down into the CONFIG_SOFTMMU block so that it is not unused.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 4b6a52d01e0dd640dd15f79264b38790023e3587
https://github.com/qemu/qemu/commit/4b6a52d01e0dd640dd15f79264b38790023e3587
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M tcg/riscv/tcg-target.c.inc
Log Message:
-----------
tcg/riscv: Remove branch-over-branch fallback
Since 7ecd02a06f8, we are prepared to re-start code generation
with a smaller TB if a relocation is out of range. We no longer
need to leave a nop in the stream Just In Case.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 793f73819642127f05781efbf617453757fe2c71
https://github.com/qemu/qemu/commit/793f73819642127f05781efbf617453757fe2c71
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M tcg/riscv/tcg-target.c.inc
M tcg/riscv/tcg-target.h
Log Message:
-----------
tcg/riscv: Support split-wx code generation
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d1861aa40915303797423cbf77b5d00b952d77fd
https://github.com/qemu/qemu/commit/d1861aa40915303797423cbf77b5d00b952d77fd
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M accel/tcg/translate-all.c
Log Message:
-----------
accel/tcg: Add mips support to alloc_code_gen_buffer_splitwx_memfd
Re-use the 256MiB region handling from alloc_code_gen_buffer_anon,
and replace that with the shared file mapping.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 91a7fd1fb613460d95c51462fe27205996a9a0aa
https://github.com/qemu/qemu/commit/91a7fd1fb613460d95c51462fe27205996a9a0aa
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M tcg/mips/tcg-target.c.inc
Log Message:
-----------
tcg/mips: Do not assert on relocation overflow
This target was not updated with 7ecd02a06f8, and so did
not allow re-compilation with relocation overflow.
Remove reloc_26 and reloc_26_val as unused.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: df5af1306a6189d1829b7b10f0e941c4afc294a4
https://github.com/qemu/qemu/commit/df5af1306a6189d1829b7b10f0e941c4afc294a4
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M tcg/mips/tcg-target.c.inc
M tcg/mips/tcg-target.h
Log Message:
-----------
tcg/mips: Support split-wx code generation
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 69478b8b153a31be51fe9444e522888dab946ccf
https://github.com/qemu/qemu/commit/69478b8b153a31be51fe9444e522888dab946ccf
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M tcg/arm/tcg-target.c.inc
M tcg/arm/tcg-target.h
Log Message:
-----------
tcg/arm: Support split-wx code generation
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: de2fac62d24f82b36c4d002dda9662d0a23766a9
https://github.com/qemu/qemu/commit/de2fac62d24f82b36c4d002dda9662d0a23766a9
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M accel/tcg/translate-all.c
M tcg/aarch64/tcg-target.h
M tcg/arm/tcg-target.h
M tcg/i386/tcg-target.h
M tcg/mips/tcg-target.h
M tcg/ppc/tcg-target.h
M tcg/riscv/tcg-target.h
M tcg/s390/tcg-target.h
M tcg/sparc/tcg-target.h
M tcg/tci/tcg-target.h
Log Message:
-----------
tcg: Remove TCG_TARGET_SUPPORT_MIRROR
Now that all native tcg hosts support splitwx, remove the define.
Replace the one use with a test for CONFIG_TCG_INTERPRETER.
Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: c8bc1168ade30e37c3d4bccca9ed0171befbd591
https://github.com/qemu/qemu/commit/c8bc1168ade30e37c3d4bccca9ed0171befbd591
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M include/tcg/tcg.h
M tcg/aarch64/tcg-target.c.inc
M tcg/arm/tcg-target.c.inc
M tcg/i386/tcg-target.c.inc
M tcg/mips/tcg-target.c.inc
M tcg/ppc/tcg-target.c.inc
M tcg/riscv/tcg-target.c.inc
M tcg/s390/tcg-target.c.inc
M tcg/sparc/tcg-target.c.inc
M tcg/tcg.c
Log Message:
-----------
tcg: Constify tcg_code_gen_epilogue
Now that all native tcg hosts support splitwx,
make this pointer const.
Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: e5e2e4c73926f6f3c1f5da24a350e4345d5ad232
https://github.com/qemu/qemu/commit/e5e2e4c73926f6f3c1f5da24a350e4345d5ad232
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M tcg/aarch64/tcg-target.c.inc
M tcg/arm/tcg-target.c.inc
M tcg/i386/tcg-target.c.inc
M tcg/mips/tcg-target.c.inc
M tcg/ppc/tcg-target.c.inc
M tcg/riscv/tcg-target.c.inc
M tcg/s390/tcg-target.c.inc
M tcg/tcg-ldst.c.inc
Log Message:
-----------
tcg: Constify TCGLabelQemuLdst.raddr
Now that all native tcg hosts support splitwx,
make this pointer const.
Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: e79de63ab1bd1f6550e7b915e433bec1ad1a870a
https://github.com/qemu/qemu/commit/e79de63ab1bd1f6550e7b915e433bec1ad1a870a
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2021-01-07 (Thu, 07 Jan 2021)
Changed paths:
M accel/tcg/cpu-exec.c
M accel/tcg/tcg-all.c
M accel/tcg/tcg-runtime.c
M accel/tcg/tcg-runtime.h
M accel/tcg/trace-events
M accel/tcg/translate-all.c
M accel/tcg/translator.c
M bsd-user/main.c
M disas.c
M disas/capstone.c
M include/disas/dis-asm.h
M include/disas/disas.h
M include/exec/exec-all.h
M include/exec/gen-icount.h
M include/exec/log.h
M include/exec/translator.h
M include/hw/core/cpu.h
M include/qemu/cacheflush.h
M include/sysemu/tcg.h
M include/tcg/tcg-op.h
M include/tcg/tcg-opc.h
M include/tcg/tcg.h
M linux-user/ioctls.h
M linux-user/main.c
M qemu-options.hx
M softmmu/physmem.c
M target/arm/cpu.c
M target/arm/translate-a64.c
M target/avr/cpu.c
M target/hppa/cpu.c
M target/i386/tcg/tcg-cpu.c
M target/microblaze/cpu.c
M target/mips/cpu.c
M target/riscv/cpu.c
M target/rx/cpu.c
M target/sh4/cpu.c
M target/sparc/cpu.c
M target/tricore/cpu.c
M tcg/README
M tcg/aarch64/tcg-target.c.inc
M tcg/aarch64/tcg-target.h
M tcg/arm/tcg-target.c.inc
M tcg/arm/tcg-target.h
M tcg/i386/tcg-target.c.inc
M tcg/i386/tcg-target.h
M tcg/mips/tcg-target.c.inc
M tcg/mips/tcg-target.h
M tcg/optimize.c
M tcg/ppc/tcg-target.c.inc
M tcg/ppc/tcg-target.h
M tcg/riscv/tcg-target.c.inc
M tcg/riscv/tcg-target.h
M tcg/s390/tcg-target.c.inc
M tcg/s390/tcg-target.h
M tcg/sparc/tcg-target.c.inc
M tcg/sparc/tcg-target.h
M tcg/tcg-ldst.c.inc
M tcg/tcg-op.c
M tcg/tcg-pool.c.inc
M tcg/tcg.c
M tcg/tci.c
M tcg/tci/tcg-target.c.inc
M tcg/tci/tcg-target.h
M util/cacheflush.c
M util/cacheinfo.c
M util/oslib-posix.c
M util/oslib-win32.c
Log Message:
-----------
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210107' into
staging
Build fix for ppc64 centos7.
Reduce the use of scratch registers for tcg/i386.
Use _aligned_malloc for Win32.
Enable split w^x code gen buffers.
# gpg: Signature made Thu 07 Jan 2021 20:06:38 GMT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>"
[full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth-gitlab/tags/pull-tcg-20210107: (47 commits)
tcg: Constify TCGLabelQemuLdst.raddr
tcg: Constify tcg_code_gen_epilogue
tcg: Remove TCG_TARGET_SUPPORT_MIRROR
tcg/arm: Support split-wx code generation
tcg/mips: Support split-wx code generation
tcg/mips: Do not assert on relocation overflow
accel/tcg: Add mips support to alloc_code_gen_buffer_splitwx_memfd
tcg/riscv: Support split-wx code generation
tcg/riscv: Remove branch-over-branch fallback
tcg/riscv: Fix branch range checks
tcg/s390: Support split-wx code generation
tcg/s390: Use tcg_tbrel_diff
tcg/sparc: Support split-wx code generation
tcg/sparc: Use tcg_tbrel_diff
tcg/ppc: Support split-wx code generation
tcg/ppc: Use tcg_out_mem_long to reset TCG_REG_TB
tcg/ppc: Use tcg_tbrel_diff
tcg: Introduce tcg_tbrel_diff
tcg/tci: Push const down through bytecode reading
disas: Push const down through host disassembly
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Compare: https://github.com/qemu/qemu/compare/470dd6bd3607...e79de63ab1bd
- [Qemu-commits] [qemu/qemu] 655a65: linux-user: Conditionalize TUNSETVNETLE,
Peter Maydell <=