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[Qemu-commits] [qemu/qemu] 98e877: target/arm: fix stage 2 page-walks in
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From: |
Peter Maydell |
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Subject: |
[Qemu-commits] [qemu/qemu] 98e877: target/arm: fix stage 2 page-walks in 32-bit emula... |
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Date: |
Mon, 23 Nov 2020 07:15:17 -0800 |
Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: 98e8779770c40901ed585745aacc9a8e2b934a28
https://github.com/qemu/qemu/commit/98e8779770c40901ed585745aacc9a8e2b934a28
Author: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
Date: 2020-11-23 (Mon, 23 Nov 2020)
Changed paths:
M target/arm/helper.c
Log Message:
-----------
target/arm: fix stage 2 page-walks in 32-bit emulation
Using a target unsigned long would limit the Input Address to a LPAE
page-walk to 32 bits on AArch32 and 64 bits on AArch64. This is okay
for stage 1 or on AArch64, but it is insufficient for stage 2 on
AArch32. In that later case, the Input Address can have up to 40 bits.
Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201118150414.18360-1-remi@remlab.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 98554b3b56b3e74e271385afb00855d48ab1fe16
https://github.com/qemu/qemu/commit/98554b3b56b3e74e271385afb00855d48ab1fe16
Author: AlexChen <alex.chen@huawei.com>
Date: 2020-11-23 (Mon, 23 Nov 2020)
Changed paths:
M hw/arm/pxa2xx.c
M hw/arm/spitz.c
M hw/arm/tosa.c
Log Message:
-----------
hw/arm: Fix bad print format specifiers
We should use printf format specifier "%u" instead of "%i" for
argument of type "unsigned int".
Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Alex Chen <alex.chen@huawei.com>
Message-id: 5F9FD78B.8000300@huawei.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 57bdec5c46b99f0aa4163eb30939c56c410676c8
https://github.com/qemu/qemu/commit/57bdec5c46b99f0aa4163eb30939c56c410676c8
Author: Chen Qun <kuhn.chenqun@huawei.com>
Date: 2020-11-23 (Mon, 23 Nov 2020)
Changed paths:
M hw/intc/rx_icu.c
Log Message:
-----------
hw/intc: fix heap-buffer-overflow in rxicu_realize()
When 'j = icu->nr_sense – 1', the 'j < icu->nr_sense' condition is true,
then 'j = icu->nr_sense', the'icu->init_sense[j]' has out-of-bounds access.
The asan showed stack:
ERROR: AddressSanitizer: heap-buffer-overflow on address 0x604000004d7d at pc
0x55852cd26a76 bp 0x7ffe39f26200 sp 0x7ffe39f261f0
READ of size 1 at 0x604000004d7d thread T0
#0 0x55852cd26a75 in rxicu_realize ../hw/intc/rx_icu.c:311
#1 0x55852cf075f7 in device_set_realized ../hw/core/qdev.c:886
#2 0x55852cd4a32f in property_set_bool ../qom/object.c:2251
#3 0x55852cd4f9bb in object_property_set ../qom/object.c:1398
#4 0x55852cd54f3f in object_property_set_qobject ../qom/qom-qobject.c:28
#5 0x55852cd4fc3f in object_property_set_bool ../qom/object.c:1465
#6 0x55852cbf0b27 in register_icu ../hw/rx/rx62n.c:156
#7 0x55852cbf12a6 in rx62n_realize ../hw/rx/rx62n.c:261
#8 0x55852cf075f7 in device_set_realized ../hw/core/qdev.c:886
#9 0x55852cd4a32f in property_set_bool ../qom/object.c:2251
#10 0x55852cd4f9bb in object_property_set ../qom/object.c:1398
#11 0x55852cd54f3f in object_property_set_qobject ../qom/qom-qobject.c:28
#12 0x55852cd4fc3f in object_property_set_bool ../qom/object.c:1465
#13 0x55852cbf1a85 in rx_gdbsim_init ../hw/rx/rx-gdbsim.c:109
#14 0x55852cd22de0 in qemu_init ../softmmu/vl.c:4380
#15 0x55852ca57088 in main ../softmmu/main.c:49
#16 0x7feefafa5d42 in __libc_start_main (/lib64/libc.so.6+0x26d42)
Add the 'ice->src[i].sense' initialize to the default value, and then
process init_sense array to identify which irqs should be level-triggered.
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Chen Qun <kuhn.chenqun@huawei.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20201111141733.2358800-1-kuhn.chenqun@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 6e84a914770e77b33a10110bdf607cca9e08e134
https://github.com/qemu/qemu/commit/6e84a914770e77b33a10110bdf607cca9e08e134
Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
Date: 2020-11-23 (Mon, 23 Nov 2020)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Cover system/arm/cpu-features.rst with ARM TCG CPUs
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20201120154545.2504625-2-f4bug@amsat.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: de8ee7d47cd585d504cb32498e92e223fd187adf
https://github.com/qemu/qemu/commit/de8ee7d47cd585d504cb32498e92e223fd187adf
Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
Date: 2020-11-23 (Mon, 23 Nov 2020)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Cover system/arm/aspeed.rst with ASPEED BMC machines
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-id: 20201120154545.2504625-3-f4bug@amsat.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 7170311674df13cbb6bffaba701af60b7ac0836a
https://github.com/qemu/qemu/commit/7170311674df13cbb6bffaba701af60b7ac0836a
Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
Date: 2020-11-23 (Mon, 23 Nov 2020)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Cover system/arm/nuvoton.rst with Nuvoton NPCM7xx
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20201120154545.2504625-4-f4bug@amsat.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: c67d732c39bb201d5dc97716df48311971ab2b26
https://github.com/qemu/qemu/commit/c67d732c39bb201d5dc97716df48311971ab2b26
Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
Date: 2020-11-23 (Mon, 23 Nov 2020)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Fix system/arm/orangepi.rst path
Fixes: 0553ef42571 ("docs: add Orange Pi PC document")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com>
Message-id: 20201120154545.2504625-5-f4bug@amsat.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 9eeeb80ad47e056e1eb688785cc866ec38585cab
https://github.com/qemu/qemu/commit/9eeeb80ad47e056e1eb688785cc866ec38585cab
Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
Date: 2020-11-23 (Mon, 23 Nov 2020)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Cover system/arm/sbsa.rst with SBSA-REF machine
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20201120154545.2504625-6-f4bug@amsat.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 66278f8aeba0026b483393131f391cc2e746aa80
https://github.com/qemu/qemu/commit/66278f8aeba0026b483393131f391cc2e746aa80
Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
Date: 2020-11-23 (Mon, 23 Nov 2020)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Cover system/arm/sx1.rst with OMAP machines
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20201120154545.2504625-7-f4bug@amsat.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 155e1c82ed0da265dbc6cd499a2b2552a5388a9c
https://github.com/qemu/qemu/commit/155e1c82ed0da265dbc6cd499a2b2552a5388a9c
Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
Date: 2020-11-23 (Mon, 23 Nov 2020)
Changed paths:
M docs/system/deprecated.rst
Log Message:
-----------
docs/system: Deprecate raspi2/raspi3 machine aliases
Since commit aa35ec2213b ("hw/arm/raspi: Use more specific
machine names") the raspi2/raspi3 machines have been renamed
as raspi2b/raspi3b.
Note, rather than the raspi3b, the raspi3ap introduced in
commit 5be94252d34 ("hw/arm/raspi: Add the Raspberry Pi 3
model A+") is a closer match to what QEMU models, but only
provides 512 MB of RAM.
As more Raspberry Pi 2/3 models are emulated, in order
to avoid confusion, deprecate the raspi2/raspi3 machine
aliases.
ACKed-by: Peter Krempa <pkrempa@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20201120173953.2539469-2-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: d9f2ac3de90d2b4bc7bfef12d69a6bfd0a4df04c
https://github.com/qemu/qemu/commit/d9f2ac3de90d2b4bc7bfef12d69a6bfd0a4df04c
Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
Date: 2020-11-23 (Mon, 23 Nov 2020)
Changed paths:
M MAINTAINERS
A docs/system/arm/raspi.rst
M docs/system/target-arm.rst
Log Message:
-----------
docs/system/arm: Document the various raspi boards
Document the following Raspberry Pi models:
- raspi0 Raspberry Pi Zero (revision 1.2)
- raspi1ap Raspberry Pi A+ (revision 1.1)
- raspi2b Raspberry Pi 2B (revision 1.1)
- raspi3ap Raspberry Pi 3A+ (revision 1.0)
- raspi3b Raspberry Pi 3B (revision 1.2)
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20201120173953.2539469-3-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 12bff81b4dfa01fe7956d25f2687df46caff7041
https://github.com/qemu/qemu/commit/12bff81b4dfa01fe7956d25f2687df46caff7041
Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
Date: 2020-11-23 (Mon, 23 Nov 2020)
Changed paths:
M docs/system/arm/aspeed.rst
Log Message:
-----------
docs/system/arm: Document OpenPOWER Witherspoon BMC model Front LEDs
Document the 3 front LEDs modeled on the OpenPOWER Witherspoon BMC
(see commit 7cfbde5ea1c "hw/arm/aspeed: Add the 3 front LEDs drived
by the PCA9552 #1").
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20201120173953.2539469-4-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 75bf6e17f953feedcd260f5d6a993fbb569c9915
https://github.com/qemu/qemu/commit/75bf6e17f953feedcd260f5d6a993fbb569c9915
Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
Date: 2020-11-23 (Mon, 23 Nov 2020)
Changed paths:
M docs/system/arm/xscale.rst
Log Message:
-----------
docs/system/arm: Document the Sharp Zaurus SL-6000
List the 'tosa' machine with the XScale-based PDAs models.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20201120173953.2539469-5-f4bug@amsat.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 6951595183e5481931f03284d5cc6a481fe7c713
https://github.com/qemu/qemu/commit/6951595183e5481931f03284d5cc6a481fe7c713
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2020-11-23 (Mon, 23 Nov 2020)
Changed paths:
M target/arm/arm-semi.c
Log Message:
-----------
target/arm: Make SYS_HEAPINFO work with RAM that doesn't start at 0
The semihosting SYS_HEAPINFO call is supposed to return an array
of four guest addresses:
* base of heap memory
* limit of heap memory
* base of stack memory
* limit of stack memory
Some semihosting programs (including those compiled to use the
'newlib' embedded C library) use this call to work out where they
should initialize themselves to.
QEMU's implementation when in system emulation mode is very
simplistic: we say that the heap starts halfway into RAM and
continues to the end of RAM, and the stack starts at the top of RAM
and works down to the bottom. Unfortunately the code assumes that
the base address of RAM is at address 0, so on boards like 'virt'
where this is not true the addresses returned will all be wrong and
the guest application will usually crash.
Conveniently since all Arm boards call arm_load_kernel() we have the
base address of the main RAM block in the arm_boot_info struct which
is accessible via the CPU object. Use this to return sensible values
from SYS_HEAPINFO.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20201119092346.32356-1-peter.maydell@linaro.org
Commit: acebed948c4f2f3be89ba91f4cba1905a8b66318
https://github.com/qemu/qemu/commit/acebed948c4f2f3be89ba91f4cba1905a8b66318
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2020-11-23 (Mon, 23 Nov 2020)
Changed paths:
M linux-user/arm/cpu_loop.c
Log Message:
-----------
linux-user/arm: Deliver SIGTRAP for UDF patterns used as breakpoints
The Linux kernel doesn't use the official bkpt insn for breakpoints;
instead it uses three instructions in the guaranteed-to-UNDEF space,
and generates SIGTRAP for these rather than the SIGILL that most
UNDEF insns generate:
https://elixir.bootlin.com/linux/v5.9.8/source/arch/arm/kernel/ptrace.c#L197
Make QEMU treat these insns specially too. The main benefit of this
is that if you're running a debugger on a guest program that runs
into a GCC __builtin_trap() or LLVM "trap because execution should
never reach here" then you'll get the expected signal rather than a
SIGILL.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201117155634.6924-1-peter.maydell@linaro.org
Commit: 4faf359accb274d37ddb0e7b68617b9297b9120e
https://github.com/qemu/qemu/commit/4faf359accb274d37ddb0e7b68617b9297b9120e
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2020-11-23 (Mon, 23 Nov 2020)
Changed paths:
M docs/system/index.rst
A docs/system/virtio-net-failover.rst
R docs/virtio-net-failover.rst
Log Message:
-----------
docs: Move virtio-net-failover.rst into the system manual
The virtio-net-failover documentation is currently orphan and
not included in any manual; move it into the system manual,
immediately following the general network emulation section.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Commit: 392d8e95c7dd3de10a20387914ac34cb12d8ff04
https://github.com/qemu/qemu/commit/392d8e95c7dd3de10a20387914ac34cb12d8ff04
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2020-11-23 (Mon, 23 Nov 2020)
Changed paths:
R docs/cpu-hotplug.rst
A docs/system/cpu-hotplug.rst
M docs/system/index.rst
Log Message:
-----------
docs: Move cpu-hotplug.rst into the system manual
The cpu-hotplug.rst documentation is currently orphan and not
included in any manual; move it into the system manual.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Commit: 71266bb4e9468662d88739827c78fcb37285c643
https://github.com/qemu/qemu/commit/71266bb4e9468662d88739827c78fcb37285c643
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2020-11-23 (Mon, 23 Nov 2020)
Changed paths:
M docs/system/index.rst
A docs/system/virtio-pmem.rst
R docs/virtio-pmem.rst
Log Message:
-----------
docs: Move virtio-pmem.rst into the system manual
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Commit: c5d7cfdaace7f547fd572b50baaa7182366513e7
https://github.com/qemu/qemu/commit/c5d7cfdaace7f547fd572b50baaa7182366513e7
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2020-11-23 (Mon, 23 Nov 2020)
Changed paths:
M docs/system/virtio-pmem.rst
Log Message:
-----------
docs/system/virtio-pmem.rst: Fix minor style issues
The virtio-pmem documentation has some minor style issues we hadn't
noticed since we weren't rendering it in our docs:
* Sphinx doesn't complain about overlong title-underlining the
way it complains about too-short underlining, but it looks odd;
make the underlines of section headers the right length
* Indent of paragraphs makes them render as blockquotes;
remove the indent so they just render as normal text
* Leading 'o' isn't rst markup, so it just renders as a literal
"o"; reformat as a subsection heading instead
* "QEMU" in the document title and section headings are a bit
odd and unnecessary since this is the QEMU manual; delete
or rephrase them
* There's no need to specify what QEMU version the device first
appeared in.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Pankaj Gupta <pankaj.gupta@cloud.ionos.com>
Commit: 7f0cff6e3427d82f81243660d0035d647ee5ee05
https://github.com/qemu/qemu/commit/7f0cff6e3427d82f81243660d0035d647ee5ee05
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2020-11-23 (Mon, 23 Nov 2020)
Changed paths:
A docs/system/i386/pc.rst
M docs/system/target-i386.rst
Log Message:
-----------
docs: Split out 'pc' machine model docs into their own file
Currently target-i386.rst includes the documentation of the 'pc'
machine model inline. Split it out into its own file, in a
similar way to target-i386.rst; this gives us a place to put
documentation of other i386 machine models, such as 'microvm'.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Commit: e8eee8d3d90690b73caac6b0059ad02ed1f170e6
https://github.com/qemu/qemu/commit/e8eee8d3d90690b73caac6b0059ad02ed1f170e6
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2020-11-23 (Mon, 23 Nov 2020)
Changed paths:
R docs/microvm.rst
A docs/system/i386/microvm.rst
M docs/system/target-i386.rst
Log Message:
-----------
docs: Move microvm.rst into the system manual
Now that target-i386.rst has a place to list documentation of
machines other than the 'pc' machine, we have a place we can
move the microvm documentation to.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Commit: 0daf34fd3a18aa2a43217c320e2a39d69e52d3f4
https://github.com/qemu/qemu/commit/0daf34fd3a18aa2a43217c320e2a39d69e52d3f4
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2020-11-23 (Mon, 23 Nov 2020)
Changed paths:
R docs/pr-manager.rst
M docs/system/index.rst
A docs/system/pr-manager.rst
Log Message:
-----------
docs: Move pr-manager.rst into the system manual
Move the pr-manager documentation into the system manual.
Some of it (the documentation of the pr-manager-helper tool)
should be in tools, but we will split it up after moving it.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Commit: 773ee3f1ea50eb996cced930cc29b1b27bfbc6fa
https://github.com/qemu/qemu/commit/773ee3f1ea50eb996cced930cc29b1b27bfbc6fa
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2020-11-23 (Mon, 23 Nov 2020)
Changed paths:
M docs/meson.build
M docs/system/pr-manager.rst
M docs/tools/conf.py
M docs/tools/index.rst
A docs/tools/qemu-pr-helper.rst
Log Message:
-----------
docs: Split qemu-pr-helper documentation into tools manual
Split the documentation of the qemu-pr-helper binary into the tools
manual, and give it a manpage like our other standalone executables.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Commit: c6ff78563ad2971f289168c7cae6ecb0b4359516
https://github.com/qemu/qemu/commit/c6ff78563ad2971f289168c7cae6ecb0b4359516
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2020-11-23 (Mon, 23 Nov 2020)
Changed paths:
M docs/system/pr-manager.rst
Log Message:
-----------
docs/system/pr-manager.rst: Fix minor docs nits
Fix a couple of nits in pr-manager.rst:
* the title marker for the top level heading is overlength
* stray capital 'R' in the middle of a sentence
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Commit: 272fa7491ff782588cc9cc1449fe8ca522dd4cfd
https://github.com/qemu/qemu/commit/272fa7491ff782588cc9cc1449fe8ca522dd4cfd
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2020-11-23 (Mon, 23 Nov 2020)
Changed paths:
M MAINTAINERS
R docs/cpu-hotplug.rst
M docs/meson.build
R docs/microvm.rst
R docs/pr-manager.rst
M docs/system/arm/aspeed.rst
A docs/system/arm/raspi.rst
M docs/system/arm/xscale.rst
A docs/system/cpu-hotplug.rst
M docs/system/deprecated.rst
A docs/system/i386/microvm.rst
A docs/system/i386/pc.rst
M docs/system/index.rst
A docs/system/pr-manager.rst
M docs/system/target-arm.rst
M docs/system/target-i386.rst
A docs/system/virtio-net-failover.rst
A docs/system/virtio-pmem.rst
M docs/tools/conf.py
M docs/tools/index.rst
A docs/tools/qemu-pr-helper.rst
R docs/virtio-net-failover.rst
R docs/virtio-pmem.rst
M hw/arm/pxa2xx.c
M hw/arm/spitz.c
M hw/arm/tosa.c
M hw/intc/rx_icu.c
M linux-user/arm/cpu_loop.c
M target/arm/arm-semi.c
M target/arm/helper.c
Log Message:
-----------
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201123'
into staging
target-arm queue:
* incorporate 'orphan' rST docs into manuals
* linux-user/arm: Deliver SIGTRAP for UDF patterns used as breakpoints
* target/arm: Make SYS_HEAPINFO work with RAM that doesn't start at 0
* document raspi boards and tosa
* docs/system: Deprecate raspi2/raspi3 machine aliases
* docs/system/arm: Document OpenPOWER Witherspoon BMC model Front LEDs
* MAINTAINERS: add lines for docs files for Arm boards
* hw/intc: fix heap-buffer-overflow in rxicu_realize()
* hw/arm: Fix bad print format specifiers
* target/arm: fix stage 2 page-walks in 32-bit emulation
# gpg: Signature made Mon 23 Nov 2020 11:42:02 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
[ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20201123: (24 commits)
docs/system/pr-manager.rst: Fix minor docs nits
docs: Split qemu-pr-helper documentation into tools manual
docs: Move pr-manager.rst into the system manual
docs: Move microvm.rst into the system manual
docs: Split out 'pc' machine model docs into their own file
docs/system/virtio-pmem.rst: Fix minor style issues
docs: Move virtio-pmem.rst into the system manual
docs: Move cpu-hotplug.rst into the system manual
docs: Move virtio-net-failover.rst into the system manual
linux-user/arm: Deliver SIGTRAP for UDF patterns used as breakpoints
target/arm: Make SYS_HEAPINFO work with RAM that doesn't start at 0
docs/system/arm: Document the Sharp Zaurus SL-6000
docs/system/arm: Document OpenPOWER Witherspoon BMC model Front LEDs
docs/system/arm: Document the various raspi boards
docs/system: Deprecate raspi2/raspi3 machine aliases
MAINTAINERS: Cover system/arm/sx1.rst with OMAP machines
MAINTAINERS: Cover system/arm/sbsa.rst with SBSA-REF machine
MAINTAINERS: Fix system/arm/orangepi.rst path
MAINTAINERS: Cover system/arm/nuvoton.rst with Nuvoton NPCM7xx
MAINTAINERS: Cover system/arm/aspeed.rst with ASPEED BMC machines
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Compare: https://github.com/qemu/qemu/compare/683685e72dcc...272fa7491ff7
- [Qemu-commits] [qemu/qemu] 98e877: target/arm: fix stage 2 page-walks in 32-bit emula...,
Peter Maydell <=