[Qemu-commits] [qemu/qemu] 783181: target/m68k: fix physical address translation in m...

[Peter Maydell]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 78318119eead6aed050d1730a6b72d1c555302d2
      
https://github.com/qemu/qemu/commit/78318119eead6aed050d1730a6b72d1c555302d2
  Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
  Date:   2020-07-06 (Mon, 06 Jul 2020)

  Changed paths:
    M target/m68k/helper.c

  Log Message:
  -----------
  target/m68k: fix physical address translation in 
m68k_cpu_get_phys_page_debug()

The result of the get_physical_address() function should be combined with the
offset of the original page access before being returned. Otherwise the
m68k_cpu_get_phys_page_debug() function can round to the wrong page causing
incorrect lookups in gdbstub and various "Disassembler disagrees with
translator over instruction decoding" warnings to appear at translation time.

Fixes: 88b2fef6c3 ("target/m68k: add MC68040 MMU")
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20200701201531.13828-2-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>


  Commit: 852002b5664bf079da05c5201dbf2345b870e5ed
      
https://github.com/qemu/qemu/commit/852002b5664bf079da05c5201dbf2345b870e5ed
  Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
  Date:   2020-07-06 (Mon, 06 Jul 2020)

  Changed paths:
    M target/m68k/helper.c

  Log Message:
  -----------
  target/m68k: consolidate physical translation offset into 
get_physical_address()

Since all callers to get_physical_address() now apply the same page offset to
the translation result, move the logic into get_physical_address() itself to
avoid duplication.

Suggested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20200701201531.13828-3-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>


  Commit: d159dd058c7dc48a9291fde92eaae52a9f26a4d1
      
https://github.com/qemu/qemu/commit/d159dd058c7dc48a9291fde92eaae52a9f26a4d1
  Author: Laurent Vivier <laurent@vivier.eu>
  Date:   2020-07-06 (Mon, 06 Jul 2020)

  Changed paths:
    M include/fpu/softfloat.h

  Log Message:
  -----------
  softfloat,m68k: disable floatx80_invalid_encoding() for m68k

According to the comment, this definition of invalid encoding is given
by intel developer's manual, and doesn't comply with 680x0 FPU.

With m68k, the explicit integer bit can be zero in the case of:
 - zeros                (exp == 0, mantissa == 0)
 - denormalized numbers (exp == 0, mantissa != 0)
 - unnormalized numbers (exp != 0, exp < 0x7FFF)
 - infinities           (exp == 0x7FFF, mantissa == 0)
 - not-a-numbers        (exp == 0x7FFF, mantissa != 0)

For infinities and NaNs, the explicit integer bit can be either one or
zero.

The IEEE 754 standard does not define a zero integer bit. Such a number
is an unnormalized number. Hardware does not directly support
denormalized and unnormalized numbers, but implicitly supports them by
trapping them as unimplemented data types, allowing efficient conversion
in software.

See "M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL",
    "1.6 FLOATING-POINT DATA TYPES"

We will implement in the m68k TCG emulator the FP_UNIMP exception to
trap into the kernel to normalize the number. In case of linux-user,
the number will be normalized by QEMU.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20200612140400.2130118-1-laurent@vivier.eu>


  Commit: 48f22ad04ead83e61b4b35871ec6f6109779b791
      
https://github.com/qemu/qemu/commit/48f22ad04ead83e61b4b35871ec6f6109779b791
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2020-07-08 (Wed, 08 Jul 2020)

  Changed paths:
    M include/fpu/softfloat.h
    M target/m68k/helper.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/vivier/tags/m68k-next-pull-request' 
into staging

m68k pull-request 20200706

disable floatx80_invalid_encoding() for m68k
fix m68k_cpu_get_phys_page_debug()

# gpg: Signature made Mon 06 Jul 2020 21:05:33 BST
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" 
[full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier/tags/m68k-next-pull-request:
  softfloat,m68k: disable floatx80_invalid_encoding() for m68k
  target/m68k: consolidate physical translation offset into 
get_physical_address()
  target/m68k: fix physical address translation in 
m68k_cpu_get_phys_page_debug()

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Compare: https://github.com/qemu/qemu/compare/8796c64ecdfd...48f22ad04ead