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[Qemu-commits] [qemu/qemu] b0f7e7: tcg: Implement gvec support for rotat

From: Peter Maydell
Subject: [Qemu-commits] [qemu/qemu] b0f7e7: tcg: Implement gvec support for rotate by immediate
Date: Tue, 02 Jun 2020 12:30:28 -0700 
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: b0f7e7444c03da17e41bf327c8aea590104a28ab
      
https://github.com/qemu/qemu/commit/b0f7e7444c03da17e41bf327c8aea590104a28ab
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2020-06-02 (Tue, 02 Jun 2020)

  Changed paths:
    M accel/tcg/tcg-runtime-gvec.c
    M accel/tcg/tcg-runtime.h
    M include/tcg/tcg-op-gvec.h
    M include/tcg/tcg-op.h
    M include/tcg/tcg-opc.h
    M include/tcg/tcg.h
    M tcg/README
    M tcg/aarch64/tcg-target.h
    M tcg/i386/tcg-target.h
    M tcg/ppc/tcg-target.h
    M tcg/tcg-op-gvec.c
    M tcg/tcg-op-vec.c
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Implement gvec support for rotate by immediate

No host backend support yet, but the interfaces for rotli
are in place.  Canonicalize immediate rotate to the left,
based on a survey of architectures, but provide both left
and right shift interfaces to the translators.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 5d0ceda902915e3f0e21c39d142c92c4e97c3ebb
      
https://github.com/qemu/qemu/commit/5d0ceda902915e3f0e21c39d142c92c4e97c3ebb
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2020-06-02 (Tue, 02 Jun 2020)

  Changed paths:
    M accel/tcg/tcg-runtime-gvec.c
    M accel/tcg/tcg-runtime.h
    M include/tcg/tcg-op-gvec.h
    M include/tcg/tcg-op.h
    M include/tcg/tcg-opc.h
    M include/tcg/tcg.h
    M tcg/README
    M tcg/aarch64/tcg-target.h
    M tcg/i386/tcg-target.h
    M tcg/ppc/tcg-target.h
    M tcg/tcg-op-gvec.c
    M tcg/tcg-op-vec.c
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Implement gvec support for rotate by vector

No host backend support yet, but the interfaces for rotlv
and rotrv are in place.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
v3: Drop the generic expansion from rot to shift; we can do better
    for each backend, and then this code becomes unused.


  Commit: 3d5bb2ea5cc9ed54f65a6929a6e6baa01cabd98b
      
https://github.com/qemu/qemu/commit/3d5bb2ea5cc9ed54f65a6929a6e6baa01cabd98b
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2020-06-02 (Tue, 02 Jun 2020)

  Changed paths:
    M tcg/tcg-op-vec.c

  Log Message:
  -----------
  tcg: Remove expansion to shift by vector from do_shifts

We do not reflect this expansion in tcg_can_emit_vecop_list,
so it is unused and unusable.  However, we actually perform
the same expansion in do_gvec_shifts, so it is also unneeded.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 23850a74afb641102325b4b7f74071d929fc4594
      
https://github.com/qemu/qemu/commit/23850a74afb641102325b4b7f74071d929fc4594
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2020-06-02 (Tue, 02 Jun 2020)

  Changed paths:
    M include/tcg/tcg-op-gvec.h
    M include/tcg/tcg-op.h
    M include/tcg/tcg-opc.h
    M include/tcg/tcg.h
    M tcg/aarch64/tcg-target.h
    M tcg/i386/tcg-target.h
    M tcg/ppc/tcg-target.h
    M tcg/tcg-op-gvec.c
    M tcg/tcg-op-vec.c
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Implement gvec support for rotate by scalar

No host backend support yet, but the interfaces for rotls
are in place.  Only implement left-rotate for now, as the
only known use of vector rotate by scalar is s390x, so any
right-rotate would be unused and untestable.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 885b1706df6f0211a22e120fac910fb3abf3e733
      
https://github.com/qemu/qemu/commit/885b1706df6f0211a22e120fac910fb3abf3e733
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2020-06-02 (Tue, 02 Jun 2020)

  Changed paths:
    M tcg/i386/tcg-target.inc.c

  Log Message:
  -----------
  tcg/i386: Implement INDEX_op_rotl{i,s,v}_vec

For immediates, we must continue the special casing of 8-bit
elements.  The other element sizes and shift types are trivially
implemented with shifts.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 7cff8988fade36f20659aad80f2f763ff054ef48
      
https://github.com/qemu/qemu/commit/7cff8988fade36f20659aad80f2f763ff054ef48
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2020-06-02 (Tue, 02 Jun 2020)

  Changed paths:
    M tcg/aarch64/tcg-target.inc.c
    M tcg/aarch64/tcg-target.opc.h

  Log Message:
  -----------
  tcg/aarch64: Implement INDEX_op_rotl{i,v}_vec

For immediate rotate , we can implement this in two instructions,
using SLI.  For variable rotate, the oddness of aarch64 right-shift-
as-negative-left-shift means a backend-specific expansion works best.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: ab87a66fa276b61f1d6adbc9271988e42bdf4c1e
      
https://github.com/qemu/qemu/commit/ab87a66fa276b61f1d6adbc9271988e42bdf4c1e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2020-06-02 (Tue, 02 Jun 2020)

  Changed paths:
    M tcg/ppc/tcg-target.h
    M tcg/ppc/tcg-target.inc.c
    M tcg/ppc/tcg-target.opc.h

  Log Message:
  -----------
  tcg/ppc: Implement INDEX_op_rot[lr]v_vec

We already had support for rotlv, using a target-specific opcode;
convert to use the generic opcode.  Handle rotrv via simple negation.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 3e114acc9136dd7300324673a6e589ecc51f28cc
      
https://github.com/qemu/qemu/commit/3e114acc9136dd7300324673a6e589ecc51f28cc
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2020-06-02 (Tue, 02 Jun 2020)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.inc.c

  Log Message:
  -----------
  target/ppc: Use tcg_gen_gvec_rotlv

Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: cea94ba36d858166fdf749f9894573449c3dafa6
      
https://github.com/qemu/qemu/commit/cea94ba36d858166fdf749f9894573449c3dafa6
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2020-06-02 (Tue, 02 Jun 2020)

  Changed paths:
    M target/s390x/helper.h
    M target/s390x/insn-data.def
    M target/s390x/translate_vx.inc.c
    M target/s390x/vec_int_helper.c

  Log Message:
  -----------
  target/s390x: Use tcg_gen_gvec_rotl{i,s,v}

Merge VERLL and VERLLV into op_vesv and op_ves, alongside
all of the other vector shift operations.

Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 61f15c487fc2aea14f6b0e52c459ae8b7d252a65
      
https://github.com/qemu/qemu/commit/61f15c487fc2aea14f6b0e52c459ae8b7d252a65
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2020-06-02 (Tue, 02 Jun 2020)

  Changed paths:
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Improve move ops in liveness_pass_2

If the output of the move is dead, then the last use is in
the store.  If we propagate the input to the store, then we
can remove the move opcode entirely.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 853d9a4be8c281547797249dd0d329d807fc7fd7
      
https://github.com/qemu/qemu/commit/853d9a4be8c281547797249dd0d329d807fc7fd7
  Author: Nick Hudson <skrll@netbsd.org>
  Date:   2020-06-02 (Tue, 02 Jun 2020)

  Changed paths:
    M accel/tcg/user-exec.c

  Log Message:
  -----------
  accel/tcg: Adjust cpu_signal_handler for NetBSD/arm

Fix building on NetBSD/arm by extracting the FSR value from the
correct siginfo_t field.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Nick Hudson <skrll@netbsd.org>
Message-Id: <20200516154147.24842-1-skrll@netbsd.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 71b04329c4f7d5824a289ca5225e1883a278cf3b
      
https://github.com/qemu/qemu/commit/71b04329c4f7d5824a289ca5225e1883a278cf3b
  Author: Nick Hudson <skrll@netbsd.org>
  Date:   2020-06-02 (Tue, 02 Jun 2020)

  Changed paths:
    M accel/tcg/user-exec.c

  Log Message:
  -----------
  accel/tcg: Provide a NetBSD specific aarch64 cpu_signal_handler

Fix qemu build on NetBSD/evbarm-aarch64 by providing a NetBSD specific
cpu_signal_handler.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Nick Hudson <skrll@netbsd.org>
Message-Id: <20200517101529.5367-1-skrll@netbsd.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 5cc7a54c2e91d82cb6a52e4921325c511fd90712
      
https://github.com/qemu/qemu/commit/5cc7a54c2e91d82cb6a52e4921325c511fd90712
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2020-06-02 (Tue, 02 Jun 2020)

  Changed paths:
    M accel/tcg/tcg-runtime-gvec.c
    M accel/tcg/tcg-runtime.h
    M accel/tcg/user-exec.c
    M include/tcg/tcg-op-gvec.h
    M include/tcg/tcg-op.h
    M include/tcg/tcg-opc.h
    M include/tcg/tcg.h
    M target/ppc/helper.h
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.inc.c
    M target/s390x/helper.h
    M target/s390x/insn-data.def
    M target/s390x/translate_vx.inc.c
    M target/s390x/vec_int_helper.c
    M tcg/README
    M tcg/aarch64/tcg-target.h
    M tcg/aarch64/tcg-target.inc.c
    M tcg/aarch64/tcg-target.opc.h
    M tcg/i386/tcg-target.h
    M tcg/i386/tcg-target.inc.c
    M tcg/ppc/tcg-target.h
    M tcg/ppc/tcg-target.inc.c
    M tcg/ppc/tcg-target.opc.h
    M tcg/tcg-op-gvec.c
    M tcg/tcg-op-vec.c
    M tcg/tcg.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20200602' into staging

Vector rotate support
Signal handling support for NetBSD arm/aarch64

# gpg: Signature made Tue 02 Jun 2020 17:43:05 BST
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" 
[full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-tcg-20200602:
  accel/tcg: Provide a NetBSD specific aarch64 cpu_signal_handler
  accel/tcg: Adjust cpu_signal_handler for NetBSD/arm
  tcg: Improve move ops in liveness_pass_2
  target/s390x: Use tcg_gen_gvec_rotl{i,s,v}
  target/ppc: Use tcg_gen_gvec_rotlv
  tcg/ppc: Implement INDEX_op_rot[lr]v_vec
  tcg/aarch64: Implement INDEX_op_rotl{i,v}_vec
  tcg/i386: Implement INDEX_op_rotl{i,s,v}_vec
  tcg: Implement gvec support for rotate by scalar
  tcg: Remove expansion to shift by vector from do_shifts
  tcg: Implement gvec support for rotate by vector
  tcg: Implement gvec support for rotate by immediate

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Compare: https://github.com/qemu/qemu/compare/98d59d5dd8b6...5cc7a54c2e91
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