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[Qemu-commits] [qemu/qemu] 56c2c5: tests/acceptance: Add a test for the
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From: |
Peter Maydell |
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Subject: |
[Qemu-commits] [qemu/qemu] 56c2c5: tests/acceptance: Add a test for the canon-a1100 m... |
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Date: |
Fri, 22 May 2020 04:15:30 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 56c2c59252deb5676f63faf69a1b5fb97372b551
https://github.com/qemu/qemu/commit/56c2c59252deb5676f63faf69a1b5fb97372b551
Author: Thomas Huth <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M MAINTAINERS
A tests/acceptance/machine_arm_canona1100.py
Log Message:
-----------
tests/acceptance: Add a test for the canon-a1100 machine
The canon-a1100 machine can be used with the Barebox firmware. The
QEMU Advent Calendar 2018 features a pre-compiled image which we
can use for testing.
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Wainer dos Santos Moschetta <address@hidden>
Tested-by: Wainer dos Santos Moschetta <address@hidden>
Signed-off-by: Thomas Huth <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
Message-Id: <address@hidden>
[PMD: Rebased MAINTAINERS]
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: fc68b1c6755c467e256202a2eed7c145c7b4581e
https://github.com/qemu/qemu/commit/fc68b1c6755c467e256202a2eed7c145c7b4581e
Author: Peter Maydell <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M docs/system/arm/integratorcp.rst
Log Message:
-----------
docs/system: Add 'Arm' to the Integrator/CP document title
Add 'Arm' to the Integrator/CP document title, for consistency with
the titling of the other documentation of Arm devboard models
(versatile, realview).
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Commit: b6e50ad0dbda699a2511861d84e313c756baded8
https://github.com/qemu/qemu/commit/b6e50ad0dbda699a2511861d84e313c756baded8
Author: Peter Maydell <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M docs/system/target-arm.rst
Log Message:
-----------
docs/system: Sort Arm board index into alphabetical order
Sort the board index into alphabetical order. (Note that we need to
sort alphabetically by the title text of each file, which isn't the
same ordering as sorting by the filename.)
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Commit: 5a1d424487992613582e8ed3d3070833f155cf75
https://github.com/qemu/qemu/commit/5a1d424487992613582e8ed3d3070833f155cf75
Author: Peter Maydell <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M MAINTAINERS
A docs/system/arm/vexpress.rst
M docs/system/target-arm.rst
Log Message:
-----------
docs/system: Document Arm Versatile Express boards
Provide a minimal documentation of the Versatile Express boards
(vexpress-a9, vexpress-a15).
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Commit: ba7912a55ae836019a97f0f192222616388fb154
https://github.com/qemu/qemu/commit/ba7912a55ae836019a97f0f192222616388fb154
Author: Peter Maydell <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M MAINTAINERS
A docs/system/arm/mps2.rst
M docs/system/target-arm.rst
Log Message:
-----------
docs/system: Document the various MPS2 models
Add basic documentation of the MPS2 board models.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Commit: 9f8f640eae8a875fa302d64748985bf21dc7f907
https://github.com/qemu/qemu/commit/9f8f640eae8a875fa302d64748985bf21dc7f907
Author: Peter Maydell <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M MAINTAINERS
A docs/system/arm/musca.rst
M docs/system/target-arm.rst
Log Message:
-----------
docs/system: Document Musca boards
Provide a minimal documentation of the Musca boards.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Commit: 13a0c21e64bddf1a3659d30b2b6e95529f9047ed
https://github.com/qemu/qemu/commit/13a0c21e64bddf1a3659d30b2b6e95529f9047ed
Author: Peter Maydell <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M linux-user/arm/cpu_loop.c
Log Message:
-----------
linux-user/arm: BKPT should cause SIGTRAP, not be a syscall
In linux-user/arm/cpu-loop.c we incorrectly treat EXCP_BKPT similarly
to EXCP_SWI, which means that if the guest executes a BKPT insn then
QEMU will perform a syscall for it (which syscall depends on what
value happens to be in r7...). The correct behaviour is that the
guest process should take a SIGTRAP.
This code has been like this (more or less) since commit
06c949e62a098f in 2006 which added BKPT in the first place. This is
probably because at the time the same code path was used to handle
both Linux syscalls and semihosting calls, and (on M profile) BKPT
with a suitable magic number is used for semihosting calls. But
these days we've moved handling of semihosting out to an entirely
different codepath, so we can fix this bug by simply removing this
handling of EXCP_BKPT and instead making it deliver a SIGTRAP like
EXCP_DEBUG (as we do already on aarch64).
Reported-by: <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Fixes: https://bugs.launchpad.net/qemu/+bug/1873898
Signed-off-by: Peter Maydell <address@hidden>
Commit: 62f141a426d27c15555714a2c2967045b43d9a4a
https://github.com/qemu/qemu/commit/62f141a426d27c15555714a2c2967045b43d9a4a
Author: Peter Maydell <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M linux-user/arm/cpu_loop.c
Log Message:
-----------
linux-user/arm: Remove bogus SVC 0xf0002 handling
We incorrectly treat SVC 0xf0002 as a cacheflush request (which is a
NOP for QEMU). This is the wrong syscall number, because in the
svc-immediate OABI syscall numbers are all offset by the
ARM_SYSCALL_BASE value and so the correct insn is SVC 0x9f0002.
(This is handled further down in the code with the other Arm-specific
syscalls like NR_breakpoint.)
When this code was initially added in commit 6f1f31c069b20611 in
2004, ARM_NR_cacheflush was defined as (ARM_SYSCALL_BASE + 0xf0000 + 2)
so the value in the comparison took account of the extra 0x900000
offset. In commit fbb4a2e371f2fa7 in 2008, the ARM_SYSCALL_BASE
was removed from the definition of ARM_NR_cacheflush and handling
for this group of syscalls was added below the point where we subtract
ARM_SYSCALL_BASE from the SVC immediate value. However that commit
forgot to remove the now-obsolete earlier handling code.
Remove the spurious ARM_NR_cacheflush condition.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>
Message-id: address@hidden
Commit: ab546bd23856866411ff1b2ffaedabdc360e69df
https://github.com/qemu/qemu/commit/ab546bd23856866411ff1b2ffaedabdc360e69df
Author: Peter Maydell <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M linux-user/arm/cpu_loop.c
Log Message:
-----------
linux-user/arm: Handle invalid arm-specific syscalls correctly
The kernel has different handling for syscalls with invalid
numbers that are in the "arm-specific" range 0x9f0000 and up:
* 0x9f0000..0x9f07ff return -ENOSYS if not implemented
* other out of range syscalls cause a SIGILL
(see the kernel's arch/arm/kernel/traps.c:arm_syscall())
Implement this distinction. (Note that our code doesn't look
quite like the kernel's, because we have removed the
0x900000 prefix by this point, whereas the kernel retains
it in arm_syscall().)
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
Commit: 3986a1721e10aebe0dc2c17f262ebf067e7414df
https://github.com/qemu/qemu/commit/3986a1721e10aebe0dc2c17f262ebf067e7414df
Author: Peter Maydell <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M linux-user/arm/cpu_loop.c
Log Message:
-----------
linux-user/arm: Fix identification of syscall numbers
Our code to identify syscall numbers has some issues:
* for Thumb mode, we never need the immediate value from the insn,
but we always read it anyway
* bad immediate values in the svc insn should cause a SIGILL, but we
were abort()ing instead (via "goto error")
We can fix both these things by refactoring the code that identifies
the syscall number to more closely follow the kernel COMPAT_OABI code:
* for Thumb it is always r7
* for Arm, if the immediate value is 0, then this is an EABI call
with the syscall number in r7
* otherwise, we XOR the immediate value with 0x900000
(ARM_SYSCALL_BASE for QEMU; __NR_OABI_SYSCALL_BASE in the kernel),
which converts valid syscall immediates into the desired value,
and puts all invalid immediates in the range 0x100000 or above
* then we can just let the existing "value too large, deliver
SIGILL" case handle invalid numbers, and drop the 'goto error'
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>
Message-id: address@hidden
Commit: ef81aa68a708ba5162e1d5fa8d98171ac1059e2d
https://github.com/qemu/qemu/commit/ef81aa68a708ba5162e1d5fa8d98171ac1059e2d
Author: Peter Maydell <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M target/arm/translate.c
Log Message:
-----------
target/arm: Remove unused GEN_NEON_INTEGER_OP macro
The GEN_NEON_INTEGER_OP macro is no longer used; remove it.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 37f95959c730ff29f58c85b7a98f0b825933bee1
https://github.com/qemu/qemu/commit/37f95959c730ff29f58c85b7a98f0b825933bee1
Author: Guenter Roeck <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M MAINTAINERS
M hw/arm/Kconfig
M hw/misc/Makefile.objs
R hw/misc/imx2_wdt.c
M hw/watchdog/Kconfig
M hw/watchdog/Makefile.objs
A hw/watchdog/wdt_imx2.c
M include/hw/arm/fsl-imx6.h
M include/hw/arm/fsl-imx6ul.h
M include/hw/arm/fsl-imx7.h
R include/hw/misc/imx2_wdt.h
A include/hw/watchdog/wdt_imx2.h
Log Message:
-----------
hw: Move i.MX watchdog driver to hw/watchdog
In preparation for a full implementation, move i.MX watchdog driver
from hw/misc to hw/watchdog. While at it, add the watchdog files
to MAINTAINERS.
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Guenter Roeck <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: daca13d495a11945c22d2aa68ad28dc5c8180911
https://github.com/qemu/qemu/commit/daca13d495a11945c22d2aa68ad28dc5c8180911
Author: Guenter Roeck <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M hw/watchdog/wdt_imx2.c
M include/hw/watchdog/wdt_imx2.h
Log Message:
-----------
hw/watchdog: Implement full i.MX watchdog support
Implement full support for the watchdog in i.MX systems.
Pretimeout support is optional because the watchdog hardware
on i.MX31 does not support pretimeouts.
Signed-off-by: Guenter Roeck <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
[PMM: added Property array terminator entry]
Reviewed-by: Peter Maydell <address@hidden>
Commit: 4f0aff00f964721f8a5917240abbf23d9918069b
https://github.com/qemu/qemu/commit/4f0aff00f964721f8a5917240abbf23d9918069b
Author: Guenter Roeck <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M hw/arm/Kconfig
M hw/arm/fsl-imx25.c
M include/hw/arm/fsl-imx25.h
Log Message:
-----------
hw/arm/fsl-imx25: Wire up watchdog
With this commit, the watchdog on imx25-pdk is fully operational,
including pretimeout support.
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Guenter Roeck <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: b9e521dda3e6f8246d9ca3285ca372462e94c6d1
https://github.com/qemu/qemu/commit/b9e521dda3e6f8246d9ca3285ca372462e94c6d1
Author: Guenter Roeck <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M hw/arm/Kconfig
M hw/arm/fsl-imx31.c
M include/hw/arm/fsl-imx31.h
Log Message:
-----------
hw/arm/fsl-imx31: Wire up watchdog
With this patch, the watchdog on i.MX31 emulations is fully operational.
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Guenter Roeck <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: bd8045a7044acd78ea5102404a9c16403933ce01
https://github.com/qemu/qemu/commit/bd8045a7044acd78ea5102404a9c16403933ce01
Author: Guenter Roeck <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M hw/arm/fsl-imx6.c
Log Message:
-----------
hw/arm/fsl-imx6: Connect watchdog interrupts
With this patch applied, the watchdog in the sabrelite emulation
is fully operational, including pretimeout support.
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Guenter Roeck <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 5671e960e2d8ea83405fe408b6b613f20985f87e
https://github.com/qemu/qemu/commit/5671e960e2d8ea83405fe408b6b613f20985f87e
Author: Guenter Roeck <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M hw/arm/fsl-imx6ul.c
Log Message:
-----------
hw/arm/fsl-imx6ul: Connect watchdog interrupts
With this commit, the watchdog on mcimx6ul-evk is fully operational,
including pretimeout support.
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Guenter Roeck <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 72465e1ebaa6c850dbc099c6bb301d548bfea92b
https://github.com/qemu/qemu/commit/72465e1ebaa6c850dbc099c6bb301d548bfea92b
Author: Guenter Roeck <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M hw/arm/fsl-imx7.c
M include/hw/arm/fsl-imx7.h
Log Message:
-----------
hw/arm/fsl-imx7: Instantiate various unimplemented devices
Instantiating PWM, CAN, CAAM, and OCOTP devices is necessary to avoid
crashes when booting mainline Linux.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Guenter Roeck <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: c4947e64efcd8abeb6fde4bcd983f7f022c0e9f5
https://github.com/qemu/qemu/commit/c4947e64efcd8abeb6fde4bcd983f7f022c0e9f5
Author: Guenter Roeck <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M hw/arm/fsl-imx7.c
M include/hw/arm/fsl-imx7.h
Log Message:
-----------
hw/arm/fsl-imx7: Connect watchdog interrupts
i.MX7 supports watchdog pretimeout interupts. With this commit,
the watchdog in mcimx7d-sabre is fully operational, including
pretimeout support.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Guenter Roeck <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 9904625f1b54190bc6d9c098c2e0d969e67014cf
https://github.com/qemu/qemu/commit/9904625f1b54190bc6d9c098c2e0d969e67014cf
Author: Philippe Mathieu-Daudé <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M hw/arm/integratorcp.c
Log Message:
-----------
hw/arm/integratorcp: Replace hw_error() by qemu_log_mask()
hw_error() calls exit(). This a bit overkill when we can log
the accesses as unimplemented or guest error.
When fuzzing the devices, we don't want the whole process to
exit. Replace some hw_error() calls by qemu_log_mask().
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 5a0001ec7e0a446b6da86da8ca03211aab0fcd08
https://github.com/qemu/qemu/commit/5a0001ec7e0a446b6da86da8ca03211aab0fcd08
Author: Philippe Mathieu-Daudé <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M hw/arm/pxa2xx_gpio.c
M hw/display/pxa2xx_lcd.c
M hw/dma/pxa2xx_dma.c
Log Message:
-----------
hw/arm/pxa2xx: Replace hw_error() by qemu_log_mask()
hw_error() calls exit(). This a bit overkill when we can log
the accesses as unimplemented or guest error.
When fuzzing the devices, we don't want the whole process to
exit. Replace some hw_error() calls by qemu_log_mask().
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 492edf3e3038760aa6b7eb6a9bfdb648d4fa9b80
https://github.com/qemu/qemu/commit/492edf3e3038760aa6b7eb6a9bfdb648d4fa9b80
Author: Philippe Mathieu-Daudé <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M hw/char/xilinx_uartlite.c
Log Message:
-----------
hw/char/xilinx_uartlite: Replace hw_error() by qemu_log_mask()
hw_error() calls exit(). This a bit overkill when we can log
the accesses as unimplemented or guest error.
When fuzzing the devices, we don't want the whole process to
exit. Replace some hw_error() calls by qemu_log_mask().
Reviewed-by: Edgar E. Iglesias <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: a50fe66846d1d02065265f1e54c2b0007f8cb609
https://github.com/qemu/qemu/commit/a50fe66846d1d02065265f1e54c2b0007f8cb609
Author: Philippe Mathieu-Daudé <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M hw/timer/exynos4210_mct.c
Log Message:
-----------
hw/timer/exynos4210_mct: Replace hw_error() by qemu_log_mask()
hw_error() calls exit(). This a bit overkill when we can log
the accesses as unimplemented or guest error.
When fuzzing the devices, we don't want the whole process to
exit. Replace some hw_error() calls by qemu_log_mask().
Per the datasheet "Exynos 4412 RISC Microprocessor Rev 1.00"
Chapter 25 "Multi Core Timer (MCT)" figure 1 and table 4,
the default value on the APB bus is 0.
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: faf58e53695be8eedc47b6232d581d37461d0f6e
https://github.com/qemu/qemu/commit/faf58e53695be8eedc47b6232d581d37461d0f6e
Author: Geert Uytterhoeven <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M hw/gpio/pl061.c
Log Message:
-----------
ARM: PL061: Introduce N_GPIOS
Add a definition for the number of GPIO lines controlled by a PL061
instance, and use it instead of the hardcoded magic value 8.
Suggested-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Geert Uytterhoeven <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 5c27392dd08bd8534893abf25ef501f1bd8680fe
https://github.com/qemu/qemu/commit/5c27392dd08bd8534893abf25ef501f1bd8680fe
Author: Richard Henderson <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M target/arm/translate-a64.c
Log Message:
-----------
target/arm: Use tcg_gen_gvec_mov for clear_vec_high
The 8-byte store for the end a !is_q operation can be
merged with the other stores. Use a no-op vector move
to trigger the expand_clr portion of tcg_gen_gvec_mov.
Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: e1f778596ebfa8782276f4dd4651f2b285d734ff
https://github.com/qemu/qemu/commit/e1f778596ebfa8782276f4dd4651f2b285d734ff
Author: Richard Henderson <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M target/arm/translate-a64.c
Log Message:
-----------
target/arm: Use clear_vec_high more effectively
Do not explicitly store zero to the NEON high part
when we can pass !is_q to clear_vec_high.
Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 268b1b3dfbb92a9348406f728a33f39e3d8dcd8a
https://github.com/qemu/qemu/commit/268b1b3dfbb92a9348406f728a33f39e3d8dcd8a
Author: Peter Maydell <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M linux-user/arm/signal.c
M target/arm/cpu.h
Log Message:
-----------
target/arm: Allow user-mode code to write CPSR.E via MSR
Using the MSR instruction to write to CPSR.E is deprecated, but it is
required to work from any mode including unprivileged code. We were
incorrectly forbidding usermode code from writing it because
CPSR_USER did not include the CPSR_E bit.
We use CPSR_USER in only three places:
* as the mask of what to allow userspace MSR to write to CPSR
* when deciding what bits a linux-user signal-return should be
able to write from the sigcontext structure
* in target_user_copy_regs() when we set up the initial
registers for the linux-user process
In the first two cases not being able to update CPSR.E is a bug, and
in the third case it doesn't matter because CPSR.E is always 0 there.
So we can fix both bugs by adding CPSR_E to CPSR_USER.
Because the cpsr_write() in restore_sigcontext() is now changing
a CPSR bit which is cached in hflags, we need to add an
arm_rebuild_hflags() call there; the callsite in
target_user_copy_regs() was already rebuilding hflags for other
reasons.
(The recommended way to change CPSR.E is to use the 'SETEND'
instruction, which we do correctly allow from usermode code.)
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Commit: 45e2813964b135a11e0fb6371d2c5f48d901929e
https://github.com/qemu/qemu/commit/45e2813964b135a11e0fb6371d2c5f48d901929e
Author: Amanieu d'Antras <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M linux-user/arm/signal.c
Log Message:
-----------
linux-user/arm: Reset CPSR_E when entering a signal handler
This fixes signal handlers running with the wrong endianness if the
interrupted code used SETEND to dynamically switch endianness.
Signed-off-by: Amanieu d'Antras <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: fafe7229272f39500c14845bc7ea60a8504a5a20
https://github.com/qemu/qemu/commit/fafe7229272f39500c14845bc7ea60a8504a5a20
Author: Peter Maydell <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M linux-user/arm/signal.c
Log Message:
-----------
linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32
The Arm signal-handling code has some parts ifdeffed with a
TARGET_CONFIG_CPU_32, which is always defined. This is a leftover
from when this code's structure was based on the Linux kernel
signal handling code, where it was intended to support 26-bit
Arm CPUs. The kernel dropped its CONFIG_CPU_32 in kernel commit
4da8b8208eded0ba21e3 in 2009.
QEMU has never had 26-bit CPU support and is unlikely to ever
add it; we certainly aren't going to support 26-bit Linux
binaries via linux-user mode. The ifdef is just unhelpful
noise, so remove it entirely.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Commit: d19f1ab0de8b763159513e3eaa12c5bc68122361
https://github.com/qemu/qemu/commit/d19f1ab0de8b763159513e3eaa12c5bc68122361
Author: Peter Maydell <address@hidden>
Date: 2020-05-21 (Thu, 21 May 2020)
Changed paths:
M MAINTAINERS
M docs/system/arm/integratorcp.rst
A docs/system/arm/mps2.rst
A docs/system/arm/musca.rst
A docs/system/arm/vexpress.rst
M docs/system/target-arm.rst
M hw/arm/Kconfig
M hw/arm/fsl-imx25.c
M hw/arm/fsl-imx31.c
M hw/arm/fsl-imx6.c
M hw/arm/fsl-imx6ul.c
M hw/arm/fsl-imx7.c
M hw/arm/integratorcp.c
M hw/arm/pxa2xx_gpio.c
M hw/char/xilinx_uartlite.c
M hw/display/pxa2xx_lcd.c
M hw/dma/pxa2xx_dma.c
M hw/gpio/pl061.c
M hw/misc/Makefile.objs
R hw/misc/imx2_wdt.c
M hw/timer/exynos4210_mct.c
M hw/watchdog/Kconfig
M hw/watchdog/Makefile.objs
A hw/watchdog/wdt_imx2.c
M include/hw/arm/fsl-imx25.h
M include/hw/arm/fsl-imx31.h
M include/hw/arm/fsl-imx6.h
M include/hw/arm/fsl-imx6ul.h
M include/hw/arm/fsl-imx7.h
R include/hw/misc/imx2_wdt.h
A include/hw/watchdog/wdt_imx2.h
M linux-user/arm/cpu_loop.c
M linux-user/arm/signal.c
M target/arm/cpu.h
M target/arm/translate-a64.c
M target/arm/translate.c
A tests/acceptance/machine_arm_canona1100.py
Log Message:
-----------
Merge remote-tracking branch
'remotes/pmaydell/tags/pull-target-arm-20200521-1' into staging
target-arm queue:
* tests/acceptance: Add a test for the canon-a1100 machine
* docs/system: Document some of the Arm development boards
* linux-user: make BKPT insn cause SIGTRAP, not be a syscall
* target/arm: Remove unused GEN_NEON_INTEGER_OP macro
* fsl-imx25, fsl-imx31, fsl-imx6, fsl-imx6ul, fsl-imx7: implement watchdog
* hw/arm: Use qemu_log_mask() instead of hw_error() in various places
* ARM: PL061: Introduce N_GPIOS
* target/arm: Improve clear_vec_high() usage
* target/arm: Allow user-mode code to write CPSR.E via MSR
* linux-user/arm: Reset CPSR_E when entering a signal handler
* linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32
# gpg: Signature made Thu 21 May 2020 22:05:48 BST
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "address@hidden"
# gpg: Good signature from "Peter Maydell <address@hidden>" [ultimate]
# gpg: aka "Peter Maydell <address@hidden>" [ultimate]
# gpg: aka "Peter Maydell <address@hidden>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20200521-1: (29 commits)
linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32
linux-user/arm: Reset CPSR_E when entering a signal handler
target/arm: Allow user-mode code to write CPSR.E via MSR
target/arm: Use clear_vec_high more effectively
target/arm: Use tcg_gen_gvec_mov for clear_vec_high
ARM: PL061: Introduce N_GPIOS
hw/timer/exynos4210_mct: Replace hw_error() by qemu_log_mask()
hw/char/xilinx_uartlite: Replace hw_error() by qemu_log_mask()
hw/arm/pxa2xx: Replace hw_error() by qemu_log_mask()
hw/arm/integratorcp: Replace hw_error() by qemu_log_mask()
hw/arm/fsl-imx7: Connect watchdog interrupts
hw/arm/fsl-imx7: Instantiate various unimplemented devices
hw/arm/fsl-imx6ul: Connect watchdog interrupts
hw/arm/fsl-imx6: Connect watchdog interrupts
hw/arm/fsl-imx31: Wire up watchdog
hw/arm/fsl-imx25: Wire up watchdog
hw/watchdog: Implement full i.MX watchdog support
hw: Move i.MX watchdog driver to hw/watchdog
target/arm: Remove unused GEN_NEON_INTEGER_OP macro
linux-user/arm: Fix identification of syscall numbers
...
Signed-off-by: Peter Maydell <address@hidden>
Compare: https://github.com/qemu/qemu/compare/ae3aa5da96f4...d19f1ab0de8b
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