[Qemu-commits] [qemu/qemu] 0e404d: riscv/virt: Add syscon reboot and poweroff DT nodes

[Peter Maydell]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 0e404da00737eaa69204e7f3446b85b57d397e4a
      
https://github.com/qemu/qemu/commit/0e404da00737eaa69204e7f3446b85b57d397e4a
  Author: Anup Patel <address@hidden>
  Date:   2020-02-10 (Mon, 10 Feb 2020)

  Changed paths:
    M hw/riscv/virt.c

  Log Message:
  -----------
  riscv/virt: Add syscon reboot and poweroff DT nodes

The SiFive test device found on virt machine can be used by
generic syscon reboot and poweroff drivers available in Linux
kernel.

This patch updates FDT generation in virt machine so that
Linux kernel can probe and use generic syscon drivers.

Signed-off-by: Anup Patel <address@hidden>
Reviewed-by: Palmer Dabbelt <address@hidden>
Signed-off-by: Palmer Dabbelt <address@hidden>


  Commit: ae4a70c07196b76a67b772318b714ce910e10004
      
https://github.com/qemu/qemu/commit/ae4a70c07196b76a67b772318b714ce910e10004
  Author: Keith Packard <address@hidden>
  Date:   2020-02-10 (Mon, 10 Feb 2020)

  Changed paths:
    M configure
    M target/riscv/gdbstub.c

  Log Message:
  -----------
  riscv: Separate FPU register size from core register size in gdbstub [v2]

The size of the FPU registers is dictated by the 'f' and 'd' features,
not the core processor register size. Processors with the 'd' feature
have 64-bit FPU registers. Processors without the 'd' feature but with
the 'f' feature have 32-bit FPU registers.

Signed-off-by: Keith Packard <address@hidden>
[Palmer: This requires manually triggering a rebuild of
riscv32-softmmu/gdbstub-xml.c]
Signed-off-by: Palmer Dabbelt <address@hidden>


  Commit: 9a5b40b84279d60c0d93e5bb174fc9b49f901c91
      
https://github.com/qemu/qemu/commit/9a5b40b84279d60c0d93e5bb174fc9b49f901c91
  Author: Anup Patel <address@hidden>
  Date:   2020-02-10 (Mon, 10 Feb 2020)

  Changed paths:
    M hw/rtc/Kconfig
    M hw/rtc/Makefile.objs
    A hw/rtc/goldfish_rtc.c
    M hw/rtc/trace-events
    A include/hw/rtc/goldfish_rtc.h

  Log Message:
  -----------
  hw: rtc: Add Goldfish RTC device

This patch adds model for Google Goldfish virtual platform RTC device.

We will be adding Goldfish RTC device to the QEMU RISC-V virt machine
for providing real date-time to Guest Linux. The corresponding Linux
driver for Goldfish RTC device is already available in upstream Linux.

For now, VM migration support is available but untested for Goldfish RTC
device. It will be hardened in-future when we implement VM migration for
KVM RISC-V.

Signed-off-by: Anup Patel <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Palmer Dabbelt <address@hidden>


  Commit: 67b5ef30492b11c2a0f061b47773e45d87109a17
      
https://github.com/qemu/qemu/commit/67b5ef30492b11c2a0f061b47773e45d87109a17
  Author: Anup Patel <address@hidden>
  Date:   2020-02-10 (Mon, 10 Feb 2020)

  Changed paths:
    M hw/riscv/Kconfig
    M hw/riscv/virt.c
    M include/hw/riscv/virt.h

  Log Message:
  -----------
  riscv: virt: Use Goldfish RTC device

We extend QEMU RISC-V virt machine by adding Goldfish RTC device
to it. This will allow Guest Linux to sync it's local date/time
with Host date/time via RTC device.

Signed-off-by: Anup Patel <address@hidden>
Reviewed-by: Palmer Dabbelt <address@hidden>
Acked-by: Palmer Dabbelt <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Palmer Dabbelt <address@hidden>


  Commit: 9c8fdcece53e05590441785ab22d91a22da36e29
      
https://github.com/qemu/qemu/commit/9c8fdcece53e05590441785ab22d91a22da36e29
  Author: Anup Patel <address@hidden>
  Date:   2020-02-10 (Mon, 10 Feb 2020)

  Changed paths:
    M MAINTAINERS

  Log Message:
  -----------
  MAINTAINERS: Add maintainer entry for Goldfish RTC

Add myself as Goldfish RTC maintainer until someone else is
willing to maintain it.

Signed-off-by: Anup Patel <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Palmer Dabbelt <address@hidden>


  Commit: 971b2a1e5b1a8cc8f597ac5d7016908f9fa880de
      
https://github.com/qemu/qemu/commit/971b2a1e5b1a8cc8f597ac5d7016908f9fa880de
  Author: Peter Maydell <address@hidden>
  Date:   2020-02-14 (Fri, 14 Feb 2020)

  Changed paths:
    M MAINTAINERS
    M configure
    M hw/riscv/Kconfig
    M hw/riscv/virt.c
    M hw/rtc/Kconfig
    M hw/rtc/Makefile.objs
    A hw/rtc/goldfish_rtc.c
    M hw/rtc/trace-events
    M include/hw/riscv/virt.h
    A include/hw/rtc/goldfish_rtc.h
    M target/riscv/gdbstub.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-5.0-sf2' 
into staging

RISC-V Patches for the 5.0 Soft Freeze, Part 2

This is a fairly light-weight pull request, but I wanted to send it out to
avoid the Goldfish stuff getting buried as the next PR should contain the H
extension implementation.

As far as this PR goes, it contains:

* The addition of syscon device tree nodes for reboot and poweroff, which
  allows Linux to control QEMU without an additional driver.  The existing
  device was already compatible with the syscon interface.
* A fix to our GDB stub to avoid confusing XLEN and FLEN, specifically useful
  for rv32id-based systems.
* A device emulation for the Goldfish RTC device, a simple memory-mapped RTC.
* The addition of the Goldfish RTC device to the RISC-V virt board.

This passes "make check" and boots buildroot for me.

# gpg: Signature made Mon 10 Feb 2020 21:28:04 GMT
# gpg:                using RSA key 2B3C3747446843B24A943A7A2E1319F35FBB1889
# gpg:                issuer "address@hidden"
# gpg: Good signature from "Palmer Dabbelt <address@hidden>" [unknown]
# gpg:                 aka "Palmer Dabbelt <address@hidden>" [unknown]
# gpg:                 aka "Palmer Dabbelt <address@hidden>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 00CE 76D1 8349 60DF CE88  6DF8 EF4C A150 2CCB AB41
#      Subkey fingerprint: 2B3C 3747 4468 43B2 4A94  3A7A 2E13 19F3 5FBB 1889

* remotes/palmer/tags/riscv-for-master-5.0-sf2:
  MAINTAINERS: Add maintainer entry for Goldfish RTC
  riscv: virt: Use Goldfish RTC device
  hw: rtc: Add Goldfish RTC device
  riscv: Separate FPU register size from core register size in gdbstub [v2]
  riscv/virt: Add syscon reboot and poweroff DT nodes

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/b29c3e23f649...971b2a1e5b1a