[Qemu-commits] [qemu/qemu] ec8604: target/mips: Fix handling of LL/SC instructions af...

[Peter Maydell]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: ec860426dfbebe0c9995e12cd82935a94fde5215
      
https://github.com/qemu/qemu/commit/ec860426dfbebe0c9995e12cd82935a94fde5215
  Author: Alex Richardson <address@hidden>
  Date:   2020-02-04 (Tue, 04 Feb 2020)

  Changed paths:
    M target/mips/op_helper.c

  Log Message:
  -----------
  target/mips: Fix handling of LL/SC instructions after 7dd547e5ab

After 7dd547e5ab6b31e7a0cfc182d3ad131dd55a948f the env->llval value
is loaded as an unsigned value (instead of sign-extended as before).
Therefore, the CMPXCHG in gen_st_cond() in translate.c fails if the
sign bit is set in the loaded value.

Fix this by sign-extending the llval value for the 32-bit case.

I discovered this issue because FreeBSD MIPS64 was looping forever
in an atomic helper function when trying to start /sbin/init.

Signed-off-by: Alex Richardson <address@hidden>
Fixes: 7dd547e5ab ("target/mips: Use cpu_*_mmuidx_ra instead of 
MMU_MODE*_SUFFIX")
Buglink: https://bugs.launchpad.net/qemu/+bug/1861605
Cc: Aurelien Jarno <address@hidden>
Cc: Aleksandar Markovic <address@hidden>
Cc: Aleksandar Rikalo <address@hidden>
Cc: Richard Henderson <address@hidden>
Signed-off-by: James Clarke <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
Message-Id: <address@hidden>


  Commit: 256eb7ee587ce4b0ae8d5b9ce76b746a29897e30
      
https://github.com/qemu/qemu/commit/256eb7ee587ce4b0ae8d5b9ce76b746a29897e30
  Author: Aleksandar Markovic <address@hidden>
  Date:   2020-02-04 (Tue, 04 Feb 2020)

  Changed paths:
    M target/mips/Makefile.objs
    A target/mips/cp0_helper.c
    M target/mips/op_helper.c

  Log Message:
  -----------
  target/mips: Separate CP0-related helpers into their own file

For clarity and easier maintenence, create target/mips/cp0_helper.c, and
move all CP0-related content form target/mips/op_helper.c to that file.

Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Aleksandar Rikalo <address@hidden>
Message-Id: <address@hidden>


  Commit: 7b77f048e21af71da7b82155f1f205ca7cebf1b4
      
https://github.com/qemu/qemu/commit/7b77f048e21af71da7b82155f1f205ca7cebf1b4
  Author: Aleksandar Markovic <address@hidden>
  Date:   2020-02-04 (Tue, 04 Feb 2020)

  Changed paths:
    M target/mips/Makefile.objs
    A target/mips/fpu_helper.c
    M target/mips/op_helper.c

  Log Message:
  -----------
  target/mips: Separate FPU-related helpers into their own file

For clarity and easier maintenence, create target/mips/fpu_helper.c, and
move all FPU-related content form target/mips/op_helper.c to that file.

Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Aleksandar Rikalo <address@hidden>
Message-Id: <address@hidden>


  Commit: 163b09516857520df1502db00d18e7f114d748bb
      
https://github.com/qemu/qemu/commit/163b09516857520df1502db00d18e7f114d748bb
  Author: Peter Maydell <address@hidden>
  Date:   2020-02-04 (Tue, 04 Feb 2020)

  Changed paths:
    M target/mips/Makefile.objs
    A target/mips/cp0_helper.c
    A target/mips/fpu_helper.c
    M target/mips/op_helper.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-feb-04-2020' 
into staging

MIPS queue for February 4th, 2020

# gpg: Signature made Tue 04 Feb 2020 07:55:13 GMT
# gpg:                using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <address@hidden>" [full]
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01  DD75 D497 2A89 67F7 5A65

* remotes/amarkovic/tags/mips-queue-feb-04-2020:
  target/mips: Separate FPU-related helpers into their own file
  target/mips: Separate CP0-related helpers into their own file
  target/mips: Fix handling of LL/SC instructions after 7dd547e5ab

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/f31160c7d1b8...163b09516857