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[Qemu-commits] [qemu/qemu] 2048d5: target/mips: Rectify documentation on
From: |
Peter Maydell |
Subject: |
[Qemu-commits] [qemu/qemu] 2048d5: target/mips: Rectify documentation on deprecating ... |
Date: |
Thu, 30 Jan 2020 08:00:14 -0800 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 2048d5d4bce179f051db1f7dd7f6111cd385700b
https://github.com/qemu/qemu/commit/2048d5d4bce179f051db1f7dd7f6111cd385700b
Author: Aleksandar Markovic <address@hidden>
Date: 2020-01-29 (Wed, 29 Jan 2020)
Changed paths:
M qemu-deprecated.texi
Log Message:
-----------
target/mips: Rectify documentation on deprecating MIPS r4k machine
Correct file qemu-deprecated.texi with respect to the release since
MIPS r4k machine is deprecated from 4.2 to 5.0.
Fixes: d32dc61421b
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Message-Id: <address@hidden>
Commit: 3404e180f9f08de070371932cb98817a25467781
https://github.com/qemu/qemu/commit/3404e180f9f08de070371932cb98817a25467781
Author: Aleksandar Markovic <address@hidden>
Date: 2020-01-29 (Wed, 29 Jan 2020)
Changed paths:
M include/disas/dis-asm.h
Log Message:
-----------
disas: Add a field for target-dependant data to disassemble_info
This patch adds a field "target_info" to the structure
disassemble_info. The purpose of this field is to enable targets
to pass to disassembler code any additional data thet deem suitable.
Reviewed-by: Aleksandar Rikalo <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Message-Id: <address@hidden>
Commit: 54fc33fdc4b06d63aa67d7af6da457ab5df62bb1
https://github.com/qemu/qemu/commit/54fc33fdc4b06d63aa67d7af6da457ab5df62bb1
Author: Daniel Henrique Barboza <address@hidden>
Date: 2020-01-29 (Wed, 29 Jan 2020)
Changed paths:
M target/mips/mips-semi.c
Log Message:
-----------
target/mips: semihosting: Remove 'uhi_done' label in helper_do_semihosting()
The label 'uhi_done' is a simple 'return' call and can
be removed for a bit more clarity in the code.
CC: Aurelien Jarno <address@hidden>
CC: Aleksandar Markovic <address@hidden>
CC: Aleksandar Rikalo <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Daniel Henrique Barboza <address@hidden>
Message-Id: <address@hidden>
Commit: 6cdda0ff4bad7edbb4c94a52234138bf2ac9a6b6
https://github.com/qemu/qemu/commit/6cdda0ff4bad7edbb4c94a52234138bf2ac9a6b6
Author: Aleksandar Markovic <address@hidden>
Date: 2020-01-29 (Wed, 29 Jan 2020)
Changed paths:
M hw/alpha/dp264.c
M hw/arm/armv7m.c
M hw/arm/boot.c
M hw/core/generic-loader.c
M hw/core/loader.c
M hw/cris/boot.c
M hw/hppa/machine.c
M hw/i386/multiboot.c
M hw/i386/x86.c
M hw/lm32/lm32_boards.c
M hw/lm32/milkymist.c
M hw/m68k/an5206.c
M hw/m68k/mcf5208.c
M hw/m68k/q800.c
M hw/microblaze/boot.c
M hw/mips/mips_fulong2e.c
M hw/mips/mips_malta.c
M hw/mips/mips_mipssim.c
M hw/mips/mips_r4k.c
M hw/moxie/moxiesim.c
M hw/nios2/boot.c
M hw/openrisc/openrisc_sim.c
M hw/pci-host/prep.c
M hw/ppc/e500.c
M hw/ppc/mac_newworld.c
M hw/ppc/mac_oldworld.c
M hw/ppc/ppc440_bamboo.c
M hw/ppc/sam460ex.c
M hw/ppc/spapr.c
M hw/ppc/virtex_ml507.c
M hw/riscv/boot.c
M hw/s390x/ipl.c
M hw/sparc/leon3.c
M hw/sparc/sun4m.c
M hw/sparc64/sun4u.c
M hw/tricore/tricore_testboard.c
M hw/xtensa/sim.c
M hw/xtensa/xtfpga.c
M include/hw/elf_ops.h
M include/hw/loader.h
Log Message:
-----------
hw/core/loader: Let load_elf() populate a field with CPU-specific flags
While loading the executable, some platforms (like AVR) need to
detect CPU type that executable is built for - and, with this patch,
this is enabled by reading the field 'e_flags' of the ELF header of
the executable in question. The change expands functionality of
the following functions:
- load_elf()
- load_elf_as()
- load_elf_ram()
- load_elf_ram_sym()
The argument added to these functions is called 'pflags' and is of
type 'uint32_t*' (that matches 'pointer to 'elf_word'', 'elf_word'
being the type of the field 'e_flags', in both 32-bit and 64-bit
variants of ELF header). Callers are allowed to pass NULL as that
argument, and in such case no lookup to the field 'e_flags' will
happen, and no information will be returned, of course.
CC: Richard Henderson <address@hidden>
CC: Peter Maydell <address@hidden>
CC: Edgar E. Iglesias <address@hidden>
CC: Michael Walle <address@hidden>
CC: Thomas Huth <address@hidden>
CC: Laurent Vivier <address@hidden>
CC: Philippe Mathieu-Daudé <address@hidden>
CC: Aleksandar Rikalo <address@hidden>
CC: Aurelien Jarno <address@hidden>
CC: Jia Liu <address@hidden>
CC: David Gibson <address@hidden>
CC: Mark Cave-Ayland <address@hidden>
CC: BALATON Zoltan <address@hidden>
CC: Christian Borntraeger <address@hidden>
CC: Thomas Huth <address@hidden>
CC: Artyom Tarasenko <address@hidden>
CC: Fabien Chouteau <address@hidden>
CC: KONRAD Frederic <address@hidden>
CC: Max Filippov <address@hidden>
Reviewed-by: Aleksandar Rikalo <address@hidden>
Signed-off-by: Michael Rolnik <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Message-Id: <address@hidden>
Commit: feafe82cc2289a31b3e3f11dc76f3539ea22d670
https://github.com/qemu/qemu/commit/feafe82cc2289a31b3e3f11dc76f3539ea22d670
Author: Yongbok Kim <address@hidden>
Date: 2020-01-29 (Wed, 29 Jan 2020)
Changed paths:
M target/mips/cpu.h
M target/mips/helper.h
M target/mips/machine.c
M target/mips/op_helper.c
M target/mips/translate.c
Log Message:
-----------
target/mips: Amend CP0 WatchHi register implementation
WatchHi is extended by the field MemoryMapID with the GINVT instruction.
The field is accessible by MTHC0/MFHC0 in 32-bit architectures and DMTC0/
DMFC0 in 64-bit architectures.
Reviewed-by: Aleksandar Rikalo <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Message-Id: <address@hidden>
Commit: 99029be1c2875cd857614397674bbf563ddb6f91
https://github.com/qemu/qemu/commit/99029be1c2875cd857614397674bbf563ddb6f91
Author: Yongbok Kim <address@hidden>
Date: 2020-01-29 (Wed, 29 Jan 2020)
Changed paths:
M disas/mips.c
M target/mips/cpu.h
M target/mips/helper.c
M target/mips/helper.h
M target/mips/internal.h
M target/mips/op_helper.c
M target/mips/translate.c
Log Message:
-----------
target/mips: Add implementation of GINVT instruction
Implement emulation of GINVT instruction. As QEMU doesn't support
caches and virtualization, this implementation covers only one
instruction (GINVT - Global Invalidate TLB) among all TLB-related
MIPS instructions.
Reviewed-by: Aleksandar Rikalo <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Message-Id: <address@hidden>
Commit: 204aa60b37c23a89e690d418f49787d274303ca7
https://github.com/qemu/qemu/commit/204aa60b37c23a89e690d418f49787d274303ca7
Author: Peter Maydell <address@hidden>
Date: 2020-01-30 (Thu, 30 Jan 2020)
Changed paths:
M disas/mips.c
M hw/alpha/dp264.c
M hw/arm/armv7m.c
M hw/arm/boot.c
M hw/core/generic-loader.c
M hw/core/loader.c
M hw/cris/boot.c
M hw/hppa/machine.c
M hw/i386/multiboot.c
M hw/i386/x86.c
M hw/lm32/lm32_boards.c
M hw/lm32/milkymist.c
M hw/m68k/an5206.c
M hw/m68k/mcf5208.c
M hw/m68k/q800.c
M hw/microblaze/boot.c
M hw/mips/mips_fulong2e.c
M hw/mips/mips_malta.c
M hw/mips/mips_mipssim.c
M hw/mips/mips_r4k.c
M hw/moxie/moxiesim.c
M hw/nios2/boot.c
M hw/openrisc/openrisc_sim.c
M hw/pci-host/prep.c
M hw/ppc/e500.c
M hw/ppc/mac_newworld.c
M hw/ppc/mac_oldworld.c
M hw/ppc/ppc440_bamboo.c
M hw/ppc/sam460ex.c
M hw/ppc/spapr.c
M hw/ppc/virtex_ml507.c
M hw/riscv/boot.c
M hw/s390x/ipl.c
M hw/sparc/leon3.c
M hw/sparc/sun4m.c
M hw/sparc64/sun4u.c
M hw/tricore/tricore_testboard.c
M hw/xtensa/sim.c
M hw/xtensa/xtfpga.c
M include/disas/dis-asm.h
M include/hw/elf_ops.h
M include/hw/loader.h
M qemu-deprecated.texi
M target/mips/cpu.h
M target/mips/helper.c
M target/mips/helper.h
M target/mips/internal.h
M target/mips/machine.c
M target/mips/mips-semi.c
M target/mips/op_helper.c
M target/mips/translate.c
Log Message:
-----------
Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-jan-29-2020'
into staging
MIPS queue for January 29th, 2020
# gpg: Signature made Wed 29 Jan 2020 18:29:43 GMT
# gpg: using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <address@hidden>" [full]
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65
* remotes/amarkovic/tags/mips-queue-jan-29-2020:
target/mips: Add implementation of GINVT instruction
target/mips: Amend CP0 WatchHi register implementation
hw/core/loader: Let load_elf() populate a field with CPU-specific flags
target/mips: semihosting: Remove 'uhi_done' label in helper_do_semihosting()
disas: Add a field for target-dependant data to disassemble_info
target/mips: Rectify documentation on deprecating MIPS r4k machine
Signed-off-by: Peter Maydell <address@hidden>
Compare: https://github.com/qemu/qemu/compare/a09a2b5a4d85...204aa60b37c2
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