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[Qemu-commits] [qemu/qemu] 90f671: target/arm: add PMU feature to cortex

From: Peter Maydell
Subject: [Qemu-commits] [qemu/qemu] 90f671: target/arm: add PMU feature to cortex-r5 and corte...
Date: Thu, 23 Jan 2020 09:15:17 -0800 
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 90f671581ac601fcc1b840d9e9abe7e3c3e672db
      
https://github.com/qemu/qemu/commit/90f671581ac601fcc1b840d9e9abe7e3c3e672db
  Author: Clement Deschamps <address@hidden>
  Date:   2020-01-23 (Thu, 23 Jan 2020)

  Changed paths:
    M target/arm/cpu.c

  Log Message:
  -----------
  target/arm: add PMU feature to cortex-r5 and cortex-r5f

The PMU is not optional on cortex-r5 and cortex-r5f (see
the "Features" chapter of the Technical Reference Manual).

Signed-off-by: Clement Deschamps <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: de0b1bae6461f67243282555475f88b2384a1eb9
      
https://github.com/qemu/qemu/commit/de0b1bae6461f67243282555475f88b2384a1eb9
  Author: Vincent Dehors <address@hidden>
  Date:   2020-01-23 (Thu, 23 Jan 2020)

  Changed paths:
    M target/arm/pauth_helper.c

  Log Message:
  -----------
  target/arm: Fix PAuth sbox functions

In the PAC computation, sbox was applied over wrong bits.
As this is a 4-bit sbox, bit index should be incremented by 4 instead of 16.

Test vector from QARMA paper (https://eprint.iacr.org/2016/444.pdf) was
used to verify one computation of the pauth_computepac() function which
uses sbox2.

Launchpad: https://bugs.launchpad.net/bugs/1859713
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Vincent DEHORS <address@hidden>
Signed-off-by: Adrien GRASSEIN <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: fdd9b09413f06ec1277b2b1eac4ddef39b50d735
      
https://github.com/qemu/qemu/commit/fdd9b09413f06ec1277b2b1eac4ddef39b50d735
  Author: Richard Henderson <address@hidden>
  Date:   2020-01-23 (Thu, 23 Jan 2020)

  Changed paths:
    M tests/tcg/aarch64/Makefile.target
    M tests/tcg/aarch64/pauth-1.c
    M tests/tcg/aarch64/pauth-2.c

  Log Message:
  -----------
  tests/tcg/aarch64: Fix compilation parameters for pauth-%

We were incorrectly requiring ARMv8.4 support for the pauth
tests, but Pointer Authentication is an ARMv8.3 extension.
Further, hiding the required architecture within asm() is
not correct.

Correct the architecture version requested, and specify it
in the cflags of the (cross-) compiler rather than in the asm.

Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
[PMM: tweaked commit message]
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 73fc07984918fc7b59bd691ee2d5d1b9d600d53b
      
https://github.com/qemu/qemu/commit/73fc07984918fc7b59bd691ee2d5d1b9d600d53b
  Author: Richard Henderson <address@hidden>
  Date:   2020-01-23 (Thu, 23 Jan 2020)

  Changed paths:
    M tests/tcg/aarch64/Makefile.softmmu-target
    A tests/tcg/aarch64/system/pauth-3.c

  Log Message:
  -----------
  tests/tcg/aarch64: Add pauth-3

This is the test vector from the QARMA paper, run through PACGA.

Suggested-by: Vincent Dehors <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: dd684ead2958b26f48484ff0f681bb151be22a7c
      
https://github.com/qemu/qemu/commit/dd684ead2958b26f48484ff0f681bb151be22a7c
  Author: Richard Henderson <address@hidden>
  Date:   2020-01-23 (Thu, 23 Jan 2020)

  Changed paths:
    M tests/tcg/aarch64/Makefile.target
    A tests/tcg/aarch64/pauth-4.c

  Log Message:
  -----------
  tests/tcg/aarch64: Add pauth-4

Perform the set of operations and test described in LP 1859713.

Suggested-by: Adrien GRASSEIN <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
[PMM: fixed hard-coded tabs]
Signed-off-by: Peter Maydell <address@hidden>


  Commit: de1a8336a007041fc5350a0539f98900d469559c
      
https://github.com/qemu/qemu/commit/de1a8336a007041fc5350a0539f98900d469559c
  Author: Keqian Zhu <address@hidden>
  Date:   2020-01-23 (Thu, 23 Jan 2020)

  Changed paths:
    M hw/acpi/generic_event_device.c

  Log Message:
  -----------
  hw/acpi: Remove extra indent in ACPI GED hotplug cb

There is extra indent in ACPI GED hotplug cb that should be
deleted.

Reviewed-by: Igor Mammedov <address@hidden>
Signed-off-by: Keqian Zhu <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 53eccc70343727a13b010d1d5b172c8f3dd21bb7
      
https://github.com/qemu/qemu/commit/53eccc70343727a13b010d1d5b172c8f3dd21bb7
  Author: Keqian Zhu <address@hidden>
  Date:   2020-01-23 (Thu, 23 Jan 2020)

  Changed paths:
    M hw/arm/virt.c

  Log Message:
  -----------
  hw/arm: Use helper function to trigger hotplug handler plug

We can use existing helper function to trigger hotplug handler
plug, which makes code clearer.

Reviewed-by: Igor Mammedov <address@hidden>
Signed-off-by: Keqian Zhu <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 87c0868f467db84df930fe687241d9cc2bfd1dd2
      
https://github.com/qemu/qemu/commit/87c0868f467db84df930fe687241d9cc2bfd1dd2
  Author: Peter Maydell <address@hidden>
  Date:   2020-01-23 (Thu, 23 Jan 2020)

  Changed paths:
    M MAINTAINERS
    M Makefile
    M docs/interop/conf.py
    M docs/interop/index.rst
    A docs/interop/qemu-nbd.rst
    A docs/interop/qemu-option-trace.rst.inc
    M qemu-doc.texi
    R qemu-nbd.texi
    M qemu-option-trace.texi

  Log Message:
  -----------
  qemu-nbd: Convert invocation documentation to rST

The qemu-nbd documentation is currently in qemu-nbd.texi in Texinfo
format, which we present to the user as:
 * a qemu-nbd manpage
 * a section of the main qemu-doc HTML documentation

Convert the documentation to rST format, and present it to the user as:
 * a qemu-nbd manpage
 * part of the interop/ Sphinx manual

This follows the same pattern as commit 27a296fce982 did for the
qemu-ga manpage.

All the content of the old manpage is retained, except that I have
dropped the "This is free software; see the source for copying
conditions.  There is NO warranty..." text that was in the old AUTHOR
section; Sphinx's manpage builder doesn't expect that much text in
the AUTHOR section, and since none of our other manpages have it it
seems easiest to delete it rather than try to figure out where else
in the manpage to put it.

The only other textual change is that I have had to give the
--nocache option its own description ("Equivalent to --cache=none")
because Sphinx doesn't have an equivalent of using item/itemx
to share a description between two options.

Some minor aspects of the formatting have changed, to suit what is
easiest for Sphinx to output. (The most notable is that Sphinx
option section option syntax doesn't support '--option foo=bar'
with bar underlined rather than bold, so we have to switch to
'--option foo=BAR' instead.)

The contents of qemu-option-trace.texi are now duplicated in
docs/interop/qemu-option-trace.rst.inc, until such time as we complete
the conversion of the other files which use it; since it has had only
3 changes in 3 years, this shouldn't be too awkward a burden.
(We use .rst.inc because if this file fragment has a .rst extension
then Sphinx complains about not seeing it in a toctree.)

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Eric Blake <address@hidden>
Tested-by: Alex Bennée <address@hidden>
Acked-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: 0928523a1230a690c933cee6e353e06b0810c7c6
      
https://github.com/qemu/qemu/commit/0928523a1230a690c933cee6e353e06b0810c7c6
  Author: Peter Maydell <address@hidden>
  Date:   2020-01-23 (Thu, 23 Jan 2020)

  Changed paths:
    M Makefile
    M docs/index.html.in
    M docs/index.rst
    A docs/system/conf.py
    A docs/system/index.rst

  Log Message:
  -----------
  docs: Create stub system manual

We want a user-facing manual which contains system emulation
documentation. Create an empty one which we can populate.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Acked-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: acab923dce385b8eccb9d4de8fd6b99bfca6628d
      
https://github.com/qemu/qemu/commit/acab923dce385b8eccb9d4de8fd6b99bfca6628d
  Author: Peter Maydell <address@hidden>
  Date:   2020-01-23 (Thu, 23 Jan 2020)

  Changed paths:
    M Makefile
    R docs/qemu-block-drivers.texi
    M docs/system/conf.py
    M docs/system/index.rst
    A docs/system/qemu-block-drivers.rst
    M qemu-doc.texi
    M qemu-options.hx

  Log Message:
  -----------
  qemu-block-drivers: Convert to rST

The qemu-block-drivers documentation is currently in
docs/qemu-block-drivers.texi in Texinfo format, which we present
to the user as:
 * a qemu-block-drivers manpage
 * a section of the main qemu-doc HTML documentation

Convert the documentation to rST format, and present it to
the user as:
 * a qemu-block-drivers manpage
 * part of the system/ Sphinx manual

This follows the same pattern we've done for qemu-ga and qemu-nbd.

We have to drop a cross-reference from the documentation of the
-cdrom option back to the qemu-block-drivers documentation, since
they're no longer within the same texinfo document.

As noted in a comment, the manpage output is slightly compromised
due to limitations in Sphinx. In an ideal world, the HTML output
would have the various headings like 'Disk image file formats'
as top-level section headings (which then appear in the overall
system manual's table-of-contents), and it would not have the
section headings which make sense only for the manpage like
'synopsis', 'description', and 'see also'. Unfortunately, the
mechanism Sphinx provides for restricting pieces of documentation
is limited to the point of being flawed: the 'only::' directive
is implemented as a filter that is applied at a very late stage
in the document processing pipeline, rather than as an early
equivalent of an #ifdef. This means that Sphinx's process of
identifying which section heading markup styles are which levels
of heading gets confused if the 'only::' directive contains
section headings which would affect the heading-level of a
later heading. I have opted to prioritise making the HTML format
look better, with the compromise being that in the manpage
the 'Disk image file formats' &c headings are top-level headings
rather than being sub-headings under the traditional 'Description'
top-level section title.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Tested-by: Alex Bennée <address@hidden>
Acked-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: 538baab245ca881e6a6ff720b5133f3ad1fcaafc
      
https://github.com/qemu/qemu/commit/538baab245ca881e6a6ff720b5133f3ad1fcaafc
  Author: Andrew Jones <address@hidden>
  Date:   2020-01-23 (Thu, 23 Jan 2020)

  Changed paths:
    M include/elf.h
    M target/arm/arch_dump.c
    M target/arm/cpu.h
    M target/arm/kvm64.c

  Log Message:
  -----------
  target/arm/arch_dump: Add SVE notes

When dumping a guest with dump-guest-memory also dump the SVE
registers if they are in use.

Signed-off-by: Andrew Jones <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
[PMM: fixed checkpatch nits]
Signed-off-by: Peter Maydell <address@hidden>


  Commit: a4abb6f2061f3a40f01cfe4c79c1527db655ac89
      
https://github.com/qemu/qemu/commit/a4abb6f2061f3a40f01cfe4c79c1527db655ac89
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2020-01-23 (Thu, 23 Jan 2020)

  Changed paths:
    M hw/misc/stm32f4xx_syscfg.c

  Log Message:
  -----------
  hw/misc/stm32f4xx_syscfg: Fix copy/paste error

Missed in 870c034da0b, hopefully reported by Coverity.

Fixes: Coverity CID 1412793 (Incorrect expression)
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: db1e7afa3716dbf5e5b54f5dd80f01c0bdaf4926
      
https://github.com/qemu/qemu/commit/db1e7afa3716dbf5e5b54f5dd80f01c0bdaf4926
  Author: Guenter Roeck <address@hidden>
  Date:   2020-01-23 (Thu, 23 Jan 2020)

  Changed paths:
    M hw/dma/pl330.c
    M hw/dma/trace-events

  Log Message:
  -----------
  dma/pl330: Convert to support tracing

Replace debug logging code with tracing.

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Guenter Roeck <address@hidden>
Message-id: address@hidden
[PMM: tweak dmald/dmast trace events to fix OSX-only
 format string complaint]
Signed-off-by: Peter Maydell <address@hidden>


  Commit: ddf59e9ccebfce0474152db34e07efaaed417eb6
      
https://github.com/qemu/qemu/commit/ddf59e9ccebfce0474152db34e07efaaed417eb6
  Author: Guenter Roeck <address@hidden>
  Date:   2020-01-23 (Thu, 23 Jan 2020)

  Changed paths:
    M include/hw/or-irq.h

  Log Message:
  -----------
  hw/core/or-irq: Increase limit of or-lines to 48

Exynos DMA requires up to 33 interrupt lines (32 event interrupts
plus abort interrupt), which all need to be wired together. Increase
the maximum number of or-irq lines to 48 to support this configuration.

Signed-off-by: Guenter Roeck <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>


  Commit: dab15fbe2abaca696dae45e6e22e093379ed9c05
      
https://github.com/qemu/qemu/commit/dab15fbe2abaca696dae45e6e22e093379ed9c05
  Author: Guenter Roeck <address@hidden>
  Date:   2020-01-23 (Thu, 23 Jan 2020)

  Changed paths:
    M hw/arm/exynos4210.c
    M include/hw/arm/exynos4210.h

  Log Message:
  -----------
  hw/arm/exynos4210: Fix DMA initialization

First parameter to exynos4210_get_irq() is not the SPI port number,
but the interrupt group number. Interrupt groups are 20 for mdma
and 21 for pdma. Interrupts are not inverted. Controllers support 32
events (pdma) or 31 events (mdma). Events must all be routed to a single
interrupt line. Set other parameters as documented in Exynos4210 datasheet,
section 8 (DMA controller).

Fixes: 59520dc65e ("hw/arm/exynos4210: Add DMA support for the Exynos4210")
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Guenter Roeck <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 6804d2301b630ef4e2fe1bdd6e5065875fe6b7e0
      
https://github.com/qemu/qemu/commit/6804d2301b630ef4e2fe1bdd6e5065875fe6b7e0
  Author: Guenter Roeck <address@hidden>
  Date:   2020-01-23 (Thu, 23 Jan 2020)

  Changed paths:
    M hw/char/exynos4210_uart.c
    M hw/char/trace-events

  Log Message:
  -----------
  hw/char/exynos4210_uart: Convert to support tracing

Replace debug code with tracing to aid debugging.

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Guenter Roeck <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: c9d3396d80fe7ece9bcc7a688be6f98e4988f0cf
      
https://github.com/qemu/qemu/commit/c9d3396d80fe7ece9bcc7a688be6f98e4988f0cf
  Author: Guenter Roeck <address@hidden>
  Date:   2020-01-23 (Thu, 23 Jan 2020)

  Changed paths:
    M hw/char/exynos4210_uart.c

  Log Message:
  -----------
  hw/char/exynos4210_uart: Implement post_load function

After restoring a VM, serial parameters need to be updated to reflect
restored register values. Implement a post_load function to handle this
situation.

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Guenter Roeck <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 3a5d3a6f58ddd4027b9bcf6fe58f2a0224712c07
      
https://github.com/qemu/qemu/commit/3a5d3a6f58ddd4027b9bcf6fe58f2a0224712c07
  Author: Guenter Roeck <address@hidden>
  Date:   2020-01-23 (Thu, 23 Jan 2020)

  Changed paths:
    M hw/char/exynos4210_uart.c
    M hw/char/trace-events

  Log Message:
  -----------
  hw/char/exynos4210_uart: Implement Rx FIFO level triggers and timeouts

The driver already implements a receive FIFO, but it does not
handle receive FIFO trigger levels and timeout. Implement the
missing functionality.

Signed-off-by: Guenter Roeck <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>


  Commit: 3c77412b4a5e144bebf06cc668dc4b35b59b4607
      
https://github.com/qemu/qemu/commit/3c77412b4a5e144bebf06cc668dc4b35b59b4607
  Author: Guenter Roeck <address@hidden>
  Date:   2020-01-23 (Thu, 23 Jan 2020)

  Changed paths:
    M hw/char/exynos4210_uart.c
    M hw/char/trace-events

  Log Message:
  -----------
  hw/char/exynos4210_uart: Add receive DMA support

To support receive DMA, we need to inform the DMA controller if receive data
is available. Otherwise the DMA controller keeps requesting data, causing
receive errors.

Implement this using an interrupt line. The instantiating code then needs
to connect the interrupt with the matching DMA controller GPIO pin.

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Guenter Roeck <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: e9d20b55b2e4c8400143554f0e83e4e1fcb9bd0f
      
https://github.com/qemu/qemu/commit/e9d20b55b2e4c8400143554f0e83e4e1fcb9bd0f
  Author: Guenter Roeck <address@hidden>
  Date:   2020-01-23 (Thu, 23 Jan 2020)

  Changed paths:
    M hw/arm/exynos4210.c

  Log Message:
  -----------
  hw/arm/exynos4210: Connect serial port DMA busy signals with pl330

The Exynos4210 serial driver uses an interrupt line to signal if receive
data is available. Connect that interrupt with the DMA controller's
'peripheral busy' gpio pin to stop the DMA if there is no more receive
data available. Without this patch, receive DMA runs wild and fills the
entire receive DMA buffer with invalid data.

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Guenter Roeck <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 6918ab2570bcf942651e69f7ad975e137679738b
      
https://github.com/qemu/qemu/commit/6918ab2570bcf942651e69f7ad975e137679738b
  Author: Peter Maydell <address@hidden>
  Date:   2020-01-23 (Thu, 23 Jan 2020)

  Changed paths:
    M MAINTAINERS
    M Makefile
    M docs/index.html.in
    M docs/index.rst
    M docs/interop/conf.py
    M docs/interop/index.rst
    A docs/interop/qemu-nbd.rst
    A docs/interop/qemu-option-trace.rst.inc
    R docs/qemu-block-drivers.texi
    A docs/system/conf.py
    A docs/system/index.rst
    A docs/system/qemu-block-drivers.rst
    M hw/acpi/generic_event_device.c
    M hw/arm/exynos4210.c
    M hw/arm/virt.c
    M hw/char/exynos4210_uart.c
    M hw/char/trace-events
    M hw/dma/pl330.c
    M hw/dma/trace-events
    M hw/misc/stm32f4xx_syscfg.c
    M include/elf.h
    M include/hw/arm/exynos4210.h
    M include/hw/or-irq.h
    M qemu-doc.texi
    R qemu-nbd.texi
    M qemu-option-trace.texi
    M qemu-options.hx
    M target/arm/arch_dump.c
    M target/arm/cpu.c
    M target/arm/cpu.h
    M target/arm/kvm64.c
    M target/arm/pauth_helper.c
    M tests/tcg/aarch64/Makefile.softmmu-target
    M tests/tcg/aarch64/Makefile.target
    M tests/tcg/aarch64/pauth-1.c
    M tests/tcg/aarch64/pauth-2.c
    A tests/tcg/aarch64/pauth-4.c
    A tests/tcg/aarch64/system/pauth-3.c

  Log Message:
  -----------
  Merge remote-tracking branch 
'remotes/pmaydell/tags/pull-target-arm-20200123-4' into staging

target-arm queue:
 * fix bug in PAuth emulation
 * add PMU to Cortex-R5, Cortex-R5F
 * qemu-nbd: Convert documentation to rST
 * qemu-block-drivers: Convert documentation to rST
 * Fix Exynos4210 UART DMA support
 * Various minor code cleanups

# gpg: Signature made Thu 23 Jan 2020 16:35:38 GMT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "address@hidden"
# gpg: Good signature from "Peter Maydell <address@hidden>" [ultimate]
# gpg:                 aka "Peter Maydell <address@hidden>" [ultimate]
# gpg:                 aka "Peter Maydell <address@hidden>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20200123-4:
  hw/arm/exynos4210: Connect serial port DMA busy signals with pl330
  hw/char/exynos4210_uart: Add receive DMA support
  hw/char/exynos4210_uart: Implement Rx FIFO level triggers and timeouts
  hw/char/exynos4210_uart: Implement post_load function
  hw/char/exynos4210_uart: Convert to support tracing
  hw/arm/exynos4210: Fix DMA initialization
  hw/core/or-irq: Increase limit of or-lines to 48
  dma/pl330: Convert to support tracing
  hw/misc/stm32f4xx_syscfg: Fix copy/paste error
  target/arm/arch_dump: Add SVE notes
  qemu-block-drivers: Convert to rST
  docs: Create stub system manual
  qemu-nbd: Convert invocation documentation to rST
  hw/arm: Use helper function to trigger hotplug handler plug
  hw/acpi: Remove extra indent in ACPI GED hotplug cb
  tests/tcg/aarch64: Add pauth-4
  tests/tcg/aarch64: Add pauth-3
  tests/tcg/aarch64: Fix compilation parameters for pauth-%
  target/arm: Fix PAuth sbox functions
  target/arm: add PMU feature to cortex-r5 and cortex-r5f

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/b7c359c748a2...6918ab2570bc
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