[Qemu-commits] [qemu/qemu] af2a58: ptimer: Remove old ptimer_init_with_bh() API

[Peter Maydell]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: af2a580f7e09359f882014e47a91e620a325537b
      
https://github.com/qemu/qemu/commit/af2a580f7e09359f882014e47a91e620a325537b
  Author: Peter Maydell <address@hidden>
  Date:   2019-11-11 (Mon, 11 Nov 2019)

  Changed paths:
    M hw/core/ptimer.c
    M include/hw/ptimer.h

  Log Message:
  -----------
  ptimer: Remove old ptimer_init_with_bh() API

Now all the users of ptimers have converted to the transaction-based
API, we can remove ptimer_init_with_bh() and all the code paths
that are used only by bottom-half based ptimers, and tidy up the
documentation comments to consider the transaction-based API the
only possibility.

The code changes result from:
 * s->bh no longer exists
 * s->callback is now always non-NULL

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden


  Commit: 894d354fd834476ebc347cdd2706533b7cc761d5
      
https://github.com/qemu/qemu/commit/894d354fd834476ebc347cdd2706533b7cc761d5
  Author: Peter Maydell <address@hidden>
  Date:   2019-11-11 (Mon, 11 Nov 2019)

  Changed paths:
    M accel/tcg/cputlb.c
    M include/hw/core/cpu.h
    M memory.c

  Log Message:
  -----------
  Remove unassigned_access CPU hook

All targets have now migrated away from the old unassigned_access
hook to the new do_transaction_failed hook. This means we can remove
the core-code infrastructure for that hook and the code that calls it.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Message-id: address@hidden


  Commit: 45c078f163fd47c35e7505d98928fae63baada7d
      
https://github.com/qemu/qemu/commit/45c078f163fd47c35e7505d98928fae63baada7d
  Author: Clement Deschamps <address@hidden>
  Date:   2019-11-11 (Mon, 11 Nov 2019)

  Changed paths:
    M hw/arm/boot.c
    M include/hw/arm/boot.h

  Log Message:
  -----------
  hw/arm/boot: Set NSACR.{CP11, CP10} in dummy SMC setup routine

The boot.c code usually puts the CPU into NS mode directly when it is
booting a kernel.  Since fc1120a7f5f2d4b6 this has included a
requirement to set NSACR to give NS state access to the FPU; we fixed
that for the usual code path in ece628fcf6.  However, it is also
possible for a board model to request an alternative mode of booting,
where its 'board_setup' code hook runs in Secure state and is
responsible for doing the S->NS transition after it has done whatever
work it must do in Secure state.  In this situation the board_setup
code now also needs to update NSACR.

This affects all boards which set info->secure_board_setup, which is
currently the 'raspi' and 'highbank' families.  They both use the
common arm_write_secure_board_setup_dummy_smc().

Set the NSACR CP11 and CP10 bits in the code written by that
function, to allow FPU access in Non-Secure state when using dummy
SMC setup routine.  Otherwise an AArch32 kernel booted on the
highbank or raspi boards will UNDEF as soon as it tries to use the
FPU.

Update the comment describing secure_board_setup to note the new
requirements on users of it.

This fixes a kernel panic when booting raspbian on raspi2.

Successfully tested with:
  2017-01-11-raspbian-jessie-lite.img
  2018-11-13-raspbian-stretch-lite.img
  2019-07-10-raspbian-buster-lite.img

Fixes: fc1120a7f5
Signed-off-by: Clement Deschamps <address@hidden>
Tested-by: Laurent Bonnans <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
[PMM: updated comment to boot.h to note new requirement on
 users of secure_board_setup; edited/rewrote commit message]
Signed-off-by: Peter Maydell <address@hidden>


  Commit: b626eb031a33886a06a153b8715213a2b5816c1c
      
https://github.com/qemu/qemu/commit/b626eb031a33886a06a153b8715213a2b5816c1c
  Author: Peter Maydell <address@hidden>
  Date:   2019-11-11 (Mon, 11 Nov 2019)

  Changed paths:
    M accel/tcg/cputlb.c
    M hw/arm/boot.c
    M hw/core/ptimer.c
    M include/hw/arm/boot.h
    M include/hw/core/cpu.h
    M include/hw/ptimer.h
    M memory.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20191111' 
into staging

target-arm queue:
 * Remove old unassigned_access CPU hook API
 * Remove old ptimer_init_with_bh() API
 * hw/arm/boot: Set NSACR.{CP11, CP10} in dummy SMC setup routine

# gpg: Signature made Mon 11 Nov 2019 13:56:56 GMT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "address@hidden"
# gpg: Good signature from "Peter Maydell <address@hidden>" [ultimate]
# gpg:                 aka "Peter Maydell <address@hidden>" [ultimate]
# gpg:                 aka "Peter Maydell <address@hidden>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20191111:
  hw/arm/boot: Set NSACR.{CP11, CP10} in dummy SMC setup routine
  Remove unassigned_access CPU hook
  ptimer: Remove old ptimer_init_with_bh() API

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/654efcb511d3...b626eb031a33