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[Qemu-commits] [qemu/qemu] 1ab170: target/arm: Fix sign-extension for SM

From: Peter Maydell
Subject: [Qemu-commits] [qemu/qemu] 1ab170: target/arm: Fix sign-extension for SMLAL*
Date: Wed, 23 Oct 2019 05:38:27 -0700 
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 1ab170865202aab8301131f31bffd87ea0f60d16
      
https://github.com/qemu/qemu/commit/1ab170865202aab8301131f31bffd87ea0f60d16
  Author: Richard Henderson <address@hidden>
  Date:   2019-10-22 (Tue, 22 Oct 2019)

  Changed paths:
    M target/arm/translate.c

  Log Message:
  -----------
  target/arm: Fix sign-extension for SMLAL*

The 32-bit product should be sign-extended, not zero-extended.

Fixes: ea96b374641b
Reported-by: Laurent Desnogues <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Laurent Desnogues <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 1a391e20c39026f4de0d137f9b2dc64f1f8462c0
      
https://github.com/qemu/qemu/commit/1a391e20c39026f4de0d137f9b2dc64f1f8462c0
  Author: Guenter Roeck <address@hidden>
  Date:   2019-10-22 (Tue, 22 Oct 2019)

  Changed paths:
    M hw/timer/exynos4210_mct.c

  Log Message:
  -----------
  hw/timer/exynos4210_mct: Initialize ptimer before starting it

When booting a recent Linux kernel, the qemu message "Timer with delta
zero, disabling" is seen, apparently because a ptimer is started before
being initialized.  Fix the problem by initializing the offending ptimer
before starting it.

The bug is effectively harmless in the old QEMUBH setup
because the sequence of events is:
 * the delta zero means the timer expires immediately
 * ptimer_reload() arranges for exynos4210_gfrc_event() to be called
 * ptimer_reload() notices the zero delta and disables the timer
 * later, the QEMUBH runs, and exynos4210_gfrc_event() correctly
   configures the timer and restarts it

In the new transaction based API the bug is still harmless,
but differences of when the callback function runs mean the
message is not printed any more:
 * ptimer_run() does nothing as it's inside a transaction block
 * ptimer_transaction_commit() sees it has work to do and
   calls ptimer_reload()
 * the zero delta means the timer expires immediately
 * ptimer_reload() calls exynos4210_gfrc_event() directly
 * exynos4210_gfrc_event() configures the timer
 * the delta is no longer zero so ptimer_reload() doesn't complain
   (the zero-delta test is after the trigger-callback in
   the ptimer_reload() function)

Regardless, the behaviour here was not intentional, and we should
just program the ptimer correctly to start with.

Signed-off-by: Guenter Roeck <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden
[PMM: Expansion/clarification of the commit message:
 the message is about a zero delta, not a zero period;
 added detail to the commit message of the analysis of what
 is happening and why the kernel boots even with the message;
 added note that the message goes away with the new ptimer API]
Signed-off-by: Peter Maydell <address@hidden>


  Commit: a1f9a907eabcc0910e8dd06c5e87559fe97301b6
      
https://github.com/qemu/qemu/commit/a1f9a907eabcc0910e8dd06c5e87559fe97301b6
  Author: Peter Maydell <address@hidden>
  Date:   2019-10-22 (Tue, 22 Oct 2019)

  Changed paths:
    M hw/timer/arm_mptimer.c

  Log Message:
  -----------
  hw/timer/arm_mptimer.c: Undo accidental rename of arm_mptimer_init()

In commit b01422622b we did an automated rename of the ptimer_init()
function to ptimer_init_with_bh().  Unfortunately this caught the
unrelated arm_mptimer_init() function.  Undo that accidental
renaming.

Fixes: b01422622b7c7293196fdaf1dbb4f495af44ecf9
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden


  Commit: c54dd4b70197242360749a3053986e88312c26c4
      
https://github.com/qemu/qemu/commit/c54dd4b70197242360749a3053986e88312c26c4
  Author: Peter Maydell <address@hidden>
  Date:   2019-10-22 (Tue, 22 Oct 2019)

  Changed paths:
    M hw/timer/puv3_ost.c

  Log Message:
  -----------
  hw/timer/puv3_ost.c: Switch to transaction-based ptimer API

Switch the puv3_ost code away from bottom-half based ptimers to the
new transaction-based ptimer API.  This just requires adding
begin/commit calls around the various places that modify the ptimer
state, and using the new ptimer_init() function to create the timer.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden


  Commit: 28015830d944169edd2db0cfd64c84e937ec4f25
      
https://github.com/qemu/qemu/commit/28015830d944169edd2db0cfd64c84e937ec4f25
  Author: Peter Maydell <address@hidden>
  Date:   2019-10-22 (Tue, 22 Oct 2019)

  Changed paths:
    M hw/timer/sh_timer.c

  Log Message:
  -----------
  hw/timer/sh_timer: Switch to transaction-based ptimer API

Switch the sh_timer code away from bottom-half based ptimers to the
new transaction-based ptimer API.  This just requires adding
begin/commit calls around the various places that modify the ptimer
state, and using the new ptimer_init() function to create the timer.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden


  Commit: b360a65cf9936bb3ef0e8e94efa553e03081a7b4
      
https://github.com/qemu/qemu/commit/b360a65cf9936bb3ef0e8e94efa553e03081a7b4
  Author: Peter Maydell <address@hidden>
  Date:   2019-10-22 (Tue, 22 Oct 2019)

  Changed paths:
    M hw/timer/lm32_timer.c

  Log Message:
  -----------
  hw/timer/lm32_timer: Switch to transaction-based ptimer API

Switch the lm32_timer code away from bottom-half based ptimers to the
new transaction-based ptimer API.  This just requires adding
begin/commit calls around the various places that modify the ptimer
state, and using the new ptimer_init() function to create the ytimer.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden


  Commit: 23bc3e3e49818e038f09e05bc3912f3f4ff80f84
      
https://github.com/qemu/qemu/commit/23bc3e3e49818e038f09e05bc3912f3f4ff80f84
  Author: Peter Maydell <address@hidden>
  Date:   2019-10-22 (Tue, 22 Oct 2019)

  Changed paths:
    M hw/timer/altera_timer.c

  Log Message:
  -----------
  hw/timer/altera_timer.c: Switch to transaction-based ptimer API

Switch the altera_timer code away from bottom-half based ptimers to
the new transaction-based ptimer API.  This just requires adding
begin/commit calls around the various places that modify the ptimer
state, and using the new ptimer_init() function to create the timer.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden


  Commit: 2cb42c930b0e4d60164f837ab70253fb43813e93
      
https://github.com/qemu/qemu/commit/2cb42c930b0e4d60164f837ab70253fb43813e93
  Author: Peter Maydell <address@hidden>
  Date:   2019-10-22 (Tue, 22 Oct 2019)

  Changed paths:
    M hw/timer/etraxfs_timer.c

  Log Message:
  -----------
  hw/watchdog/etraxfs_timer.c: Switch to transaction-based ptimer API

Switch the etraxfs_timer code away from bottom-half based ptimers to
the new transaction-based ptimer API.  This just requires adding
begin/commit calls around the various places that modify the ptimer
state, and using the new ptimer_init() function to create the timer.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden


  Commit: 81b2d96b8a19bb6fe3aa93e8185f5527df26fe2a
      
https://github.com/qemu/qemu/commit/81b2d96b8a19bb6fe3aa93e8185f5527df26fe2a
  Author: Peter Maydell <address@hidden>
  Date:   2019-10-22 (Tue, 22 Oct 2019)

  Changed paths:
    M hw/m68k/mcf5208.c

  Log Message:
  -----------
  hw/m68k/mcf5208.c: Switch to transaction-based ptimer API

Switch the mcf5208 code away from bottom-half based ptimers to
the new transaction-based ptimer API.  This just requires adding
begin/commit calls around the various places that modify the ptimer
state, and using the new ptimer_init() function to create the timer.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Thomas Huth <address@hidden>
Message-id: address@hidden


  Commit: efadc8182d978cbc4dfd5aab08798a23d40ecd8a
      
https://github.com/qemu/qemu/commit/efadc8182d978cbc4dfd5aab08798a23d40ecd8a
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-10-22 (Tue, 22 Oct 2019)

  Changed paths:
    M hw/sd/sdhci.c

  Log Message:
  -----------
  hw/sd/sdhci: Add a comment to distinct the i.MX eSDHC functions

This file keeps the various QDev blocks separated by comments.

Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Cleber Rosa <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: c85fba508b6a7e2fdf6be8005998f216a57fba3e
      
https://github.com/qemu/qemu/commit/c85fba508b6a7e2fdf6be8005998f216a57fba3e
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-10-22 (Tue, 22 Oct 2019)

  Changed paths:
    M hw/sd/sdhci.c
    M include/hw/sd/sdhci.h

  Log Message:
  -----------
  hw/sd/sdhci: Add dummy Samsung SDHCI controller

The Linux kernel access few S3C-specific registers [1] to set some
clock. We don't care about this part for device emulation [2]. Add
a dummy device to properly ignore these accesses, so we can focus
on the important registers missing.

[1] 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/mmc/host/sdhci-s3c-regs.h?h=cc014f3
[2] 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/mmc/host/sdhci-s3c.c?h=v5.3#n263

Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Krzysztof Kozlowski <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 72d2b9f1d4a3930e1bce3199afb9da4cb57e5ad7
      
https://github.com/qemu/qemu/commit/72d2b9f1d4a3930e1bce3199afb9da4cb57e5ad7
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-10-22 (Tue, 22 Oct 2019)

  Changed paths:
    M hw/arm/exynos4210.c

  Log Message:
  -----------
  hw/arm/exynos4210: Use the Samsung s3c SDHCI controller

The Exynos SoC has specific SDHCI registers. Use the s3c SDHCI
model which handle these specific registers.

This silents the following "SDHC ... not implemented" warnings so
we can focus on the important registers missing:

  $ qemu-system-arm ... -d unimp \
    -append "... root=/dev/mmcblk0 rootfstype=ext4 rw rootwait" \
    -drive file=linux-build-test/rootfs/arm/rootfs-armv5.ext2,if=sd,format=raw
  [...]
  [   25.744858] sdhci: Secure Digital Host Controller Interface driver
  [   25.745862] sdhci: Copyright(c) Pierre Ossman
  [   25.783188] s3c-sdhci 12530000.sdhci: clock source 2: mmc_busclk.2 
(12000000 Hz)
  SDHC rd_4b @0x80 not implemented
  SDHC wr_4b @0x80 <- 0x00000020 not implemented
  SDHC wr_4b @0x8c <- 0x00030000 not implemented
  SDHC rd_4b @0x80 not implemented
  SDHC wr_4b @0x80 <- 0xc0004100 not implemented
  SDHC wr_4b @0x84 <- 0x80808080 not implemented
  [   26.013318] mmc0: SDHCI controller on samsung-hsmmc [12530000.sdhci] using 
ADMA
  [   26.032318] Synopsys Designware Multimedia Card Interface Driver
  [   42.024885] Waiting for root device /dev/mmcblk0...

Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Krzysztof Kozlowski <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 77a7cc616b46bfd3d16fe876d6e867be44b0b853
      
https://github.com/qemu/qemu/commit/77a7cc616b46bfd3d16fe876d6e867be44b0b853
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-10-22 (Tue, 22 Oct 2019)

  Changed paths:
    M hw/arm/xilinx_zynq.c

  Log Message:
  -----------
  hw/arm/xilinx_zynq: Use the IEC binary prefix definitions

IEC binary prefixes ease code review: the unit is explicit.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: eba599977d9393d6d4dc884d90762d11796ef560
      
https://github.com/qemu/qemu/commit/eba599977d9393d6d4dc884d90762d11796ef560
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-10-22 (Tue, 22 Oct 2019)

  Changed paths:
    M hw/arm/mps2-tz.c
    M hw/arm/mps2.c

  Log Message:
  -----------
  hw/arm/mps2: Use the IEC binary prefix definitions

IEC binary prefixes ease code review: the unit is explicit.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 3cd892daa3e402aedaa9f2809a9ba7216b2ce74f
      
https://github.com/qemu/qemu/commit/3cd892daa3e402aedaa9f2809a9ba7216b2ce74f
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-10-22 (Tue, 22 Oct 2019)

  Changed paths:
    M hw/arm/collie.c
    M hw/arm/strongarm.c
    M hw/arm/strongarm.h

  Log Message:
  -----------
  hw/arm/collie: Create the RAM in the board

The SDRAM is incorrectly created in the SA1110 SoC.
Move its creation in the board code, this will later allow the
board to have the QOM ownership of the RAM.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: e285e8678e6af882c6266a9d588b6f99a837ed97
      
https://github.com/qemu/qemu/commit/e285e8678e6af882c6266a9d588b6f99a837ed97
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-10-22 (Tue, 22 Oct 2019)

  Changed paths:
    M hw/arm/nseries.c
    M hw/arm/omap2.c
    M include/hw/arm/omap.h

  Log Message:
  -----------
  hw/arm/omap2: Create the RAM in the board

The SDRAM is incorrectly created in the OMAP2420 SoC.
Move its creation in the board code, this will later allow the
board to have the QOM ownership of the RAM.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 4387b253acf2360dbbc4e407cf6a58e95d824df9
      
https://github.com/qemu/qemu/commit/4387b253acf2360dbbc4e407cf6a58e95d824df9
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-10-22 (Tue, 22 Oct 2019)

  Changed paths:
    M hw/arm/omap1.c
    M hw/arm/omap_sx1.c
    M hw/arm/palm.c
    M include/hw/arm/omap.h

  Log Message:
  -----------
  hw/arm/omap1: Create the RAM in the board

The SDRAM is incorrectly created in the OMAP310 SoC.
Move its creation in the board code, this will later allow the
board to have the QOM ownership of the RAM.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 90600829b3355b8d27b791b893095c18f529aec3
      
https://github.com/qemu/qemu/commit/90600829b3355b8d27b791b893095c18f529aec3
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-10-22 (Tue, 22 Oct 2019)

  Changed paths:
    M hw/arm/digic_boards.c

  Log Message:
  -----------
  hw/arm/digic4: Inline digic4_board_setup_ram() function

Having the RAM creation code in a separate function is not
very helpful. Move this code directly inside the board_init()
function, this will later allow the board to have the QOM
ownership of the RAM.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: ec97eb6133e204c8c0ee492cfc9c7551b6297aca
      
https://github.com/qemu/qemu/commit/ec97eb6133e204c8c0ee492cfc9c7551b6297aca
  Author: Peter Maydell <address@hidden>
  Date:   2019-10-22 (Tue, 22 Oct 2019)

  Changed paths:
    M hw/arm/collie.c
    M hw/arm/digic_boards.c
    M hw/arm/exynos4210.c
    M hw/arm/mps2-tz.c
    M hw/arm/mps2.c
    M hw/arm/nseries.c
    M hw/arm/omap1.c
    M hw/arm/omap2.c
    M hw/arm/omap_sx1.c
    M hw/arm/palm.c
    M hw/arm/strongarm.c
    M hw/arm/strongarm.h
    M hw/arm/xilinx_zynq.c
    M hw/m68k/mcf5208.c
    M hw/sd/sdhci.c
    M hw/timer/altera_timer.c
    M hw/timer/arm_mptimer.c
    M hw/timer/etraxfs_timer.c
    M hw/timer/exynos4210_mct.c
    M hw/timer/lm32_timer.c
    M hw/timer/puv3_ost.c
    M hw/timer/sh_timer.c
    M include/hw/arm/omap.h
    M include/hw/sd/sdhci.h
    M target/arm/translate.c

  Log Message:
  -----------
  Merge remote-tracking branch 
'remotes/pmaydell/tags/pull-target-arm-20191022-2' into staging

 * Fix sign-extension for SMLAL* instructions
 * Various ptimer device conversions to new transaction API
 * Add a dummy Samsung SDHCI controller model to exynos4 boards
 * Minor refactorings of RAM creation for some arm boards

# gpg: Signature made Tue 22 Oct 2019 17:44:26 BST
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "address@hidden"
# gpg: Good signature from "Peter Maydell <address@hidden>" [ultimate]
# gpg:                 aka "Peter Maydell <address@hidden>" [ultimate]
# gpg:                 aka "Peter Maydell <address@hidden>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20191022-2:
  hw/arm/digic4: Inline digic4_board_setup_ram() function
  hw/arm/omap1: Create the RAM in the board
  hw/arm/omap2: Create the RAM in the board
  hw/arm/collie: Create the RAM in the board
  hw/arm/mps2: Use the IEC binary prefix definitions
  hw/arm/xilinx_zynq: Use the IEC binary prefix definitions
  hw/arm/exynos4210: Use the Samsung s3c SDHCI controller
  hw/sd/sdhci: Add dummy Samsung SDHCI controller
  hw/sd/sdhci: Add a comment to distinct the i.MX eSDHC functions
  hw/m68k/mcf5208.c: Switch to transaction-based ptimer API
  hw/watchdog/etraxfs_timer.c: Switch to transaction-based ptimer API
  hw/timer/altera_timer.c: Switch to transaction-based ptimer API
  hw/timer/lm32_timer: Switch to transaction-based ptimer API
  hw/timer/sh_timer: Switch to transaction-based ptimer API
  hw/timer/puv3_ost.c: Switch to transaction-based ptimer API
  hw/timer/arm_mptimer.c: Undo accidental rename of arm_mptimer_init()
  hw/timer/exynos4210_mct: Initialize ptimer before starting it
  target/arm: Fix sign-extension for SMLAL*

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/f9bec781379d...ec97eb6133e2
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