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[Qemu-commits] [qemu/qemu] 1f6f2b: exec: Use TARGET_PAGE_BITS_MIN for TL

From: Peter Maydell
Subject: [Qemu-commits] [qemu/qemu] 1f6f2b: exec: Use TARGET_PAGE_BITS_MIN for TLB flags
Date: Fri, 27 Sep 2019 07:43:06 -0700 
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 1f6f2b34ad2b9522e3db898550c90dfc4b4c44ed
      
https://github.com/qemu/qemu/commit/1f6f2b34ad2b9522e3db898550c90dfc4b4c44ed
  Author: Richard Henderson <address@hidden>
  Date:   2019-09-25 (Wed, 25 Sep 2019)

  Changed paths:
    M include/exec/cpu-all.h

  Log Message:
  -----------
  exec: Use TARGET_PAGE_BITS_MIN for TLB flags

These bits do not need to vary with the actual page size
used by the guest.

Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: David Hildenbrand <address@hidden>
Reviewed-by: Paolo Bonzini <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: c6b716cdc0f993e43b19849df1f1698723132246
      
https://github.com/qemu/qemu/commit/c6b716cdc0f993e43b19849df1f1698723132246
  Author: Richard Henderson <address@hidden>
  Date:   2019-09-25 (Wed, 25 Sep 2019)

  Changed paths:
    M accel/tcg/cputlb.c
    M include/qemu/compiler.h

  Log Message:
  -----------
  cputlb: Disable __always_inline__ without optimization

This forced inlining can result in missing symbols,
which makes a debugging build harder to follow.

Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: David Hildenbrand <address@hidden>
Reported-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 560e36d5a42e04aa2871c01da6d432592151f7e8
      
https://github.com/qemu/qemu/commit/560e36d5a42e04aa2871c01da6d432592151f7e8
  Author: Richard Henderson <address@hidden>
  Date:   2019-09-25 (Wed, 25 Sep 2019)

  Changed paths:
    M include/qemu/compiler.h

  Log Message:
  -----------
  qemu/compiler.h: Add qemu_build_not_reached

Use this as a compile-time assert that a particular
code path is not reachable.

Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 86b7b9c507b52a430fe3c644c0afbc6adfb92869
      
https://github.com/qemu/qemu/commit/86b7b9c507b52a430fe3c644c0afbc6adfb92869
  Author: Richard Henderson <address@hidden>
  Date:   2019-09-25 (Wed, 25 Sep 2019)

  Changed paths:
    M accel/tcg/cputlb.c

  Log Message:
  -----------
  cputlb: Use qemu_build_not_reached in load/store_helpers

Increase the current runtime assert to a compile-time assert.

Reviewed-by: David Hildenbrand <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 80d9d1c678557df75587359dc99fda1441fabee2
      
https://github.com/qemu/qemu/commit/80d9d1c678557df75587359dc99fda1441fabee2
  Author: Richard Henderson <address@hidden>
  Date:   2019-09-25 (Wed, 25 Sep 2019)

  Changed paths:
    M accel/tcg/cputlb.c

  Log Message:
  -----------
  cputlb: Split out load/store_memop

We will shortly be using these more than once.

Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: David Hildenbrand <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 5b87b3e671c00fd054bcbf4668d99d56b33c598c
      
https://github.com/qemu/qemu/commit/5b87b3e671c00fd054bcbf4668d99d56b33c598c
  Author: Richard Henderson <address@hidden>
  Date:   2019-09-25 (Wed, 25 Sep 2019)

  Changed paths:
    M accel/tcg/cputlb.c
    M include/exec/cpu-all.h

  Log Message:
  -----------
  cputlb: Introduce TLB_BSWAP

Handle bswap on ram directly in load/store_helper.  This fixes a
bug with the previous implementation in that one cannot use the
I/O path for RAM.

Fixes: a26fc6f5152b47f1
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: David Hildenbrand <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 6e050d415662ca97b71410b8c4d91f789872b407
      
https://github.com/qemu/qemu/commit/6e050d415662ca97b71410b8c4d91f789872b407
  Author: Richard Henderson <address@hidden>
  Date:   2019-09-25 (Wed, 25 Sep 2019)

  Changed paths:
    M exec.c
    M memory.c
    M trace-events

  Log Message:
  -----------
  exec: Adjust notdirty tracing

The memory_region_tb_read tracepoint is unreachable, since notdirty
is supposed to apply only to writes.  The memory_region_tb_write
tracepoint is mis-named, because notdirty is not only used for TB
invalidation.  It is also used for e.g. VGA RAM updates and migration.

Replace memory_region_tb_write with memory_notdirty_write_access,
and place it in memory_notdirty_write_prepare where it can catch
all of the instances.  Add memory_notdirty_set_dirty to log when
we no longer intercept writes to a page.

Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: David Hildenbrand <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 7b0d792ce13c0e894ee32a94b321b329724c9a25
      
https://github.com/qemu/qemu/commit/7b0d792ce13c0e894ee32a94b321b329724c9a25
  Author: Richard Henderson <address@hidden>
  Date:   2019-09-25 (Wed, 25 Sep 2019)

  Changed paths:
    M accel/tcg/cputlb.c
    M exec.c
    M include/exec/cpu-all.h
    M include/exec/cpu-common.h

  Log Message:
  -----------
  cputlb: Move ROM handling from I/O path to TLB path

It does not require going through the whole I/O path
in order to discard a write.

Reviewed-by: David Hildenbrand <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 08565552f70ca37da13f24928727f851073cd13e
      
https://github.com/qemu/qemu/commit/08565552f70ca37da13f24928727f851073cd13e
  Author: Richard Henderson <address@hidden>
  Date:   2019-09-25 (Wed, 25 Sep 2019)

  Changed paths:
    M accel/tcg/cputlb.c
    M exec.c
    M include/exec/cpu-common.h
    M memory.c

  Log Message:
  -----------
  cputlb: Move NOTDIRTY handling from I/O path to TLB path

Pages that we want to track for NOTDIRTY are RAM.  We do not
really need to go through the I/O path to handle them.

Acked-by: David Hildenbrand <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 8f5db6415363740d4eac070bb381202c80a7fc34
      
https://github.com/qemu/qemu/commit/8f5db6415363740d4eac070bb381202c80a7fc34
  Author: Richard Henderson <address@hidden>
  Date:   2019-09-25 (Wed, 25 Sep 2019)

  Changed paths:
    M accel/tcg/cputlb.c
    M exec.c
    M include/exec/exec-all.h

  Log Message:
  -----------
  cputlb: Partially inline memory_region_section_get_iotlb

There is only one caller, tlb_set_page_with_attrs.  We cannot
inline the entire function because the AddressSpaceDispatch
structure is private to exec.c, and cannot easily be moved to
include/exec/memory-internal.h.

Compute is_ram and is_romd once within tlb_set_page_with_attrs.
Fold the number of tests against these predicates.  Compute
cpu_physical_memory_is_clean outside of the tlb lock region.

Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 707526ad865dc4064c3984bcc061596a21bf9d3b
      
https://github.com/qemu/qemu/commit/707526ad865dc4064c3984bcc061596a21bf9d3b
  Author: Richard Henderson <address@hidden>
  Date:   2019-09-25 (Wed, 25 Sep 2019)

  Changed paths:
    M accel/tcg/cputlb.c
    M exec.c
    M include/exec/memory-internal.h

  Log Message:
  -----------
  cputlb: Merge and move memory_notdirty_write_{prepare,complete}

Since 9458a9a1df1a, all readers of the dirty bitmaps wait
for the rcu lock, which means that they wait until the end
of any executing TranslationBlock.

As a consequence, there is no need for the actual access
to happen in between the _prepare and _complete.  Therefore,
we can improve things by merging the two functions into
notdirty_write and dropping the NotDirtyInfo structure.

In addition, the only users of notdirty_write are in cputlb.c,
so move the merged function there.  Pass in the CPUIOTLBEntry
from which the ram_addr_t may be computed.

Reviewed-by: David Hildenbrand <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 73bc0bd41b84aaee489118da1d20901d27f3654a
      
https://github.com/qemu/qemu/commit/73bc0bd41b84aaee489118da1d20901d27f3654a
  Author: Richard Henderson <address@hidden>
  Date:   2019-09-25 (Wed, 25 Sep 2019)

  Changed paths:
    M accel/tcg/cputlb.c

  Log Message:
  -----------
  cputlb: Handle TLB_NOTDIRTY in probe_access

We can use notdirty_write for the write and return a valid host
pointer for this case.

Reviewed-by: David Hildenbrand <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: b56668bbe15cb094b4d928870635d079825f3731
      
https://github.com/qemu/qemu/commit/b56668bbe15cb094b4d928870635d079825f3731
  Author: Richard Henderson <address@hidden>
  Date:   2019-09-25 (Wed, 25 Sep 2019)

  Changed paths:
    M accel/tcg/cputlb.c
    M hw/core/cpu.c
    M include/hw/core/cpu.h

  Log Message:
  -----------
  cputlb: Remove cpu->mem_io_vaddr

With the merge of notdirty handling into store_helper,
the last user of cpu->mem_io_vaddr was removed.

Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: David Hildenbrand <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: ce9f5e279223cf422eae8e228fe03d6f60e251a4
      
https://github.com/qemu/qemu/commit/ce9f5e279223cf422eae8e228fe03d6f60e251a4
  Author: Richard Henderson <address@hidden>
  Date:   2019-09-25 (Wed, 25 Sep 2019)

  Changed paths:
    M accel/tcg/translate-all.c
    M accel/tcg/translate-all.h
    M exec.c

  Log Message:
  -----------
  cputlb: Remove tb_invalidate_phys_page_range is_cpu_write_access

All callers pass false to this argument.  Remove it and pass the
constant on to tb_invalidate_phys_page_range__locked.

Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: David Hildenbrand <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 5a7c27bb8a50a1b441a5b4c9d8e65727edec7f27
      
https://github.com/qemu/qemu/commit/5a7c27bb8a50a1b441a5b4c9d8e65727edec7f27
  Author: Richard Henderson <address@hidden>
  Date:   2019-09-25 (Wed, 25 Sep 2019)

  Changed paths:
    M accel/tcg/cputlb.c
    M accel/tcg/translate-all.c
    M accel/tcg/translate-all.h

  Log Message:
  -----------
  cputlb: Pass retaddr to tb_invalidate_phys_page_fast

Rather than rely on cpu->mem_io_pc, pass retaddr down directly.

Within tb_invalidate_phys_page_range__locked, the is_cpu_write_access
parameter is non-zero exactly when retaddr would be non-zero, so that
is a simple replacement.

Recognize that current_tb_not_found is true only when mem_io_pc
(and now retaddr) are also non-zero, so remove a redundant test.

Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: David Hildenbrand <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: ae57db63acf5a0399232f852acc5c1d83ef63400
      
https://github.com/qemu/qemu/commit/ae57db63acf5a0399232f852acc5c1d83ef63400
  Author: Richard Henderson <address@hidden>
  Date:   2019-09-25 (Wed, 25 Sep 2019)

  Changed paths:
    M accel/tcg/translate-all.c
    M accel/tcg/translate-all.h
    M exec.c

  Log Message:
  -----------
  cputlb: Pass retaddr to tb_check_watchpoint

Fixes the previous TLB_WATCHPOINT patches because we are currently
failing to set cpu->mem_io_pc with the call to cpu_check_watchpoint.
Pass down the retaddr directly because it's readily available.

Fixes: 50b107c5d61
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: David Hildenbrand <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: deee6ff7b74799b6233573eca4114ecf7b30b20c
      
https://github.com/qemu/qemu/commit/deee6ff7b74799b6233573eca4114ecf7b30b20c
  Author: Peter Maydell <address@hidden>
  Date:   2019-09-27 (Fri, 27 Sep 2019)

  Changed paths:
    M accel/tcg/cputlb.c
    M accel/tcg/translate-all.c
    M accel/tcg/translate-all.h
    M exec.c
    M hw/core/cpu.c
    M include/exec/cpu-all.h
    M include/exec/cpu-common.h
    M include/exec/exec-all.h
    M include/exec/memory-internal.h
    M include/hw/core/cpu.h
    M include/qemu/compiler.h
    M memory.c
    M trace-events

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190925' into staging

Fixes for TLB_BSWAP
Coversion of NOTDIRTY and ROM handling to cputlb
Followup cleanups to cputlb

# gpg: Signature made Wed 25 Sep 2019 19:41:17 BST
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "address@hidden"
# gpg: Good signature from "Richard Henderson <address@hidden>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-tcg-20190925:
  cputlb: Pass retaddr to tb_check_watchpoint
  cputlb: Pass retaddr to tb_invalidate_phys_page_fast
  cputlb: Remove tb_invalidate_phys_page_range is_cpu_write_access
  cputlb: Remove cpu->mem_io_vaddr
  cputlb: Handle TLB_NOTDIRTY in probe_access
  cputlb: Merge and move memory_notdirty_write_{prepare,complete}
  cputlb: Partially inline memory_region_section_get_iotlb
  cputlb: Move NOTDIRTY handling from I/O path to TLB path
  cputlb: Move ROM handling from I/O path to TLB path
  exec: Adjust notdirty tracing
  cputlb: Introduce TLB_BSWAP
  cputlb: Split out load/store_memop
  cputlb: Use qemu_build_not_reached in load/store_helpers
  qemu/compiler.h: Add qemu_build_not_reached
  cputlb: Disable __always_inline__ without optimization
  exec: Use TARGET_PAGE_BITS_MIN for TLB flags

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/1329132d28bf...deee6ff7b747
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