qemu-commits
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-commits] [qemu/qemu] 8d2b87: hw/mips/mips_jazz: Override do_transa


From: Peter Maydell
Subject: [Qemu-commits] [qemu/qemu] 8d2b87: hw/mips/mips_jazz: Override do_transaction_failed ...
Date: Mon, 16 Sep 2019 02:14:43 -0700

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 8d2b8718dcc11f76b039cffacc7b882f4b729cc2
      
https://github.com/qemu/qemu/commit/8d2b8718dcc11f76b039cffacc7b882f4b729cc2
  Author: Peter Maydell <address@hidden>
  Date:   2019-09-12 (Thu, 12 Sep 2019)

  Changed paths:
    M hw/mips/mips_jazz.c

  Log Message:
  -----------
  hw/mips/mips_jazz: Override do_transaction_failed hook

The MIPS Jazz ('magnum' and 'pica61') boards have some code which
overrides the CPU's do_unassigned_access hook, so they can intercept
it and not raise exceptions on data accesses to invalid addresses,
only for instruction fetches.

We want to switch MIPS over to using the do_transaction_failed
hook instead, so add an intercept for that as well, and make
the board code install whichever hook the CPU is actually using.
Once we've changed the CPU implementation we can remove the
redundant code for the old hook.

Note: I am suspicious that the behaviour as implemented here may not
be what the hardware really does.  It was added in commit
54e755588cf1e90f0b14 to restore the behaviour that was broken by
commit c658b94f6e8c206c59d.  But prior to commit c658b94f6e8c206c59d
every MIPS board generated exceptions for instruction access to
invalid addresses but not for data accesses; and other boards,
notably Malta, were fixed by making all invalid accesses behave as
reads-as-zero (see the call to empty_slot_init() in
mips_malta_init()).  Hardware that raises exceptions for instruction
access and not data access seems to me to be an unlikely design, and
it's possible that the right way to emulate this is to make the Jazz
boards do what we did with Malta (or some variation of that).
Nonetheless, since I don't have access to real hardware to test
against I have taken the approach of "make QEMU continue to behave
the same way it did before this commit".  I have updated the comment
to correct the parts that are no longer accurate and note that
the hardware might behave differently.

The test case for the need for the hook-hijacking is in
https://bugs.launchpad.net/qemu/+bug/1245924 That BIOS will boot OK
either with this overriding of both hooks, or with a simple "global
memory region to ignore bad accesses of all types", so it doesn't
provide evidence either way, unfortunately.

Signed-off-by: Peter Maydell <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Hervé Poussineau <address@hidden>
Message-Id: <address@hidden>


  Commit: 4f02a06d50ef0081089ed8cb3ec7c7986e3c95f8
      
https://github.com/qemu/qemu/commit/4f02a06d50ef0081089ed8cb3ec7c7986e3c95f8
  Author: Peter Maydell <address@hidden>
  Date:   2019-09-12 (Thu, 12 Sep 2019)

  Changed paths:
    M target/mips/cpu.c
    M target/mips/internal.h
    M target/mips/op_helper.c

  Log Message:
  -----------
  target/mips: Switch to do_transaction_failed() hook

Switch the MIPS target from the old unassigned_access hook to the new
do_transaction_failed hook.

Unlike the old hook, do_transaction_failed is only ever called from
the TCG memory access paths, so there is no need for the "ignore this
if we're using KVM" hack that we were previously using to work around
the way unassigned_access was called for all kinds of memory accesses
to unassigned physical addresses.

The MIPS target does not ever do direct memory reads by physical
address (via either ldl_phys etc or address_space_ldl etc), so the
only memory accesses this affects are the 'normal' guest loads and
stores, which will be handled by the new hook; their behaviour is
unchanged.

Signed-off-by: Peter Maydell <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Hervé Poussineau <address@hidden>
Message-Id: <address@hidden>


  Commit: 6626286e50d813e1ee79629cb5699c8c2d09fdda
      
https://github.com/qemu/qemu/commit/6626286e50d813e1ee79629cb5699c8c2d09fdda
  Author: Peter Maydell <address@hidden>
  Date:   2019-09-12 (Thu, 12 Sep 2019)

  Changed paths:
    M hw/mips/mips_jazz.c

  Log Message:
  -----------
  hw/mips/mips_jazz: Remove no-longer-necessary override of do_unassigned_access

Now that the MIPS CPU implementation uses the new
do_transaction_failed hook, we can remove the old code that handled
the do_unassigned_access hook.

Signed-off-by: Peter Maydell <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Hervé Poussineau <address@hidden>
Message-Id: <address@hidden>


  Commit: d1cc1533509012916dceeb7f23accda8a9fee85c
      
https://github.com/qemu/qemu/commit/d1cc1533509012916dceeb7f23accda8a9fee85c
  Author: Libo Zhou <address@hidden>
  Date:   2019-09-12 (Thu, 12 Sep 2019)

  Changed paths:
    M target/mips/gdbstub.c

  Log Message:
  -----------
  target/mips: gdbstub: Revert commit 8e0b373

Multiple reports from users were received regarding failures of
packet 'g' communication with gdb for some MIPS configurations.
It was found out (by bisecting) that the problematic commit is
8e0b373. Revert that commit until a better solution is developed.

Suggested-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Libo Zhou <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Message-Id: <address@hidden>


  Commit: 138985c1ef8b66e4e5b383354e133e05d01d0b5f
      
https://github.com/qemu/qemu/commit/138985c1ef8b66e4e5b383354e133e05d01d0b5f
  Author: Peter Maydell <address@hidden>
  Date:   2019-09-13 (Fri, 13 Sep 2019)

  Changed paths:
    M hw/mips/mips_jazz.c
    M target/mips/cpu.c
    M target/mips/gdbstub.c
    M target/mips/internal.h
    M target/mips/op_helper.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-sep-12-2019' 
into staging

MIPS queue for September 12th, 2019

# gpg: Signature made Thu 12 Sep 2019 17:26:10 BST
# gpg:                using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <address@hidden>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01  DD75 D497 2A89 67F7 5A65

* remotes/amarkovic/tags/mips-queue-sep-12-2019:
  target/mips: gdbstub: Revert commit 8e0b373
  hw/mips/mips_jazz: Remove no-longer-necessary override of do_unassigned_access
  target/mips: Switch to do_transaction_failed() hook
  hw/mips/mips_jazz: Override do_transaction_failed hook

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/85182c96de61...138985c1ef8b



reply via email to

[Prev in Thread] Current Thread [Next in Thread]