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[Qemu-commits] [qemu/qemu] 429a71: Revert "target/arm: Use unallocated_e
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From: |
Peter Maydell |
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Subject: |
[Qemu-commits] [qemu/qemu] 429a71: Revert "target/arm: Use unallocated_encoding for a... |
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Date: |
Wed, 04 Sep 2019 06:44:32 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 429a71d67ec04177df614be909e9300a6bbd6830
https://github.com/qemu/qemu/commit/429a71d67ec04177df614be909e9300a6bbd6830
Author: Richard Henderson <address@hidden>
Date: 2019-09-03 (Tue, 03 Sep 2019)
Changed paths:
M target/arm/translate-a64.c
M target/arm/translate-a64.h
M target/arm/translate-vfp.inc.c
M target/arm/translate.c
M target/arm/translate.h
Log Message:
-----------
Revert "target/arm: Use unallocated_encoding for aarch32"
This reverts commit 3cb36637157088892e9e33ddb1034bffd1251d3b.
Despite the fact that the text for the call to gen_exception_insn
is identical for aarch64 and aarch32, the implementation inside
gen_exception_insn is totally different.
This fixes exceptions raised from aarch64.
Reported-by: Laurent Desnogues <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Laurent Desnogues <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 1ce21ba1eaf08b22da5925f3e37fc0b4322da858
https://github.com/qemu/qemu/commit/1ce21ba1eaf08b22da5925f3e37fc0b4322da858
Author: Richard Henderson <address@hidden>
Date: 2019-09-03 (Tue, 03 Sep 2019)
Changed paths:
M target/arm/translate-vfp.inc.c
M target/arm/translate.c
Log Message:
-----------
target/arm: Factor out unallocated_encoding for aarch32
Make this a static function private to translate.c.
Thus we can use the same idiom between aarch64 and aarch32
without actually sharing function implementations.
Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Laurent Desnogues <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 37ff584c15bc3e1dd2c26b1998f00ff87189538c
https://github.com/qemu/qemu/commit/37ff584c15bc3e1dd2c26b1998f00ff87189538c
Author: Peter Maydell <address@hidden>
Date: 2019-09-03 (Tue, 03 Sep 2019)
Changed paths:
M target/arm/cpu.h
M target/arm/translate-a64.c
M target/arm/translate.c
Log Message:
-----------
target/arm: Allow ARMCPRegInfo read/write functions to throw exceptions
Currently the only part of an ARMCPRegInfo which is allowed to cause
a CPU exception is the access function, which returns a value indicating
that some flavour of UNDEF should be generated.
For the ATS system instructions, we would like to conditionally
generate exceptions as part of the writefn, because some faults
during the page table walk (like external aborts) should cause
an exception to be raised rather than returning a value.
There are several ways we could do this:
* plumb the GETPC() value from the top level set_cp_reg/get_cp_reg
helper functions through into the readfn and writefn hooks
* add extra readfn_with_ra/writefn_with_ra hooks that take the GETPC()
value
* require the ATS instructions to provide a dummy accessfn,
which serves no purpose except to cause the code generation
to emit TCG ops to sync the CPU state
* add an ARM_CP_ flag to mark the ARMCPRegInfo as possibly
throwing an exception in its read/write hooks, and make the
codegen sync the CPU state before calling the hooks if the
flag is set
This patch opts for the last of these, as it is fairly simple
to implement and doesn't require invasive changes like updating
the readfn/writefn hook function prototype signature.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Tested-by: Edgar E. Iglesias <address@hidden>
Message-id: address@hidden
Commit: 0710b2fa84a4aeb925422e1e88edac49ed407c79
https://github.com/qemu/qemu/commit/0710b2fa84a4aeb925422e1e88edac49ed407c79
Author: Peter Maydell <address@hidden>
Date: 2019-09-03 (Tue, 03 Sep 2019)
Changed paths:
M target/arm/helper.c
Log Message:
-----------
target/arm: Take exceptions on ATS instructions when needed
The translation table walk for an ATS instruction can result in
various faults. In general these are just reported back via the
PAR_EL1 fault status fields, but in some cases the architecture
requires that the fault is turned into an exception:
* synchronous stage 2 faults of any kind during AT S1E0* and
AT S1E1* instructions executed from NS EL1 fault to EL2 or EL3
* synchronous external aborts are taken as Data Abort exceptions
(This is documented in the v8A Arm ARM DDI0487A.e D5.2.11 and
G5.13.4.)
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Tested-by: Edgar E. Iglesias <address@hidden>
Message-id: address@hidden
Commit: 77a132ea7ea0df6807f3d2f10661dced52f57413
https://github.com/qemu/qemu/commit/77a132ea7ea0df6807f3d2f10661dced52f57413
Author: Andrew Jeffery <address@hidden>
Date: 2019-09-03 (Tue, 03 Sep 2019)
Changed paths:
M hw/timer/aspeed_timer.c
Log Message:
-----------
aspeed/timer: Provide back-pressure information for short periods
First up: This is not the way the hardware behaves.
However, it helps resolve real-world problems with short periods being
used under Linux. Commit 4451d3f59f2a ("clocksource/drivers/fttmr010:
Fix set_next_event handler") in Linux fixed the timer driver to
correctly schedule the next event for the Aspeed controller, and in
combination with 5daa8212c08e ("ARM: dts: aspeed: Describe random number
device") Linux will now set a timer with a period as low as 1us.
Configuring a qemu timer with such a short period results in spending
time handling the interrupt in the model rather than executing guest
code, leading to noticeable "sticky" behaviour in the guest.
The behaviour of Linux is correct with respect to the hardware, so we
need to improve our handling under emulation. The approach chosen is to
provide back-pressure information by calculating an acceptable minimum
number of ticks to be set on the model. Under Linux an additional read
is added in the timer configuration path to detect back-pressure, which
will never occur on hardware. However if back-pressure is observed, the
driver alerts the clock event subsystem, which then performs its own
next event dilation via a config option - d1748302f70b ("clockevents:
Make minimum delay adjustments configurable")
A minimum period of 5us was experimentally determined on a Lenovo
T480s, which I've increased to 20us for "safety".
Signed-off-by: Andrew Jeffery <address@hidden>
Reviewed-by: Joel Stanley <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Joel Stanley <address@hidden>
Signed-off-by: Cédric Le Goater <address@hidden>
Message-id: address@hidden
[clg: - changed the computation of min_ticks to be done each time the
timer value is reloaded. It removes the ordering issue of the
timer and scu reset handlers but is slightly slower ]
- introduced TIMER_MIN_NS
- introduced calculate_min_ticks() ]
Signed-off-by: Cédric Le Goater <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: 8ccb56384940651c251b414216b260f33bcae7ae
https://github.com/qemu/qemu/commit/8ccb56384940651c251b414216b260f33bcae7ae
Author: Eric Auger <address@hidden>
Date: 2019-09-03 (Tue, 03 Sep 2019)
Changed paths:
M include/exec/memory.h
M memory.c
Log Message:
-----------
memory: Remove unused memory_region_iommu_replay_all()
memory_region_iommu_replay_all is not used. Remove it.
Signed-off-by: Eric Auger <address@hidden>
Reported-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Peter Xu <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 51b6d3681f66ada7c3bac331846ef009c3eafeb8
https://github.com/qemu/qemu/commit/51b6d3681f66ada7c3bac331846ef009c3eafeb8
Author: Eric Auger <address@hidden>
Date: 2019-09-03 (Tue, 03 Sep 2019)
Changed paths:
M hw/arm/smmuv3.c
Log Message:
-----------
hw/arm/smmuv3: Log a guest error when decoding an invalid STE
Log a guest error when encountering an invalid STE.
Signed-off-by: Eric Auger <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 3499ec086a30508383cdcb3cabdaa90356712dd3
https://github.com/qemu/qemu/commit/3499ec086a30508383cdcb3cabdaa90356712dd3
Author: Eric Auger <address@hidden>
Date: 2019-09-03 (Tue, 03 Sep 2019)
Changed paths:
M hw/arm/smmuv3-internal.h
M hw/arm/smmuv3.c
Log Message:
-----------
hw/arm/smmuv3: Remove spurious error messages on IOVA invalidations
An IOVA/ASID invalidation is notified to all IOMMU Memory Regions
through smmuv3_inv_notifiers_iova/smmuv3_notify_iova.
When the notification occurs it is possible that some of the
PCIe devices associated to the notified regions do not have a
valid stream table entry. In that case we output a LOG_GUEST_ERROR
message, for example:
invalid sid=<SID> (L1STD span=0)
"smmuv3_notify_iova error decoding the configuration for iommu mr=<MR>
This is unfortunate as the user gets the impression that there
are some translation decoding errors whereas there are not.
This patch adds a new field in SMMUEventInfo that tells whether
the detection of an invalid STE must lead to an error report.
invalid_ste_allowed is set before doing the invalidations and
kept unset on actual translation.
The other configuration decoding error messages are kept since if the
STE is valid then the rest of the config must be correct.
Signed-off-by: Eric Auger <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: e0a0c8322b8ebcdad674f443a3e86db8708d6738
https://github.com/qemu/qemu/commit/e0a0c8322b8ebcdad674f443a3e86db8708d6738
Author: Richard Henderson <address@hidden>
Date: 2019-09-03 (Tue, 03 Sep 2019)
Changed paths:
M target/arm/translate.c
Log Message:
-----------
target/arm: Fix SMMLS argument order
The previous simplification got the order of operands to the
subtraction wrong. Since the 64-bit product is the subtrahend,
we must use a 64-bit subtract to properly compute the borrow
from the low-part of the product.
Fixes: 5f8cd06ebcf5 ("target/arm: Simplify SMMLA, SMMLAR, SMMLS, SMMLSR")
Reported-by: Laurent Desnogues <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Tested-by: Laurent Desnogues <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: 8a863c8120994981a099aff2583d2f3b84552567
https://github.com/qemu/qemu/commit/8a863c8120994981a099aff2583d2f3b84552567
Author: Philippe Mathieu-Daudé <address@hidden>
Date: 2019-09-03 (Tue, 03 Sep 2019)
Changed paths:
M hw/arm/allwinner-a10.c
M hw/arm/cubieboard.c
M hw/arm/digic.c
M hw/arm/fsl-imx25.c
M hw/arm/fsl-imx31.c
M hw/arm/fsl-imx6.c
M hw/arm/fsl-imx6ul.c
M hw/arm/xlnx-zynqmp.c
Log Message:
-----------
hw/arm: Use ARM_CPU_TYPE_NAME() macro when appropriate
Commit ba1ba5cca introduce the ARM_CPU_TYPE_NAME() macro.
Unify the code base by use it in all places.
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 7840938e259f880340109f83bc48c87a250662bd
https://github.com/qemu/qemu/commit/7840938e259f880340109f83bc48c87a250662bd
Author: Philippe Mathieu-Daudé <address@hidden>
Date: 2019-09-03 (Tue, 03 Sep 2019)
Changed paths:
M hw/arm/mcimx7d-sabre.c
M hw/arm/mps2-tz.c
M hw/arm/musca.c
Log Message:
-----------
hw/arm: Use object_initialize_child for correct reference counting
As explained in commit aff39be0ed97:
Both functions, object_initialize() and object_property_add_child()
increase the reference counter of the new object, so one of the
references has to be dropped afterwards to get the reference
counting right. Otherwise the child object will not be properly
cleaned up when the parent gets destroyed.
Thus let's use now object_initialize_child() instead to get the
reference counting here right.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 5e039af81667c95a6bd5629e1c7f4422a8857ea1
https://github.com/qemu/qemu/commit/5e039af81667c95a6bd5629e1c7f4422a8857ea1
Author: Philippe Mathieu-Daudé <address@hidden>
Date: 2019-09-03 (Tue, 03 Sep 2019)
Changed paths:
M hw/arm/exynos4_boards.c
Log Message:
-----------
hw/arm: Use sysbus_init_child_obj for correct reference counting
Both object_initialize() and qdev_set_parent_bus() increase the
reference counter of the new object, so one of the references has
to be dropped afterwards to get the reference counting right.
In machine model code this refcount leak is not particularly
problematic because (unlike devices) machines will never be
created on demand via QMP, and they are never destroyed.
But in any case let's use the new sysbus_init_child_obj() instead
to get the reference counting here right.
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
[PMM: rewrote commit message]
Signed-off-by: Peter Maydell <address@hidden>
Commit: eaa9a87828c318e60428ef1531a1cc46626c23fe
https://github.com/qemu/qemu/commit/eaa9a87828c318e60428ef1531a1cc46626c23fe
Author: Philippe Mathieu-Daudé <address@hidden>
Date: 2019-09-03 (Tue, 03 Sep 2019)
Changed paths:
M hw/arm/fsl-imx25.c
M hw/arm/fsl-imx31.c
Log Message:
-----------
hw/arm/fsl-imx: Add the cpu as child of the SoC object
Child properties form the composition tree. All objects need to be
a child of another object. Objects can only be a child of one object.
Respect this with the i.MX SoC, to get a cleaner composition tree.
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 00b0fd4883f0ef46c2af9578f1c51a2cdaab245f
https://github.com/qemu/qemu/commit/00b0fd4883f0ef46c2af9578f1c51a2cdaab245f
Author: Philippe Mathieu-Daudé <address@hidden>
Date: 2019-09-03 (Tue, 03 Sep 2019)
Changed paths:
M hw/dma/xilinx_axidma.c
Log Message:
-----------
hw/dma/xilinx_axi: Use object_initialize_child for correct ref. counting
As explained in commit aff39be0ed97:
Both functions, object_initialize() and object_property_add_child()
increase the reference counter of the new object, so one of the
references has to be dropped afterwards to get the reference
counting right. Otherwise the child object will not be properly
cleaned up when the parent gets destroyed.
Thus let's use now object_initialize_child() instead to get the
reference counting here right.
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 65da914295795124affbce2952b10b2485a6044a
https://github.com/qemu/qemu/commit/65da914295795124affbce2952b10b2485a6044a
Author: Philippe Mathieu-Daudé <address@hidden>
Date: 2019-09-03 (Tue, 03 Sep 2019)
Changed paths:
M hw/net/xilinx_axienet.c
Log Message:
-----------
hw/net/xilinx_axi: Use object_initialize_child for correct ref. counting
As explained in commit aff39be0ed97:
Both functions, object_initialize() and object_property_add_child()
increase the reference counter of the new object, so one of the
references has to be dropped afterwards to get the reference
counting right. Otherwise the child object will not be properly
cleaned up when the parent gets destroyed.
Thus let's use now object_initialize_child() instead to get the
reference counting here right.
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 3306bd509c7e47fa0af1f1964fadfe086d8f24aa
https://github.com/qemu/qemu/commit/3306bd509c7e47fa0af1f1964fadfe086d8f24aa
Author: Alex Bennée <address@hidden>
Date: 2019-09-03 (Tue, 03 Sep 2019)
Changed paths:
M include/sysemu/sysemu.h
Log Message:
-----------
includes: remove stale [smp|max]_cpus externs
Commit a5e0b3311 removed these in favour of querying machine
properties. Remove the extern declarations as well.
Signed-off-by: Alex Bennée <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Cc: Like Xu <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: 2bc89637b7b79e35c539758dd47c72d30eddf8bd
https://github.com/qemu/qemu/commit/2bc89637b7b79e35c539758dd47c72d30eddf8bd
Author: Emilio G. Cota <address@hidden>
Date: 2019-09-03 (Tue, 03 Sep 2019)
Changed paths:
M tcg/README
Log Message:
-----------
tcg/README: fix typo s/afterwise/afterwards/
Afterwise is "wise after the fact", as in "hindsight".
Here we meant "afterwards" (as in "subsequently"). Fix it.
Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Emilio G. Cota <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Alex Bennée <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 358f6348df5ad785c7c18be659d4ff9a2174635f
https://github.com/qemu/qemu/commit/358f6348df5ad785c7c18be659d4ff9a2174635f
Author: Emilio G. Cota <address@hidden>
Date: 2019-09-03 (Tue, 03 Sep 2019)
Changed paths:
M accel/tcg/atomic_template.h
Log Message:
-----------
atomic_template: fix indentation in GEN_ATOMIC_HELPER
Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Emilio G. Cota <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Alex Bennée <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 1eb21c428b1e8c9845c82c152a75d046fb19d6fe
https://github.com/qemu/qemu/commit/1eb21c428b1e8c9845c82c152a75d046fb19d6fe
Author: Alex Bennée <address@hidden>
Date: 2019-09-03 (Tue, 03 Sep 2019)
Changed paths:
M include/exec/cpu-defs.h
Log Message:
-----------
include/exec/cpu-defs.h: fix typo
Signed-off-by: Alex Bennée <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 342d27581bd3ecdb995e4fc55fcd383cf3242888
https://github.com/qemu/qemu/commit/342d27581bd3ecdb995e4fc55fcd383cf3242888
Author: Peter Maydell <address@hidden>
Date: 2019-09-03 (Tue, 03 Sep 2019)
Changed paths:
M target/arm/translate-vfp.inc.c
Log Message:
-----------
target/arm: Free TCG temps in trans_VMOV_64_sp()
The function neon_store_reg32() doesn't free the TCG temp that it
is passed, so the caller must do that. We got this right in most
places but forgot to free the TCG temps in trans_VMOV_64_sp().
Cc: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
Commit: 5e5584c89f36b302c666bc6db535fd3f7ff35ad2
https://github.com/qemu/qemu/commit/5e5584c89f36b302c666bc6db535fd3f7ff35ad2
Author: Peter Maydell <address@hidden>
Date: 2019-09-03 (Tue, 03 Sep 2019)
Changed paths:
M target/arm/translate.c
Log Message:
-----------
target/arm: Don't abort on M-profile exception return in linux-user mode
An attempt to do an exception-return (branch to one of the magic
addresses) in linux-user mode for M-profile should behave like
a normal branch, because linux-user mode is always going to be
in 'handler' mode. This used to work, but we broke it when we added
support for the M-profile security extension in commit d02a8698d7ae2bfed.
In that commit we allowed even handler-mode calls to magic return
values to be checked for and dealt with by causing an
EXCP_EXCEPTION_EXIT exception to be taken, because this is
needed for the FNC_RETURN return-from-non-secure-function-call
handling. For system mode we added a check in do_v7m_exception_exit()
to make any spurious calls from Handler mode behave correctly, but
forgot that linux-user mode would also be affected.
How an attempted return-from-non-secure-function-call in linux-user
mode should be handled is not clear -- on real hardware it would
result in return to secure code (not to the Linux kernel) which
could then handle the error in any way it chose. For QEMU we take
the simple approach of treating this erroneous return the same way
it would be handled on a CPU without the security extensions --
treat it as a normal branch.
The upshot of all this is that for linux-user mode we should never
do any of the bx_excret magic, so the code change is simple.
This ought to be a weird corner case that only affects broken guest
code (because Linux user processes should never be attempting to do
exception returns or NS function returns), except that the code that
assigns addresses in RAM for the process and stack in our linux-user
code does not attempt to avoid this magic address range, so
legitimate code attempting to return to a trampoline routine on the
stack can fall into this case. This change fixes those programs,
but we should also look at restricting the range of memory we
use for M-profile linux-user guests to the area that would be
real RAM in hardware.
Cc: address@hidden
Reported-by: Christophe Lyon <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Fixes: https://bugs.launchpad.net/qemu/+bug/1840922
Signed-off-by: Peter Maydell <address@hidden>
Commit: 3c8153d3f50b7a94d06a1b34138a9fe6fd49f538
https://github.com/qemu/qemu/commit/3c8153d3f50b7a94d06a1b34138a9fe6fd49f538
Author: Peter Maydell <address@hidden>
Date: 2019-09-04 (Wed, 04 Sep 2019)
Changed paths:
M accel/tcg/atomic_template.h
M hw/arm/allwinner-a10.c
M hw/arm/cubieboard.c
M hw/arm/digic.c
M hw/arm/exynos4_boards.c
M hw/arm/fsl-imx25.c
M hw/arm/fsl-imx31.c
M hw/arm/fsl-imx6.c
M hw/arm/fsl-imx6ul.c
M hw/arm/mcimx7d-sabre.c
M hw/arm/mps2-tz.c
M hw/arm/musca.c
M hw/arm/smmuv3-internal.h
M hw/arm/smmuv3.c
M hw/arm/xlnx-zynqmp.c
M hw/dma/xilinx_axidma.c
M hw/net/xilinx_axienet.c
M hw/timer/aspeed_timer.c
M include/exec/cpu-defs.h
M include/exec/memory.h
M include/sysemu/sysemu.h
M memory.c
M target/arm/cpu.h
M target/arm/helper.c
M target/arm/translate-a64.c
M target/arm/translate-a64.h
M target/arm/translate-vfp.inc.c
M target/arm/translate.c
M target/arm/translate.h
M tcg/README
Log Message:
-----------
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190903'
into staging
target-arm queue:
* Revert and correctly fix refactoring of unallocated_encoding()
* Take exceptions on ATS instructions when needed
* aspeed/timer: Provide back-pressure information for short periods
* memory: Remove unused memory_region_iommu_replay_all()
* hw/arm/smmuv3: Log a guest error when decoding an invalid STE
* hw/arm/smmuv3: Remove spurious error messages on IOVA invalidations
* target/arm: Fix SMMLS argument order
* hw/arm: Use ARM_CPU_TYPE_NAME() macro when appropriate
* hw/arm: Correct reference counting for creation of various objects
* includes: remove stale [smp|max]_cpus externs
* tcg/README: fix typo
* atomic_template: fix indentation in GEN_ATOMIC_HELPER
* include/exec/cpu-defs.h: fix typo
* target/arm: Free TCG temps in trans_VMOV_64_sp()
* target/arm: Don't abort on M-profile exception return in linux-user mode
# gpg: Signature made Tue 03 Sep 2019 16:35:19 BST
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "address@hidden"
# gpg: Good signature from "Peter Maydell <address@hidden>" [ultimate]
# gpg: aka "Peter Maydell <address@hidden>" [ultimate]
# gpg: aka "Peter Maydell <address@hidden>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20190903: (21 commits)
target/arm: Don't abort on M-profile exception return in linux-user mode
target/arm: Free TCG temps in trans_VMOV_64_sp()
include/exec/cpu-defs.h: fix typo
atomic_template: fix indentation in GEN_ATOMIC_HELPER
tcg/README: fix typo s/afterwise/afterwards/
includes: remove stale [smp|max]_cpus externs
hw/net/xilinx_axi: Use object_initialize_child for correct ref. counting
hw/dma/xilinx_axi: Use object_initialize_child for correct ref. counting
hw/arm/fsl-imx: Add the cpu as child of the SoC object
hw/arm: Use sysbus_init_child_obj for correct reference counting
hw/arm: Use object_initialize_child for correct reference counting
hw/arm: Use ARM_CPU_TYPE_NAME() macro when appropriate
target/arm: Fix SMMLS argument order
hw/arm/smmuv3: Remove spurious error messages on IOVA invalidations
hw/arm/smmuv3: Log a guest error when decoding an invalid STE
memory: Remove unused memory_region_iommu_replay_all()
aspeed/timer: Provide back-pressure information for short periods
target/arm: Take exceptions on ATS instructions when needed
target/arm: Allow ARMCPRegInfo read/write functions to throw exceptions
target/arm: Factor out unallocated_encoding for aarch32
...
Signed-off-by: Peter Maydell <address@hidden>
Compare: https://github.com/qemu/qemu/compare/6b422e5f58f5...3c8153d3f50b
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