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[Qemu-commits] [qemu/qemu] f1d18b: ppc/pnv: Set default ram size to 1.75
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From: |
Peter Maydell |
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Subject: |
[Qemu-commits] [qemu/qemu] f1d18b: ppc/pnv: Set default ram size to 1.75GB |
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Date: |
Wed, 04 Sep 2019 01:16:32 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: f1d18b0a7e29837cfc691688475a8fd5e53cf612
https://github.com/qemu/qemu/commit/f1d18b0a7e29837cfc691688475a8fd5e53cf612
Author: Joel Stanley <address@hidden>
Date: 2019-08-29 (Thu, 29 Aug 2019)
Changed paths:
M hw/ppc/pnv.c
Log Message:
-----------
ppc/pnv: Set default ram size to 1.75GB
This makes the powernv machine easier for end users as the default
initrd address (1.5GB) is now within RAM.
This uses less than 2GB of RAM to ensure 32 bit Qemu still works.
Signed-off-by: Joel Stanley <address@hidden>
Message-Id: <address@hidden>
[dwg: Fix comment style for checkpatch]
Signed-off-by: David Gibson <address@hidden>
Commit: 892609056ddff373f8c8c55525a53dd932ee403d
https://github.com/qemu/qemu/commit/892609056ddff373f8c8c55525a53dd932ee403d
Author: Joel Stanley <address@hidden>
Date: 2019-08-29 (Thu, 29 Aug 2019)
Changed paths:
M pc-bios/skiboot.lid
M roms/skiboot
Log Message:
-----------
ppc/pnv: update skiboot to v6.4
Currently we fail to boot a qemu powernv machine with a Power9
processor:
PLAT: Detected generic platform
PLAT: Detected BMC platform generic
CPU: All 1 processors called in...
CHIPTOD: Unknown TOD type !
CHIPTOD: Failed ChipTOD detection !
Aborting!
With v6.4 we can boot both a Power8 and Power9 powernv machine.
Built from submodule with powerpc64le-linux-gnu-gcc (Debian 8.3.0-2).
Signed-off-by: Joel Stanley <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 45a73a19606488e093ecd0cef42ce28d8c4d37c4
https://github.com/qemu/qemu/commit/45a73a19606488e093ecd0cef42ce28d8c4d37c4
Author: Cédric Le Goater <address@hidden>
Date: 2019-08-29 (Thu, 29 Aug 2019)
Changed paths:
M hw/ppc/pnv_xscom.c
Log Message:
-----------
ppc/pnv: add more dummy XSCOM addresses for the P9 CAPP
Signed-off-by: Cédric Le Goater <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: f47a08d1a71825c10188968251e6f4a8ef647b99
https://github.com/qemu/qemu/commit/f47a08d1a71825c10188968251e6f4a8ef647b99
Author: Cédric Le Goater <address@hidden>
Date: 2019-08-29 (Thu, 29 Aug 2019)
Changed paths:
M hw/ppc/pnv.c
Log Message:
-----------
ppc/pnv: Generate phandle for the "interrupt-parent" property
Devices such as the BT or serial devices require a valid
"interrupt-parent" phandle in the device tree and it is currently
empty (0x0). It was not a problem until now but since OpenFirmare
started using a recent libdft (>= 1.4.7), petitboot fails to boot the
system image with error :
dtc_resize: fdt_open_into returned FDT_ERR_BADMAGIC
Provide a phandle for the LPC bus.
Suggested-by: Greg Kurz <address@hidden>
Signed-off-by: Cédric Le Goater <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: f30c843ced5055fde71d28d10beb15af97fdfe39
https://github.com/qemu/qemu/commit/f30c843ced5055fde71d28d10beb15af97fdfe39
Author: Cédric Le Goater <address@hidden>
Date: 2019-08-29 (Thu, 29 Aug 2019)
Changed paths:
M hw/ppc/pnv.c
M tests/pnv-xscom-test.c
Log Message:
-----------
ppc/pnv: Introduce PowerNV machines with fixed CPU models
Make the current "powernv" machine an abstract type and derive from it
new machines with specific CPU models: power8 and power9.
The "powernv" machine is now an alias on the "powernv9" machine.
Signed-off-by: Cédric Le Goater <address@hidden>
Message-Id: <address@hidden>
[dwg: Adjust pnv-xscom-test to cope with this change]
Signed-off-by: David Gibson <address@hidden>
Commit: 5185a5b6c70ed8d9cc693118c243e5f32ab5094e
https://github.com/qemu/qemu/commit/5185a5b6c70ed8d9cc693118c243e5f32ab5094e
Author: Cédric Le Goater <address@hidden>
Date: 2019-08-29 (Thu, 29 Aug 2019)
Changed paths:
M tests/boot-serial-test.c
Log Message:
-----------
tests/boot-serial-test: add support for all the PowerNV machines
Use the machine names specifiying the CPU type, POWER8 and POWER9.
Signed-off-by: Cédric Le Goater <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 256be7d07a0c1f9d8e2076aa4f7ca4fc048f6838
https://github.com/qemu/qemu/commit/256be7d07a0c1f9d8e2076aa4f7ca4fc048f6838
Author: Paul A. Clarke <address@hidden>
Date: 2019-08-29 (Thu, 29 Aug 2019)
Changed paths:
M target/ppc/translate/vsx-impl.inc.c
Log Message:
-----------
ppc: Fix xsmaddmdp and friends
A class of instructions of the form:
op Target,A,B
which operate like:
Target = Target * A + B
have a bit set which distinguishes them from instructions that operate as:
Target = Target * B + A
This bit is not being checked properly (using PPC_BIT macro), so all
instructions in this class are operating incorrectly as the second form
above. The bit was being checked as if it were part of a 64-bit
instruction opcode, rather than a proper 32-bit opcode. Fix by using the
macro (PPC_BIT32) which treats the opcode as a 32-bit quantity.
Fixes: c9f4e4d8b632 ("target/ppc: improve VSX_FMADD with new
GEN_VSX_HELPER_VSX_MADD macro")
Signed-off-by: Paul A. Clarke <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Laurent Vivier <address@hidden>
Tested-by: Laurent Vivier <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: fa7d9cb9600ab100c318a1de3ed6f4b4fcbad506
https://github.com/qemu/qemu/commit/fa7d9cb9600ab100c318a1de3ed6f4b4fcbad506
Author: Paul A. Clarke <address@hidden>
Date: 2019-08-29 (Thu, 29 Aug 2019)
Changed paths:
M target/ppc/fpu_helper.c
Log Message:
-----------
ppc: Fix xscvdpspn for SNAN
The xscvdpspn instruction implements a non-arithmetic conversion.
In particular, NaNs are not silenced and rounding is not performed.
Rewrite to match the pseudocode for ConvertDPtoSP_NS() in the
Power 3.0B manual.
Signed-off-by: Paul A. Clarke <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
[dwg: Replaced description with clearer version from rth]
Signed-off-by: David Gibson <address@hidden>
Commit: 02a1536eee333123c7735cd36484da53b860fbb7
https://github.com/qemu/qemu/commit/02a1536eee333123c7735cd36484da53b860fbb7
Author: Daniel Henrique Barboza <address@hidden>
Date: 2019-08-29 (Thu, 29 Aug 2019)
Changed paths:
M hw/ppc/spapr_pci.c
Log Message:
-----------
spapr_pci: remove all child functions in function zero unplug
There is nothing wrong with how sPAPR handles multifunction PCI
hot unplugs. The problem is that x86 does it simpler. Instead of
removing each non-zero function and then removing function zero,
x86 can remove any function of the slot to trigger the hot unplug.
Libvirt will be directly impacted by this difference, in the
(hopefully soon) PCI Multifunction hot plug/unplug support. For
hot plugs, both x86 and sPAPR will operate the same way: a XML
with all desired functions to be added, then consecutive hotplugs
of all non-zero functions first, zero last. For hot unplugs, at
least in the current state, a XML with the devices to be removed
must also be provided because of how sPAPR operates - x86 does
not need it - since any function unplug will unplug the whole
PCIe slot. This difference puts extra strain in the management
layer, which needs to either handle both archs differently in
the unplug scenario or choose treat x86 like sPAPR, forcing x86
users to cope with sPAPR internals.
This patch changes spapr_pci_unplug_request to handle the
unplug of function zero differently. When removing function zero,
instead of error-ing out if there are any remaining function
DRCs which needs detaching, detach those. This has no effect in
any existing scripts that are detaching the non-zero functions
before function zero, and can be used by management as a shortcut
to remove the whole PCI multifunction device without specifying
each child function.
Signed-off-by: Daniel Henrique Barboza <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: ce03a193e1172ff7d4b3303ec7472dc29183db8c
https://github.com/qemu/qemu/commit/ce03a193e1172ff7d4b3303ec7472dc29183db8c
Author: Laurent Vivier <address@hidden>
Date: 2019-08-29 (Thu, 29 Aug 2019)
Changed paths:
M hw/ppc/spapr.c
M hw/ppc/spapr_cpu_core.c
Log Message:
-----------
pseries: Fix compat_pvr on reset
If we a migrate P8 machine to a P9 machine, the migration fails on
destination with:
error while loading state for instance 0x1 of device 'cpu'
load of migration failed: Operation not permitted
This is caused because the compat_pvr field is only present for the first
CPU.
Originally, spapr_machine_reset() calls ppc_set_compat() to set the value
max_compat_pvr for the first cpu and this was propagated to all CPUs by
spapr_cpu_reset(). Now, as spapr_cpu_reset() is called before that, the
value is not propagated to all CPUs and the migration fails.
To fix that, propagate the new value to all CPUs in spapr_machine_reset().
Fixes: 25c9780d38d4 ("spapr: Reset CAS & IRQ subsystem after devices")
Signed-off-by: Laurent Vivier <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Greg Kurz <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: cbc65a8f22b29680f30a2c86da36be4aedb88b60
https://github.com/qemu/qemu/commit/cbc65a8f22b29680f30a2c86da36be4aedb88b60
Author: Richard Henderson <address@hidden>
Date: 2019-08-29 (Thu, 29 Aug 2019)
Changed paths:
M target/ppc/translate_init.inc.c
Log Message:
-----------
target/ppc: Set float_tininess_before_rounding at cpu reset
As defined in Power 3.0 section 4.4.4 "Underflow Exception",
a tiny result is detected before rounding.
Fixes: https://bugs.launchpad.net/qemu/+bug/1841491
Reported-by: Paul Clarke <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 16ce2fffa660aa0593afaf8e38428c8e21df4080
https://github.com/qemu/qemu/commit/16ce2fffa660aa0593afaf8e38428c8e21df4080
Author: Richard Henderson <address@hidden>
Date: 2019-08-29 (Thu, 29 Aug 2019)
Changed paths:
M target/ppc/fpu_helper.c
Log Message:
-----------
target/ppc: Fix do_float_check_status vs inexact
The underflow and inexact exceptions are not mutually exclusive.
Check for both of them. Tidy the reset of FPSCR[FI].
Fixes: https://bugs.launchpad.net/bugs/1841442
Reported-by: Paul Clarke <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Tested-by: Paul Clarke <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 897b63978946213005603ffafdcd1bcfb45cff27
https://github.com/qemu/qemu/commit/897b63978946213005603ffafdcd1bcfb45cff27
Author: Stefan Brankovic <address@hidden>
Date: 2019-08-29 (Thu, 29 Aug 2019)
Changed paths:
M target/ppc/translate/vmx-impl.inc.c
Log Message:
-----------
target/ppc: Refactor emulation of vmrgew and vmrgow instructions
Since I found this two instructions implemented with tcg, I refactored
them so they are consistent with other similar implementations that
I introduced in this patch.
Also, a new dual macro GEN_VXFORM_TRANS_DUAL is added. This macro is
used if one instruction is realized with direct translation, and second
one with a helper.
Signed-off-by: Stefan Brankovic <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 00eaad2e29dd32dcc21edec086b0e179a42295ff
https://github.com/qemu/qemu/commit/00eaad2e29dd32dcc21edec086b0e179a42295ff
Author: Alexey Kardashevskiy <address@hidden>
Date: 2019-08-29 (Thu, 29 Aug 2019)
Changed paths:
M pc-bios/README
M pc-bios/slof.bin
M roms/SLOF
Log Message:
-----------
pseries: Update SLOF firmware image
This allocates space for FWNMI log in RTAS and fixes phandles at
the ibm,client-architecture-support stage.
The full list is:
* libnet: Fix the check of the argument lengths of the "ping" command
* fdt: Update phandles after H_CAS
* rtas: Reserve space for FWNMI log
Signed-off-by: Alexey Kardashevskiy <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 289af4ac995b13e00c59a7f2ef358690f9c7d04b
https://github.com/qemu/qemu/commit/289af4ac995b13e00c59a7f2ef358690f9c7d04b
Author: Suraj Jitindar Singh <address@hidden>
Date: 2019-08-29 (Thu, 29 Aug 2019)
Changed paths:
M hw/ppc/spapr_rtas.c
M target/ppc/cpu-qom.h
M target/ppc/translate_init.inc.c
Log Message:
-----------
powerpc/spapr: Add host threads parameter to ibm,get_system_parameter
The ibm,get_system_parameter rtas call is used by the guest to retrieve
data relating to certain parameters of the system. The SPLPAR
characteristics option (token 20) is used to determine characteristics of
the environment in which the lpar will run.
It may be useful for a guest to know the number of physical host threads
present on the underlying system where it is being run. Add the
characteristic "HostThrs" to the SPLPAR Characteristics
ibm,get_system_parameter rtas call to expose this information to a
guest. Add a n_host_threads property to the processor class which is
then used to retrieve this information and define it for POWER8 and
POWER9. Other processors will default to 0 and the charateristic won't
be added.
Signed-off-by: Suraj Jitindar Singh <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 9146206eb26c1436c80a7c2ca1e4c5f86b27179d
https://github.com/qemu/qemu/commit/9146206eb26c1436c80a7c2ca1e4c5f86b27179d
Author: David Gibson <address@hidden>
Date: 2019-08-29 (Thu, 29 Aug 2019)
Changed paths:
M hw/ppc/spapr_hcall.c
Log Message:
-----------
spapr: Use SHUTDOWN_CAUSE_SUBSYSTEM_RESET for CAS reboots
The sPAPR platform includes feature negotiation between the guest and
platform. That sometimes requires reconfiguring the virtual hardware, and
in some cases that is a complex enough process that we trigger a system
reset to handle it. That interacts badly with -no-reboot - we trigger the
reboot, -no-reboot means we exit and so the guest never gets to try again.
Eventually we want to get rid of CAS reboots entirely, since they're odd
and irritating for the user. But in the meantime we can fix the -no-reboot
problem by using SHUTDOWN_CAUSE_SUBSYSTEM_RESET which ignores -no-reboot
and seems to be designed for this sort of faux-reset for internal purposes
only.
Signed-off-by: David Gibson <address@hidden>
Commit: 6c3829a26584f16259fbaeafc58a2c57c745cc39
https://github.com/qemu/qemu/commit/6c3829a26584f16259fbaeafc58a2c57c745cc39
Author: Alexey Kardashevskiy <address@hidden>
Date: 2019-08-29 (Thu, 29 Aug 2019)
Changed paths:
M hw/ppc/spapr.c
M include/hw/ppc/spapr.h
Log Message:
-----------
spapr_pci: Advertise BAR reallocation capability
The pseries guests do not normally allocate PCI resources and rely on
the system firmware doing so. Furthermore at least at some point in
the past the pseries guests won't even allowed to change BARs, probably
it is still the case for phyp. So since the initial commit we have [1]
which prevents resource reallocation.
This is not a problem until we want specific BAR alignments, for example,
PAGE_SIZE==64k to make sure we can still map MMIO BARs directly. For
the boot time devices we handle this in SLOF [2] but since QEMU's RTAS
does not allocate BARs, the guest does this instead and does not align
BARs even if Linux is given pci=resource_alignment=16@pci:0:0 as
PCI_PROBE_ONLY makes Linux ignore alignment requests.
ARM folks added a dial to control PCI_PROBE_ONLY via the device tree [3].
This makes use of the dial to advertise to the guest that we can handle
BAR reassignments. This limits the change to the latest pseries machine
to avoid old guests explosion.
We do not remove the flag from [1] as pseries guests are still supported
under phyp so having that removed may cause problems.
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/powerpc/platforms/pseries/setup.c?h=v5.1#n773
[2]
https://git.qemu.org/?p=SLOF.git;a=blob;f=board-qemu/slof/pci-phb.fs;h=06729bcf77a0d4e900c527adcd9befe2a269f65d;hb=HEAD#l338
[3]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f81c11af
Signed-off-by: Alexey Kardashevskiy <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Greg Kurz <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 572ebd08b3c343bd692b816e622b2b511088a346
https://github.com/qemu/qemu/commit/572ebd08b3c343bd692b816e622b2b511088a346
Author: Greg Kurz <address@hidden>
Date: 2019-08-29 (Thu, 29 Aug 2019)
Changed paths:
M hw/ppc/spapr_pci.c
M hw/ppc/spapr_pci_nvlink2.c
M include/hw/pci-host/spapr.h
Log Message:
-----------
spapr/pci: Convert types to QEMU coding style
The QEMU coding style requires:
- to typedef structured types (HACKING)
- to use CamelCase for types and structure names (CODING_STYLE)
Do that for PCI and Nvlink2 code.
Signed-off-by: Greg Kurz <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: b1e815674343a171e51ce447495957e289091e9f
https://github.com/qemu/qemu/commit/b1e815674343a171e51ce447495957e289091e9f
Author: Greg Kurz <address@hidden>
Date: 2019-08-29 (Thu, 29 Aug 2019)
Changed paths:
M hw/ppc/spapr.c
M hw/ppc/spapr_cpu_core.c
Log Message:
-----------
spapr: Set compat mode in spapr_core_plug()
A recent change in spapr_machine_reset() showed that resetting the compat
mode in spapr_machine_reset() for the boot vCPU and in spapr_cpu_reset()
for all other vCPUs was fragile. The fix was thus to reset the compat mode
for all vCPUs in spapr_machine_reset(), but we still have to propagate
it to hot-plugged CPUs. This is still performed from spapr_cpu_reset(),
hence resulting in ppc_set_compat() being called twice for every vCPU at
machine reset. Apart from wasting cycles, which isn't really an issue
during machine reset, this seems to indicate that spapr_cpu_reset() isn't
the best place to set the compat mode.
A natural candidate for CPU-hotplug specific code is spapr_core_plug().
Also, it sits in the same file as spapr_machine_reset() : this makes
it easier for someone who wants to know when the compat PVR is set.
Call ppc_set_compat() from there. This doesn't need to be done for
initial vCPUs since the compat PVR is 0 and spapr_machine_reset() sets
the appropriate value later. No need to do this on manually added vCPUS
on the destination QEMU during migration since the compat PVR is
part of the migrated vCPU state. Both conditions can be checked with
spapr_drc_hotplugged().
Signed-off-by: Greg Kurz <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 3b3f0646a40b0a6e30817f931cafefe743fb0c33
https://github.com/qemu/qemu/commit/3b3f0646a40b0a6e30817f931cafefe743fb0c33
Author: Peter Maydell <address@hidden>
Date: 2019-09-03 (Tue, 03 Sep 2019)
Changed paths:
M hw/ppc/pnv.c
M hw/ppc/pnv_xscom.c
M hw/ppc/spapr.c
M hw/ppc/spapr_cpu_core.c
M hw/ppc/spapr_hcall.c
M hw/ppc/spapr_pci.c
M hw/ppc/spapr_pci_nvlink2.c
M hw/ppc/spapr_rtas.c
M include/hw/pci-host/spapr.h
M include/hw/ppc/spapr.h
M pc-bios/README
M pc-bios/skiboot.lid
M pc-bios/slof.bin
M roms/SLOF
M roms/skiboot
M target/ppc/cpu-qom.h
M target/ppc/fpu_helper.c
M target/ppc/translate/vmx-impl.inc.c
M target/ppc/translate/vsx-impl.inc.c
M target/ppc/translate_init.inc.c
M tests/boot-serial-test.c
M tests/pnv-xscom-test.c
Log Message:
-----------
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.2-20190829' into
staging
ppc patch queue 2018-08-29
Another pull request for ppc-for-4.2. Includes
* Several powernv patches which were pulled last minute from the
last PULL, now that some problems with them have been sorted out
* A fix for -no-reboot which has been broken since the
pseries-rhel4.1.0 machine type
* Add some host threads information which AIX guests will need to
properly scale the PURR and SPURR
* Change behaviour to match x86 when unplugging function 0 of a
multifunction PCI device
* A number of TCG fixes in FPU emulation
And a handful of other assorted fixes and cleanups.
# gpg: Signature made Thu 29 Aug 2019 06:36:23 BST
# gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392
# gpg: Good signature from "David Gibson <address@hidden>" [full]
# gpg: aka "David Gibson (Red Hat) <address@hidden>" [full]
# gpg: aka "David Gibson (ozlabs.org) <address@hidden>" [full]
# gpg: aka "David Gibson (kernel.org) <address@hidden>"
[unknown]
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392
* remotes/dgibson/tags/ppc-for-4.2-20190829:
spapr: Set compat mode in spapr_core_plug()
spapr/pci: Convert types to QEMU coding style
spapr_pci: Advertise BAR reallocation capability
spapr: Use SHUTDOWN_CAUSE_SUBSYSTEM_RESET for CAS reboots
powerpc/spapr: Add host threads parameter to ibm,get_system_parameter
pseries: Update SLOF firmware image
target/ppc: Refactor emulation of vmrgew and vmrgow instructions
target/ppc: Fix do_float_check_status vs inexact
target/ppc: Set float_tininess_before_rounding at cpu reset
pseries: Fix compat_pvr on reset
spapr_pci: remove all child functions in function zero unplug
ppc: Fix xscvdpspn for SNAN
ppc: Fix xsmaddmdp and friends
tests/boot-serial-test: add support for all the PowerNV machines
ppc/pnv: Introduce PowerNV machines with fixed CPU models
ppc/pnv: Generate phandle for the "interrupt-parent" property
ppc/pnv: add more dummy XSCOM addresses for the P9 CAPP
ppc/pnv: update skiboot to v6.4
ppc/pnv: Set default ram size to 1.75GB
Signed-off-by: Peter Maydell <address@hidden>
Compare: https://github.com/qemu/qemu/compare/3483534ec314...3b3f0646a40b
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