[Qemu-commits] [qemu/qemu] 60b725: tests/pflash-cfi02: Add test for supported CFI com...

[Peter Maydell]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 60b725b6d436fadad3b96f1ca02d8d342e75bbac
      
https://github.com/qemu/qemu/commit/60b725b6d436fadad3b96f1ca02d8d342e75bbac
  Author: Stephen Checkoway <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M tests/Makefile.include
    A tests/pflash-cfi02-test.c

  Log Message:
  -----------
  tests/pflash-cfi02: Add test for supported CFI commands

Test the AMD command set for parallel flash chips. This test uses an
ARM musicpal board with a pflash drive to test the following list of
currently-supported commands.
- Autoselect
- CFI
- Sector erase
- Chip erase
- Program
- Unlock bypass
- Reset

Signed-off-by: Stephen Checkoway <address@hidden>
Message-Id: <address@hidden>
Acked-by: Thomas Huth <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
[PMD: reworded the patch subject, g_assert_cmpint -> cmphex]
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: e8aa2d95ea2015ce95d712543c78e09a0130be3b
      
https://github.com/qemu/qemu/commit/e8aa2d95ea2015ce95d712543c78e09a0130be3b
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi01.c
    M hw/block/pflash_cfi02.c
    M hw/block/trace-events

  Log Message:
  -----------
  hw/block/pflash: Simplify trace_pflash_io_read/write()

Call the read() trace function after the value is set, so we can
log the returned value.
Rename the I/O trace functions with '_io_' in their name.

Reviewed-by: Stephen Checkoway <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: c1474acd5d284d69d1543713ef00b90b9712619f
      
https://github.com/qemu/qemu/commit/c1474acd5d284d69d1543713ef00b90b9712619f
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi01.c
    M hw/block/pflash_cfi02.c
    M hw/block/trace-events

  Log Message:
  -----------
  hw/block/pflash: Simplify trace_pflash_data_read/write()

Use a field width format to have a single function to log
the different width accesses.

Reviewed-by: Alistair Francis <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: 6536987fd6aa52adbb6c128db1952e7c62f5c82b
      
https://github.com/qemu/qemu/commit/6536987fd6aa52adbb6c128db1952e7c62f5c82b
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi02.c

  Log Message:
  -----------
  hw/block/pflash_cfi02: Fix debug format string

Always compile the debug code to prevent format string to bitrot.
Delete dead code.

Signed-off-by: Stephen Checkoway <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
[PMD: Extracted from bigger patch, use PRIx32]
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: aeaf6c20dbcfed5c459d9f6b39cb5fa2187f0b29
      
https://github.com/qemu/qemu/commit/aeaf6c20dbcfed5c459d9f6b39cb5fa2187f0b29
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi02.c

  Log Message:
  -----------
  hw/block/pflash_cfi02: Add an enum to define the write cycles

No change in functionality is intended with this commit.

Signed-off-by: Stephen Checkoway <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
[PMD: Extracted from bigger patch]
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: 1d311e738b223452bbfb8ce10cc3327db7bca3ee
      
https://github.com/qemu/qemu/commit/1d311e738b223452bbfb8ce10cc3327db7bca3ee
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi02.c

  Log Message:
  -----------
  hw/block/pflash_cfi02: Add helpers to manipulate the status bits

Pull out all of the code to modify the status into simple helper
functions. Status handling becomes more complex once multiple
chips are interleaved to produce a single device.

No change in functionality is intended with this commit.

Signed-off-by: Stephen Checkoway <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
[PMD: Extracted from bigger patch]
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: 7f7bdcaff5ad88a79257d6b28f95d0491b7f9002
      
https://github.com/qemu/qemu/commit/7f7bdcaff5ad88a79257d6b28f95d0491b7f9002
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi02.c

  Log Message:
  -----------
  hw/block/pflash_cfi02: Simplify a statement using fall through

Signed-off-by: Stephen Checkoway <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
[PMD: Extracted from bigger patch]
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: c3d25271b2117a1416f5818d9d2b399b4e1e77b3
      
https://github.com/qemu/qemu/commit/c3d25271b2117a1416f5818d9d2b399b4e1e77b3
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi02.c

  Log Message:
  -----------
  hw/block/pflash_cfi02: Use the ldst API in pflash_write()

The load/store API eases code review.

Signed-off-by: Stephen Checkoway <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
[PMD: Extracted from bigger patch]
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: 3e4bcf89b7acea62e248ee048c1c67767be88f98
      
https://github.com/qemu/qemu/commit/3e4bcf89b7acea62e248ee048c1c67767be88f98
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi02.c

  Log Message:
  -----------
  hw/block/pflash_cfi02: Use the ldst API in pflash_read()

The load/store API eases code review.

Signed-off-by: Stephen Checkoway <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
[PMD: Extracted from bigger patch, simplified tracing]
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: 06e8b8e3e1bb5f2d189197b050b23d9da3955a41
      
https://github.com/qemu/qemu/commit/06e8b8e3e1bb5f2d189197b050b23d9da3955a41
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi02.c

  Log Message:
  -----------
  hw/block/pflash_cfi02: Extract the pflash_data_read() function

Extract the code block in a new function, remove a goto statement.

Signed-off-by: Stephen Checkoway <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
[PMD: Extracted from bigger patch, remove the XXX tracing comment]
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: aff498cf30363788c8a248ec961829488d37f65e
      
https://github.com/qemu/qemu/commit/aff498cf30363788c8a248ec961829488d37f65e
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi02.c

  Log Message:
  -----------
  hw/block/pflash_cfi02: Unify the MemoryRegionOps

The pflash_read()/pflash_write() can check the device endianess
via the pfl->be variable, so remove the 'int be' argument.

Since the big/little MemoryRegionOps are now identical, it is
pointless to declare them both. Unify them.

Signed-off-by: Stephen Checkoway <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
[PMD: Extracted from bigger patch to ease review]
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: 6682bc1ee431dc6198b85ac71d537104cfc57fed
      
https://github.com/qemu/qemu/commit/6682bc1ee431dc6198b85ac71d537104cfc57fed
  Author: Stephen Checkoway <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi02.c
    M tests/pflash-cfi02-test.c

  Log Message:
  -----------
  hw/block/pflash_cfi02: Fix command address comparison

Most AMD commands only examine 11 bits of the address. This masks the
addresses used in the comparison to 11 bits. The exceptions are word or
sector addresses which use offset directly rather than the shifted
offset, boff.

Signed-off-by: Stephen Checkoway <address@hidden>
Message-Id: <address@hidden>
Acked-by: Thomas Huth <address@hidden>
Acked-by: Alistair Francis <address@hidden>
Acked-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: 91d0231213629674c3a551d900c1b79a8f520caf
      
https://github.com/qemu/qemu/commit/91d0231213629674c3a551d900c1b79a8f520caf
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M tests/pflash-cfi02-test.c

  Log Message:
  -----------
  tests/pflash-cfi02: Refactor to support testing multiple configurations

Introduce the FlashConfig structure, to be able to run the same set
of tests on different flash models/configurations.

Signed-off-by: Stephen Checkoway <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
[PMD: Extracted from bigger patch]
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: 1eb27d692ead211ff19667c5447fe9701c9fd992
      
https://github.com/qemu/qemu/commit/1eb27d692ead211ff19667c5447fe9701c9fd992
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi02.c

  Log Message:
  -----------
  hw/block/pflash_cfi02: Remove pointless local variable

We can directly use pfl->total_len, remove the local 'chip_len'
variable.

Signed-off-by: Stephen Checkoway <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
[PMD: Extracted from bigger patch]
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: 9ac45b886ac36937ff0969d63c5b819b4efaa337
      
https://github.com/qemu/qemu/commit/9ac45b886ac36937ff0969d63c5b819b4efaa337
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi02.c

  Log Message:
  -----------
  hw/block/pflash_cfi02: Document the current CFI values

Signed-off-by: Stephen Checkoway <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
[PMD: Extracted from bigger patch]
Acked-by: Alistair Francis <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: d6874c8391f733d86f0ae85cc564109d7f01691d
      
https://github.com/qemu/qemu/commit/d6874c8391f733d86f0ae85cc564109d7f01691d
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi02.c

  Log Message:
  -----------
  hw/block/pflash_cfi02: Hold the PRI table offset in a variable

Manufacturers are allowed to move the PRI table, this is why the
offset is queryable via fixed offsets 0x15/0x16.
Add a variable to hold the offset, so it will be easier to later
move the PRI table.

Reviewed-by: Alistair Francis <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: c2c1bf44a9b7f620b0565d17e33e7c5a04a5c51a
      
https://github.com/qemu/qemu/commit/c2c1bf44a9b7f620b0565d17e33e7c5a04a5c51a
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi02.c

  Log Message:
  -----------
  hw/block/pflash_cfi02: Document 'Page Mode' operations are not supported

The 'page mode' feature entry was implicitly set as zero
(not supported). Document it exists, so we won't discard
it if we squeeze the CFI table.

Signed-off-by: Stephen Checkoway <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
[PMD: Extracted from bigger patch]
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: 64659053557a6a19bb00bb226e9b4d8f78cead7b
      
https://github.com/qemu/qemu/commit/64659053557a6a19bb00bb226e9b4d8f78cead7b
  Author: Stephen Checkoway <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi02.c
    M tests/pflash-cfi02-test.c

  Log Message:
  -----------
  hw/block/pflash_cfi02: Implement nonuniform sector sizes

Some flash chips support sectors of different sizes. For example, the
AMD AM29LV160DT has 31 64 kB sectors, one 32 kB sector, two 8 kB
sectors, and a 16 kB sector, in that order. The AM29LV160DB has those in
the reverse order.

The `num-blocks` and `sector-length` properties work exactly as they did
before: a flash device with uniform sector lengths. To get non-uniform
sector lengths for up to four regions, the following properties may be
set
- region 0. `num-blocks0` and `sector-length0`;
- region 1. `num-blocks1` and `sector-length1`;
- region 2. `num-blocks2` and `sector-length2`; and
- region 3. `num-blocks3` and `sector-length3`.

If the uniform and nonuniform properties are set, then both must specify
a flash device with the same total size. It would be better to disallow
both being set, or make `num-blocks0` and `sector-length0` alias
`num-blocks` and `sector-length`, but that would make testing currently
impossible.

Signed-off-by: Stephen Checkoway <address@hidden>
Message-Id: <address@hidden>
Acked-by: Thomas Huth <address@hidden>
Acked-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
[PMD: Rebased, add assert() on pri_offset]
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: 102f0f79a51cfc289f7ad19a10be654925faeff3
      
https://github.com/qemu/qemu/commit/102f0f79a51cfc289f7ad19a10be654925faeff3
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi02.c

  Log Message:
  -----------
  hw/block/pflash_cfi02: Extract pflash_regions_count()

Extract the pflash_regions_count() function, the code will be
easier to review.

Reviewed-by: Alistair Francis <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: 8a508e7064bbe7d434a93f3284e6d93881c68a44
      
https://github.com/qemu/qemu/commit/8a508e7064bbe7d434a93f3284e6d93881c68a44
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi02.c

  Log Message:
  -----------
  hw/block/pflash_cfi02: Split if() condition

Split the if() condition check and arrange the indentation to
ease the review of the next patches. No logical change.

Reviewed-by: Alistair Francis <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: 46fb7809b5520e2cb77bdc86270b0c393e4b1210
      
https://github.com/qemu/qemu/commit/46fb7809b5520e2cb77bdc86270b0c393e4b1210
  Author: Stephen Checkoway <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi02.c
    M tests/pflash-cfi02-test.c

  Log Message:
  -----------
  hw/block/pflash_cfi02: Fix CFI in autoselect mode

After a flash device enters CFI mode from autoselect mode, the reset
command returns the device to autoselect mode. An additional reset
command is necessary to return to read array mode.

Signed-off-by: Stephen Checkoway <address@hidden>
Message-Id: <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
Acked-by: Thomas Huth <address@hidden>
Acked-by: Alistair Francis <address@hidden>
Acked-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: a97910423975b9fee1dbcdc1a2488804d4092c36
      
https://github.com/qemu/qemu/commit/a97910423975b9fee1dbcdc1a2488804d4092c36
  Author: Stephen Checkoway <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi02.c

  Log Message:
  -----------
  hw/block/pflash_cfi02: Fix reset command not ignored during erase

When the flash device is performing a chip erase, all commands are
ignored. When it is performing a sector erase, only the erase suspend
command is valid, which is currently not supported.

In particular, the reset command should not cause the device to reset to
read array mode while programming is on going.

Signed-off-by: Stephen Checkoway <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: a50547aca54c0e55122c32c077cab747147a6b30
      
https://github.com/qemu/qemu/commit/a50547aca54c0e55122c32c077cab747147a6b30
  Author: Stephen Checkoway <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi02.c
    M tests/pflash-cfi02-test.c

  Log Message:
  -----------
  hw/block/pflash_cfi02: Implement multi-sector erase

After two unlock cycles and a sector erase command, the AMD flash chips
start a 50 us erase time out. Any additional sector erase commands add a
sector to be erased and restart the 50 us timeout. During the timeout,
status bit DQ3 is cleared. After the time out, DQ3 is asserted during
erasure.

Signed-off-by: Stephen Checkoway <address@hidden>
Message-Id: <address@hidden>
Acked-by: Thomas Huth <address@hidden>
Acked-by: Philippe Mathieu-Daudé <address@hidden>
[PMD: Rebased]
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: ddb6f2254871c7c686561c4b41d52e2f0413f9a1
      
https://github.com/qemu/qemu/commit/ddb6f2254871c7c686561c4b41d52e2f0413f9a1
  Author: Stephen Checkoway <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi02.c
    M tests/pflash-cfi02-test.c

  Log Message:
  -----------
  hw/block/pflash_cfi02: Implement erase suspend/resume

During a sector erase (but not a chip erase), the embeded erase program
can be suspended. Once suspended, the sectors not selected for erasure
may be read and programmed. Autoselect mode is allowed during erase
suspend mode. Presumably, CFI queries are similarly allowed so this
commit allows them as well.

Since guest firmware can use status bits DQ7, DQ6, DQ3, and DQ2 to
determine the current state of sector erasure, these bits are properly
implemented.

Signed-off-by: Stephen Checkoway <address@hidden>
Message-Id: <address@hidden>
Acked-by: Thomas Huth <address@hidden>
Acked-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
[PMD: Rebased]
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: 80f2c625cbd67447a750c0c6c5d377dfa65d4d7d
      
https://github.com/qemu/qemu/commit/80f2c625cbd67447a750c0c6c5d377dfa65d4d7d
  Author: Stephen Checkoway <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi02.c

  Log Message:
  -----------
  hw/block/pflash_cfi02: Use chip erase time specified in the CFI table

When erasing the chip, use the typical time specified in the CFI table
rather than arbitrarily selecting 5 seconds.

Since the currently unconfigurable value set in the table is 12, this
means a chip erase takes 4096 ms so this isn't a big change in behavior.

Signed-off-by: Stephen Checkoway <address@hidden>
Message-Id: <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: b03499371785cd9a0d8157ec8bd1c19a2bf8b5c7
      
https://github.com/qemu/qemu/commit/b03499371785cd9a0d8157ec8bd1c19a2bf8b5c7
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi02.c

  Log Message:
  -----------
  hw/block/pflash_cfi02: Document commands

Reviewed-by: Alistair Francis <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: 3ae0343db69c379beb5750b4ed70794bbed51b85
      
https://github.com/qemu/qemu/commit/3ae0343db69c379beb5750b4ed70794bbed51b85
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi02.c

  Log Message:
  -----------
  hw/block/pflash_cfi02: Reduce I/O accesses to 16-bit

Parallel NOR flashes are limited to 16-bit bus accesses.
Remove the 32-bit dead code.

Reviewed-by: Alistair Francis <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: efa85a4d1ab13e962c0a93d09b7e935571d669fe
      
https://github.com/qemu/qemu/commit/efa85a4d1ab13e962c0a93d09b7e935571d669fe
  Author: Peter Maydell <address@hidden>
  Date:   2019-07-02 (Tue, 02 Jul 2019)

  Changed paths:
    M hw/block/pflash_cfi01.c
    M hw/block/pflash_cfi02.c
    M hw/block/trace-events
    M tests/Makefile.include
    A tests/pflash-cfi02-test.c

  Log Message:
  -----------
  Merge remote-tracking branch 
'remotes/philmd-gitlab/tags/pflash-next-20190701' into staging

Implement the following AMD command-set parallel flash functionality:
- nonuniform sector sizes;
- erase suspend/resume commands; and
- multi-sector erase.

# gpg: Signature made Tue 02 Jul 2019 01:54:33 BST
# gpg:                using RSA key E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <address@hidden>" 
[full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* remotes/philmd-gitlab/tags/pflash-next-20190701: (27 commits)
  hw/block/pflash_cfi02: Reduce I/O accesses to 16-bit
  hw/block/pflash_cfi02: Document commands
  hw/block/pflash_cfi02: Use chip erase time specified in the CFI table
  hw/block/pflash_cfi02: Implement erase suspend/resume
  hw/block/pflash_cfi02: Implement multi-sector erase
  hw/block/pflash_cfi02: Fix reset command not ignored during erase
  hw/block/pflash_cfi02: Fix CFI in autoselect mode
  hw/block/pflash_cfi02: Split if() condition
  hw/block/pflash_cfi02: Extract pflash_regions_count()
  hw/block/pflash_cfi02: Implement nonuniform sector sizes
  hw/block/pflash_cfi02: Document 'Page Mode' operations are not supported
  hw/block/pflash_cfi02: Hold the PRI table offset in a variable
  hw/block/pflash_cfi02: Document the current CFI values
  hw/block/pflash_cfi02: Remove pointless local variable
  tests/pflash-cfi02: Refactor to support testing multiple configurations
  hw/block/pflash_cfi02: Fix command address comparison
  hw/block/pflash_cfi02: Unify the MemoryRegionOps
  hw/block/pflash_cfi02: Extract the pflash_data_read() function
  hw/block/pflash_cfi02: Use the ldst API in pflash_read()
  hw/block/pflash_cfi02: Use the ldst API in pflash_write()
  ...

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/bf1b9edeb06f...efa85a4d1ab1