[Qemu-commits] [qemu/qemu] a1c993: MAINTAINERS: cover tests/migration/s3

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[Qemu-commits] [qemu/qemu] a1c993: MAINTAINERS: cover tests/migration/s3

From:	Peter Maydell
Subject:	[Qemu-commits] [qemu/qemu] a1c993: MAINTAINERS: cover tests/migration/s390x/
Date:	Fri, 07 Jun 2019 08:14:31 -0700
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: a1c993c3136fd72492d5d33c1087ec32e147c0d4
      
https://github.com/qemu/qemu/commit/a1c993c3136fd72492d5d33c1087ec32e147c0d4
  Author: Cornelia Huck <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M MAINTAINERS

  Log Message:
  -----------
  MAINTAINERS: cover tests/migration/s390x/

The generic s390 section looks like the best resting place.

Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>


  Commit: 1fd286385c31e42a60db0a298c01e1c8ec290e3e
      
https://github.com/qemu/qemu/commit/1fd286385c31e42a60db0a298c01e1c8ec290e3e
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/Makefile.objs
    M target/s390x/helper.h
    M target/s390x/insn-data.def
    M target/s390x/translate_vx.inc.c
    A target/s390x/vec_string_helper.c

  Log Message:
  -----------
  s390x/tcg: Implement VECTOR FIND ANY ELEMENT EQUAL

Complicated stuff. Provide two different helpers for CC an !CC handling.
We might want to add more helpers later.

zero_search() and match_index() are courtesy of Richard H.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: 8c0e1e58ce45ab1317bed817a9821b0286f926a2
      
https://github.com/qemu/qemu/commit/8c0e1e58ce45ab1317bed817a9821b0286f926a2
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/helper.h
    M target/s390x/insn-data.def
    M target/s390x/translate_vx.inc.c
    M target/s390x/vec_string_helper.c

  Log Message:
  -----------
  s390x/tcg: Implement VECTOR FIND ELEMENT EQUAL

Core logic courtesy of Richard H.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: 074e99b3b5552b297f76c820ea55c724209bb6d1
      
https://github.com/qemu/qemu/commit/074e99b3b5552b297f76c820ea55c724209bb6d1
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/helper.h
    M target/s390x/insn-data.def
    M target/s390x/translate_vx.inc.c
    M target/s390x/vec.h
    M target/s390x/vec_string_helper.c

  Log Message:
  -----------
  s390x/tcg: Implement VECTOR FIND ELEMENT NOT EQUAL

Similar to VECTOR FIND ELEMENT EQUAL. Core logic courtesy of Richard H.

Add s390_vec_read_element() that can deal with element sizes.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: be6324c6b73478f181bba4920de2ef6af317482b
      
https://github.com/qemu/qemu/commit/be6324c6b73478f181bba4920de2ef6af317482b
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/helper.h
    M target/s390x/insn-data.def
    M target/s390x/translate_vx.inc.c
    M target/s390x/vec_string_helper.c

  Log Message:
  -----------
  s390x/tcg: Implement VECTOR ISOLATE STRING

Logic mostly courtesy of Richard H.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: 13b0228f77ffa14a0f82bd8a9d0fd5859b0d6a7d
      
https://github.com/qemu/qemu/commit/13b0228f77ffa14a0f82bd8a9d0fd5859b0d6a7d
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/helper.h
    M target/s390x/insn-data.def
    M target/s390x/translate_vx.inc.c
    M target/s390x/vec.h
    M target/s390x/vec_string_helper.c

  Log Message:
  -----------
  s390x/tcg: Implement VECTOR STRING RANGE COMPARE

Unfortunately, there is no easy way to avoid looping over all elements
in v2. Provide specialized variants for !cc,!rt/!cc,rt/cc,!rt/cc,rt and
all element types. Especially for different values of rt, the compiler
might be able to optimize the code a lot.

Add s390_vec_write_element().

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: ec8e23e37f80072a67ad409e6cdf67b65bb19eef
      
https://github.com/qemu/qemu/commit/ec8e23e37f80072a67ad409e6cdf67b65bb19eef
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/cpu.h

  Log Message:
  -----------
  s390x: Align vector registers to 16 bytes

11e2bfef7990 ("tcg/i386: Use MOVDQA for TCG_TYPE_V128 load/store")
revealed that the vregs are not aligned to 16 bytes. Align them to
16 bytes, to avoid segfault'ing on x86.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: 4f83d7d2121a8b4cce59c06f7d74c47cdedd79eb
      
https://github.com/qemu/qemu/commit/4f83d7d2121a8b4cce59c06f7d74c47cdedd79eb
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M linux-user/s390x/signal.c
    M target/s390x/arch_dump.c
    M target/s390x/cpu.h
    M target/s390x/excp_helper.c
    M target/s390x/gdbstub.c
    M target/s390x/helper.c
    M target/s390x/kvm.c
    M target/s390x/machine.c
    M target/s390x/translate.c

  Log Message:
  -----------
  s390x: Use uint64_t for vector registers

CPU_DoubleU is primarily used to reinterpret between integer and floats.
We don't really need this functionality. So let's just keep it simple
and use an uint64_t.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: 88a29e867528c57151103e64a966a9cbaeec852f
      
https://github.com/qemu/qemu/commit/88a29e867528c57151103e64a966a9cbaeec852f
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/misc_helper.c

  Log Message:
  -----------
  s390x/tcg: Fix max_byte detection for stfle

used_stfl_bytes is 0, before initialized via prepare_stfl() on the
first invocation. We have to move the calculation of max_bytes after
prepare_stfl().

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: e19a61eb514dbf7c9a725c7539ce3b6166cd6ac4
      
https://github.com/qemu/qemu/commit/e19a61eb514dbf7c9a725c7539ce3b6166cd6ac4
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/misc_helper.c

  Log Message:
  -----------
  s390x/tcg: Store only the necessary amount of doublewords for STFLE

The PoP (z14, 7-382) says:
    Doublewords to the right of the doubleword in which the
    highest-numbered facility bit is assigned for a model
    may or may not be stored.

However, stack protection in certain binaries can't deal with that.
"gzip" example code:

f1b4:       a7 08 00 03             lhi     %r0,3
f1b8:       b2 b0 f0 a0             stfle   160(%r15)
f1bc:       e3 20 f0 b2 00 90       llgc    %r2,178(%r15)
f1c2:       c0 2b 00 00 00 01       nilf    %r2,1
f1c8:       b2 4f 00 10             ear     %r1,%a0
f1cc:       b9 14 00 22             lgfr    %r2,%r2
f1d0:       eb 11 00 20 00 0d       sllg    %r1,%r1,32
f1d6:       b2 4f 00 11             ear     %r1,%a1
f1da:       d5 07 f0 b8 10 28       clc     184(8,%r15),40(%r1)
f1e0:       a7 74 00 06             jne     f1ec <file_read@@Base+0x1bc>
f1e4:       eb ef f1 30 00 04       lmg     %r14,%r15,304(%r15)
f1ea:       07 fe                   br      %r14
f1ec:       c0 e5 ff ff 9d 6e       brasl   %r14,2cc8 <__stack_chk_fail@plt>

In QEMU, we currently have:
    max_bytes = 24
the code asks for (3 + 1) doublewords == 32 bytes.

If we write 32 bytes instead of only 24, and return "2 + 1" doublewords
("one less than the number of doulewords needed to contain all of the
 facility bits"), the example code detects a stack corruption.

In my opinion, the code is wrong. However, it seems to work fine on
real machines. So let's limit storing to the minimum of the requested
and the maximum doublewords.

Cc: Stefan Liebler <address@hidden>
Cc: Andreas Krebbel <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: 9be6fa99d6b1371ced6a9b57c32daec86733cd0a
      
https://github.com/qemu/qemu/commit/9be6fa99d6b1371ced6a9b57c32daec86733cd0a
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/cpu.h
    M target/s390x/excp_helper.c
    M target/s390x/tcg_s390x.h

  Log Message:
  -----------
  s390x/tcg: Introduce tcg_s390_vector_exception()

Handling is similar to data exceptions, however we can always store the
VXC into the lowore and the FPC:

z14 PoP, 6-20, "Vector-Exception Code"
    When a vector-processing exception causes a pro-
    gram interruption, a vector-exception code (VXC) is
    stored at location 147, and zeros are stored at loca-
    tions 144-146. The VXC is also placed in the DXC
    field of the floating-point-control (FPC) register if bit
    45 of control register 0 is one. When bit 45 of control
    register 0 is zero and bit 46 of control register 0 is
    one, the DXC field of the FPC register and the con-
    tents of storage at location 147 are unpredictable.

Signed-off-by: David Hildenbrand <address@hidden>


  Commit: aae65009726858390d8bfca73d795613698f317a
      
https://github.com/qemu/qemu/commit/aae65009726858390d8bfca73d795613698f317a
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/fpu_helper.c
    M target/s390x/internal.h

  Log Message:
  -----------
  s390x/tcg: Export float_comp_to_cc() and float(32|64|128)_dcmask()

Vector floating-point instructions will require these functions, so
allow to use them from other files.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: 3a0eae8546b4cda2526f1d913d50c4eb63f5c05e
      
https://github.com/qemu/qemu/commit/3a0eae8546b4cda2526f1d913d50c4eb63f5c05e
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/Makefile.objs
    M target/s390x/helper.h
    M target/s390x/insn-data.def
    M target/s390x/translate_vx.inc.c
    A target/s390x/vec_fpu_helper.c

  Log Message:
  -----------
  s390x/tcg: Implement VECTOR FP ADD

1. We'll reuse op_vfa() for similar instructions later, prepare for
   that.
2. We'll reuse vop64_3() for other instructions later.
3. Take care of modifying the vector register only if no trap happened.
 - on traps, flags are not updated and no elements are modified
 - traps don't modify the fpc flags
 - without traps, all exceptions of all elements are merged
4. We'll reuse check_ieee_exc() later when we need the XxC flag.

We have to check for exceptions after processing each element.
Provide separate handlers for single/all element processing. We'll do
the same for all applicable FP instructions.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: 5b89f0fba2b6301e124668443f8bfed124a0317c
      
https://github.com/qemu/qemu/commit/5b89f0fba2b6301e124668443f8bfed124a0317c
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/helper.h
    M target/s390x/insn-data.def
    M target/s390x/translate_vx.inc.c
    M target/s390x/vec_fpu_helper.c

  Log Message:
  -----------
  s390x/tcg: Implement VECTOR FP COMPARE (AND SIGNAL) SCALAR

As far as I can see, there is only a tiny difference.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: 2c806ab4437abde451b99dcf21b45169c04d08e9
      
https://github.com/qemu/qemu/commit/2c806ab4437abde451b99dcf21b45169c04d08e9
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/helper.h
    M target/s390x/insn-data.def
    M target/s390x/translate_vx.inc.c
    M target/s390x/vec_fpu_helper.c

  Log Message:
  -----------
  s390x/tcg: Implement VECTOR FP COMPARE (EQUAL|HIGH|HIGH OR EQUAL)

Provide for all three instructions all four combinations of cc bit and
s bit.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: bb03fd841cb33f3a85cedc1f89169fe2649fc258
      
https://github.com/qemu/qemu/commit/bb03fd841cb33f3a85cedc1f89169fe2649fc258
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/helper.h
    M target/s390x/insn-data.def
    M target/s390x/translate_vx.inc.c
    M target/s390x/vec_fpu_helper.c

  Log Message:
  -----------
  s390x/tcg: Implement VECTOR FP CONVERT FROM FIXED 64-BIT

1. We'll reuse op_vcdg() for similar instructions later, prepare for
   that.
2. We'll reuse vop64_2() later for other instructions.

We have to mangle the erm (effective rounding mode) and the m4 into
the simd_data(), and properly unmangle them again.

Make sure to restore the erm before triggering an exception.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: 9b8d1a387daf1a71c44fdf64a513672b3b327de6
      
https://github.com/qemu/qemu/commit/9b8d1a387daf1a71c44fdf64a513672b3b327de6
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/helper.h
    M target/s390x/insn-data.def
    M target/s390x/translate_vx.inc.c
    M target/s390x/vec_fpu_helper.c

  Log Message:
  -----------
  s390x/tcg: Implement VECTOR FP CONVERT FROM LOGICAL 64-BIT

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: 35b3bb1c55953e2924303cb5d9ab1b242918a1e4
      
https://github.com/qemu/qemu/commit/35b3bb1c55953e2924303cb5d9ab1b242918a1e4
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/helper.h
    M target/s390x/insn-data.def
    M target/s390x/translate_vx.inc.c
    M target/s390x/vec_fpu_helper.c

  Log Message:
  -----------
  s390x/tcg: Implement VECTOR FP CONVERT TO FIXED 64-BIT

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: 09c04e4b884566ffe5b931d3e809e2c003916382
      
https://github.com/qemu/qemu/commit/09c04e4b884566ffe5b931d3e809e2c003916382
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/helper.h
    M target/s390x/insn-data.def
    M target/s390x/translate_vx.inc.c
    M target/s390x/vec_fpu_helper.c

  Log Message:
  -----------
  s390x/tcg: Implement VECTOR FP CONVERT TO LOGICAL 64-BIT

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: 817a1cec89ed1bb94c112cc8fa013efb74a4df83
      
https://github.com/qemu/qemu/commit/817a1cec89ed1bb94c112cc8fa013efb74a4df83
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/helper.h
    M target/s390x/insn-data.def
    M target/s390x/translate_vx.inc.c
    M target/s390x/vec_fpu_helper.c

  Log Message:
  -----------
  s390x/tcg: Implement VECTOR FP DIVIDE

We can reuse most of the infrastructure added for VECTOR FP ADD.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: 60d0ab29a134bd75ba9aafe6ed5a91c0d43ad67a
      
https://github.com/qemu/qemu/commit/60d0ab29a134bd75ba9aafe6ed5a91c0d43ad67a
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/helper.h
    M target/s390x/insn-data.def
    M target/s390x/translate_vx.inc.c
    M target/s390x/vec_fpu_helper.c

  Log Message:
  -----------
  s390x/tcg: Implement VECTOR LOAD FP INTEGER

We can reuse most of the infrastructure introduced for
VECTOR FP CONVERT FROM FIXED 64-BIT and friends.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: 1a76e59da3162625561f0417133f26be39bbceb0
      
https://github.com/qemu/qemu/commit/1a76e59da3162625561f0417133f26be39bbceb0
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/helper.h
    M target/s390x/insn-data.def
    M target/s390x/translate_vx.inc.c
    M target/s390x/vec_fpu_helper.c

  Log Message:
  -----------
  s390x/tcg: Implement VECTOR LOAD LENGTHENED

Take care of reading/indicating the 32-bit elements.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: 4500ede452e6e1fc079e05ce67a94bb6804757f8
      
https://github.com/qemu/qemu/commit/4500ede452e6e1fc079e05ce67a94bb6804757f8
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/helper.h
    M target/s390x/insn-data.def
    M target/s390x/translate_vx.inc.c
    M target/s390x/vec_fpu_helper.c

  Log Message:
  -----------
  s390x/tcg: Implement VECTOR LOAD ROUNDED

We can reuse some of the infrastructure introduced for
VECTOR FP CONVERT FROM FIXED 64-BIT and friends.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: 8d47d4d2124ea61b993ec90feac302d540cf6e24
      
https://github.com/qemu/qemu/commit/8d47d4d2124ea61b993ec90feac302d540cf6e24
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/helper.h
    M target/s390x/insn-data.def
    M target/s390x/translate_vx.inc.c
    M target/s390x/vec_fpu_helper.c

  Log Message:
  -----------
  s390x/tcg: Implement VECTOR FP MULTIPLY

Very similar to VECTOR FP DIVIDE.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: c64c598402c0e20cf60aaad43700eb80eed889e4
      
https://github.com/qemu/qemu/commit/c64c598402c0e20cf60aaad43700eb80eed889e4
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/helper.h
    M target/s390x/insn-data.def
    M target/s390x/translate_vx.inc.c
    M target/s390x/vec_fpu_helper.c

  Log Message:
  -----------
  s390x/tcg: Implement VECTOR FP MULTIPLY AND (ADD|SUBTRACT)

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: 76e35cc7a52390d2743a9746a1bec29754f60306
      
https://github.com/qemu/qemu/commit/76e35cc7a52390d2743a9746a1bec29754f60306
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/insn-data.def
    M target/s390x/translate_vx.inc.c

  Log Message:
  -----------
  s390x/tcg: Implement VECTOR FP PERFORM SIGN OPERATION

The only FP instruction we can implement without an helper.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: 5938f20cb807b584799feef411a1906a9d8f7a1b
      
https://github.com/qemu/qemu/commit/5938f20cb807b584799feef411a1906a9d8f7a1b
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/helper.h
    M target/s390x/insn-data.def
    M target/s390x/translate_vx.inc.c
    M target/s390x/vec_fpu_helper.c

  Log Message:
  -----------
  s390x/tcg: Implement VECTOR FP SQUARE ROOT

Simulate XxC=0 and ERM=0 (current mode), so we can use the existing
helper function.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: 658a395f6c41d72525f575de56fc9d4902161f2b
      
https://github.com/qemu/qemu/commit/658a395f6c41d72525f575de56fc9d4902161f2b
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/helper.h
    M target/s390x/insn-data.def
    M target/s390x/translate_vx.inc.c
    M target/s390x/vec_fpu_helper.c

  Log Message:
  -----------
  s390x/tcg: Implement VECTOR FP SUBTRACT

Similar to VECTOR FP ADD.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: 83b955f9a8d149c31eea015020e7cbb25918839d
      
https://github.com/qemu/qemu/commit/83b955f9a8d149c31eea015020e7cbb25918839d
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/helper.h
    M target/s390x/insn-data.def
    M target/s390x/translate_vx.inc.c
    M target/s390x/vec_fpu_helper.c

  Log Message:
  -----------
  s390x/tcg: Implement VECTOR FP TEST DATA CLASS IMMEDIATE

We can reuse float64_dcmask().

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: fd4818518bd8b05023a99841f8d6de7b91340099
      
https://github.com/qemu/qemu/commit/fd4818518bd8b05023a99841f8d6de7b91340099
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/cpu.c

  Log Message:
  -----------
  s390x/tcg: Allow linux-user to use vector instructions

Once we unlock S390_FEAT_VECTOR for TCG, we want linux-user to be
able to make use of it.

Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Laurent Vivier <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: c7f22b31ce534be758dc01e2ed4e5ce984d5bd3d
      
https://github.com/qemu/qemu/commit/c7f22b31ce534be758dc01e2ed4e5ce984d5bd3d
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/gen-features.c

  Log Message:
  -----------
  s390x/tcg: We support the Vector Facility

Let's add it to the max model, so we can enable it.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: 08ef92d556c584c7faf594ff3af46df456276e1b
      
https://github.com/qemu/qemu/commit/08ef92d556c584c7faf594ff3af46df456276e1b
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M hw/s390x/s390-virtio-ccw.c
    M target/s390x/cpu_models.c
    M target/s390x/gen-features.c

  Log Message:
  -----------
  s390x: Bump the "qemu" CPU model up to a stripped-down z13

We don't care about the other two missing base features:
- S390_FEAT_DFP_PACKED_CONVERSION
- S390_FEAT_GROUP_GEN13_PTFF

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: 37c70c43dc29b764969cd8b704fbf946fcc2ef5a
      
https://github.com/qemu/qemu/commit/37c70c43dc29b764969cd8b704fbf946fcc2ef5a
  Author: Richard Henderson <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M target/s390x/translate_vx.inc.c

  Log Message:
  -----------
  s390x/tcg: Use tcg_gen_gvec_bitsel for VECTOR SELECT

This replaces the target-specific implementations for VSEL.

Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: 6d88baf18653ff8826db3dd840a6b372d3477280
      
https://github.com/qemu/qemu/commit/6d88baf18653ff8826db3dd840a6b372d3477280
  Author: David Hildenbrand <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M include/elf.h
    M linux-user/elfload.c

  Log Message:
  -----------
  linux-user: elf: ELF_HWCAP for s390x

Let's add all HWCAPs that we can support under TCG right now, when the
respective CPU facilities are enabled.

Cc: Riku Voipio <address@hidden>
Cc: Laurent Vivier <address@hidden>
Cc: Cornelia Huck <address@hidden>
Cc: Laurent Vivier <address@hidden>
Cc: Richard Henderson <address@hidden>
Acked-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>


  Commit: c984c4e8e31e57c44b3674d9dd8ed6aa5e68306e
      
https://github.com/qemu/qemu/commit/c984c4e8e31e57c44b3674d9dd8ed6aa5e68306e
  Author: Cornelia Huck <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M hw/s390x/s390-virtio-ccw.c
    M include/elf.h
    M linux-user/elfload.c
    M linux-user/s390x/signal.c
    M target/s390x/Makefile.objs
    M target/s390x/arch_dump.c
    M target/s390x/cpu.c
    M target/s390x/cpu.h
    M target/s390x/cpu_models.c
    M target/s390x/excp_helper.c
    M target/s390x/fpu_helper.c
    M target/s390x/gdbstub.c
    M target/s390x/gen-features.c
    M target/s390x/helper.c
    M target/s390x/helper.h
    M target/s390x/insn-data.def
    M target/s390x/internal.h
    M target/s390x/kvm.c
    M target/s390x/machine.c
    M target/s390x/misc_helper.c
    M target/s390x/tcg_s390x.h
    M target/s390x/translate.c
    M target/s390x/translate_vx.inc.c
    M target/s390x/vec.h
    A target/s390x/vec_fpu_helper.c
    A target/s390x/vec_string_helper.c

  Log Message:
  -----------
  Merge tag 's390x-tcg-2019-06-07' into s390-next-staging

Finalize implementation of the "Vector Facility" for s390x TCG. Add it
to the QEMU CPU model, so it is enabled as default.
Also:
- One fix (and one workaround) for the STFLE instruction
- Fix the alignment of vector registers (and change the data type)
- Properly generate ELF_HWCAP for s390x for linux-user
- Use a gvec helper for VECTOR SELECT

# gpg: Signature made Fri 07 Jun 2019 02:58:01 PM CEST
# gpg:                using RSA key 1BD9CAAD735C4C3A460DFCCA4DDE10F700FF835A
# gpg:                issuer "address@hidden"
# gpg: Good signature from "David Hildenbrand <address@hidden>" [full]
# gpg:                 aka "David Hildenbrand <address@hidden>" [full]

* tag 's390x-tcg-2019-06-07': (33 commits)
  linux-user: elf: ELF_HWCAP for s390x
  s390x/tcg: Use tcg_gen_gvec_bitsel for VECTOR SELECT
  s390x: Bump the "qemu" CPU model up to a stripped-down z13
  s390x/tcg: We support the Vector Facility
  s390x/tcg: Allow linux-user to use vector instructions
  s390x/tcg: Implement VECTOR FP TEST DATA CLASS IMMEDIATE
  s390x/tcg: Implement VECTOR FP SUBTRACT
  s390x/tcg: Implement VECTOR FP SQUARE ROOT
  s390x/tcg: Implement VECTOR FP PERFORM SIGN OPERATION
  s390x/tcg: Implement VECTOR FP MULTIPLY AND (ADD|SUBTRACT)
  s390x/tcg: Implement VECTOR FP MULTIPLY
  s390x/tcg: Implement VECTOR LOAD ROUNDED
  s390x/tcg: Implement VECTOR LOAD LENGTHENED
  s390x/tcg: Implement VECTOR LOAD FP INTEGER
  s390x/tcg: Implement VECTOR FP DIVIDE
  s390x/tcg: Implement VECTOR FP CONVERT TO LOGICAL 64-BIT
  s390x/tcg: Implement VECTOR FP CONVERT TO FIXED 64-BIT
  s390x/tcg: Implement VECTOR FP CONVERT FROM LOGICAL 64-BIT
  s390x/tcg: Implement VECTOR FP CONVERT FROM FIXED 64-BIT
  s390x/tcg: Implement VECTOR FP COMPARE (EQUAL|HIGH|HIGH OR EQUAL)
  ...

Signed-off-by: Cornelia Huck <address@hidden>


  Commit: 185b7ccc11354cbd69b6d53bf8d831dd964f6c88
      
https://github.com/qemu/qemu/commit/185b7ccc11354cbd69b6d53bf8d831dd964f6c88
  Author: Peter Maydell <address@hidden>
  Date:   2019-06-07 (Fri, 07 Jun 2019)

  Changed paths:
    M MAINTAINERS
    M hw/s390x/s390-virtio-ccw.c
    M include/elf.h
    M linux-user/elfload.c
    M linux-user/s390x/signal.c
    M target/s390x/Makefile.objs
    M target/s390x/arch_dump.c
    M target/s390x/cpu.c
    M target/s390x/cpu.h
    M target/s390x/cpu_models.c
    M target/s390x/excp_helper.c
    M target/s390x/fpu_helper.c
    M target/s390x/gdbstub.c
    M target/s390x/gen-features.c
    M target/s390x/helper.c
    M target/s390x/helper.h
    M target/s390x/insn-data.def
    M target/s390x/internal.h
    M target/s390x/kvm.c
    M target/s390x/machine.c
    M target/s390x/misc_helper.c
    M target/s390x/tcg_s390x.h
    M target/s390x/translate.c
    M target/s390x/translate_vx.inc.c
    M target/s390x/vec.h
    A target/s390x/vec_fpu_helper.c
    A target/s390x/vec_string_helper.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20190607-2' into 
staging

s390x updates:
- tcg: finalize implementation for the vector facility and
  add it to the 'qemu' cpu model
- linux-user: properly generate ELF_HWCAP

# gpg: Signature made Fri 07 Jun 2019 15:14:42 BST
# gpg:                using RSA key C3D0D66DC3624FF6A8C018CEDECF6B93C6F02FAF
# gpg:                issuer "address@hidden"
# gpg: Good signature from "Cornelia Huck <address@hidden>" [unknown]
# gpg:                 aka "Cornelia Huck <address@hidden>" [full]
# gpg:                 aka "Cornelia Huck <address@hidden>" [full]
# gpg:                 aka "Cornelia Huck <address@hidden>" [unknown]
# gpg:                 aka "Cornelia Huck <address@hidden>" [unknown]
# Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0  18CE DECF 6B93 C6F0 2FAF

* remotes/cohuck/tags/s390x-20190607-2: (34 commits)
  linux-user: elf: ELF_HWCAP for s390x
  s390x/tcg: Use tcg_gen_gvec_bitsel for VECTOR SELECT
  s390x: Bump the "qemu" CPU model up to a stripped-down z13
  s390x/tcg: We support the Vector Facility
  s390x/tcg: Allow linux-user to use vector instructions
  s390x/tcg: Implement VECTOR FP TEST DATA CLASS IMMEDIATE
  s390x/tcg: Implement VECTOR FP SUBTRACT
  s390x/tcg: Implement VECTOR FP SQUARE ROOT
  s390x/tcg: Implement VECTOR FP PERFORM SIGN OPERATION
  s390x/tcg: Implement VECTOR FP MULTIPLY AND (ADD|SUBTRACT)
  s390x/tcg: Implement VECTOR FP MULTIPLY
  s390x/tcg: Implement VECTOR LOAD ROUNDED
  s390x/tcg: Implement VECTOR LOAD LENGTHENED
  s390x/tcg: Implement VECTOR LOAD FP INTEGER
  s390x/tcg: Implement VECTOR FP DIVIDE
  s390x/tcg: Implement VECTOR FP CONVERT TO LOGICAL 64-BIT
  s390x/tcg: Implement VECTOR FP CONVERT TO FIXED 64-BIT
  s390x/tcg: Implement VECTOR FP CONVERT FROM LOGICAL 64-BIT
  s390x/tcg: Implement VECTOR FP CONVERT FROM FIXED 64-BIT
  s390x/tcg: Implement VECTOR FP COMPARE (EQUAL|HIGH|HIGH OR EQUAL)
  ...

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/9021fcfb883a...185b7ccc1135
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