[Qemu-commits] [qemu/qemu] aa0d7e: test-thread-pool: be more reliable

[Peter Maydell]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: aa0d7ed658f6afbdbcf4ceb8613b3c2cf5fbc7c4
      
https://github.com/qemu/qemu/commit/aa0d7ed658f6afbdbcf4ceb8613b3c2cf5fbc7c4
  Author: Paolo Bonzini <address@hidden>
  Date:   2019-06-03 (Mon, 03 Jun 2019)

  Changed paths:
    M tests/test-thread-pool.c

  Log Message:
  -----------
  test-thread-pool: be more reliable

There is a rare race between the atomic_cmpxchg and
bdrv_aio_cancel/bdrv_aio_cancel_async invocations.  Detect it, the
only sensible we can do about it is to exit long_cb immediately.

Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: cbe6d6365a48bce4526c664170cda6fe738484f8
      
https://github.com/qemu/qemu/commit/cbe6d6365a48bce4526c664170cda6fe738484f8
  Author: Wainer dos Santos Moschetta <address@hidden>
  Date:   2019-06-03 (Mon, 03 Jun 2019)

  Changed paths:
    M vl.c

  Log Message:
  -----------
  vl: make -accel help to list enabled accelerators only

Currently, -accel help shows all possible accelerators regardless
if they are enabled in the binary or not. That is a different
semantic from -cpu and -machine helps, for example. So this change
makes it to list only the accelerators which support is compiled
in the binary target.

Note that it does not check if the accelerator is enabled in the
host, so the help message's header was rewritten to emphasize
that. Also qtest is not displayed given that it is used for
internal testing purpose only.

Signed-off-by: Wainer dos Santos Moschetta <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: 8d061278d3854fee9f907e31e0f3298263e84d82
      
https://github.com/qemu/qemu/commit/8d061278d3854fee9f907e31e0f3298263e84d82
  Author: Peter Xu <address@hidden>
  Date:   2019-06-03 (Mon, 03 Jun 2019)

  Changed paths:
    M scripts/checkpatch.pl

  Log Message:
  -----------
  checkpatch: allow SPDX-License-Identifier

According to: https://spdx.org/ids-how, let's still allow QEMU to use
the SPDX license identifier:

// SPDX-License-Identifier: ***

CC: Paolo Bonzini <address@hidden>
Signed-off-by: Peter Xu <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: fdd6d824ef944538eced4f6134d4bafdfbf41b15
      
https://github.com/qemu/qemu/commit/fdd6d824ef944538eced4f6134d4bafdfbf41b15
  Author: Peter Xu <address@hidden>
  Date:   2019-06-03 (Mon, 03 Jun 2019)

  Changed paths:
    M include/exec/memory.h
    M memory.c

  Log Message:
  -----------
  memory: Remove memory_region_get_dirty()

It's never used anywhere.

Reviewed-by: Paolo Bonzini <address@hidden>
Signed-off-by: Peter Xu <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: 4cfd7bab3f5564f6c1a23b06f73d5aa2f957cd16
      
https://github.com/qemu/qemu/commit/4cfd7bab3f5564f6c1a23b06f73d5aa2f957cd16
  Author: Wanpeng Li <address@hidden>
  Date:   2019-06-03 (Mon, 03 Jun 2019)

  Changed paths:
    M target/i386/cpu.c
    M target/i386/cpu.h

  Log Message:
  -----------
  i386: Enable IA32_MISC_ENABLE MWAIT bit when exposing mwait/monitor

The CPUID.01H:ECX[bit 3] ought to mirror the value of the MSR
IA32_MISC_ENABLE MWAIT bit and as userspace has control of them
both, it is userspace's job to configure both bits to match on
the initial setup.

Cc: Eduardo Habkost <address@hidden>
Cc: Paolo Bonzini <address@hidden>
Cc: Radim Krčmář <address@hidden>
Signed-off-by: Wanpeng Li <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: 20fb3105ce632e70500a92d7c76e02f28c2c07d4
      
https://github.com/qemu/qemu/commit/20fb3105ce632e70500a92d7c76e02f28c2c07d4
  Author: Li Qiang <address@hidden>
  Date:   2019-06-03 (Mon, 03 Jun 2019)

  Changed paths:
    M hw/misc/edu.c

  Log Message:
  -----------
  edu: mmio: allow 64-bit access

The edu spec says the MMIO area can be accessed by 64-bit.
However currently the 'max_access_size' is not so the MMIO
access dispatch can only access 32-bit one time. This patch fixes
this to respect the spec.

Signed-off-by: Li Qiang <address@hidden>
Reviewed-by: Philippe Mathieu-Daude <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: c45eb53aabaa620c71ac567ddf4ee89802a97a70
      
https://github.com/qemu/qemu/commit/c45eb53aabaa620c71ac567ddf4ee89802a97a70
  Author: Li Qiang <address@hidden>
  Date:   2019-06-03 (Mon, 03 Jun 2019)

  Changed paths:
    M hw/misc/edu.c

  Log Message:
  -----------
  edu: mmio: allow 64-bit access in read dispatch

The edu spec says when address >= 0x80, the MMIO area can
be accessed by 64-bit.

Signed-off-by: Li Qiang <address@hidden>
Reviewed-by: Philippe Mathieu-Daude <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: 7fca21c8b376871892946651dddcb2f266dcca5a
      
https://github.com/qemu/qemu/commit/7fca21c8b376871892946651dddcb2f266dcca5a
  Author: Li Qiang <address@hidden>
  Date:   2019-06-03 (Mon, 03 Jun 2019)

  Changed paths:
    M hw/misc/edu.c

  Log Message:
  -----------
  edu: uses uint64_t in dma operation

The dma related variable dma.dst/src/cnt is dma_addr_t, it is
uint64_t in x64 platform. Change these usage from uint32_to
uint64_t to avoid trancation in edu_dma_timer.

Signed-off-by: Li Qiang <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: de94b54aa04c06f5988221d2d7e6ee3469173c4b
      
https://github.com/qemu/qemu/commit/de94b54aa04c06f5988221d2d7e6ee3469173c4b
  Author: Paolo Bonzini <address@hidden>
  Date:   2019-06-03 (Mon, 03 Jun 2019)

  Changed paths:
    M tests/qos-test.c

  Log Message:
  -----------
  qgraph: allow extra_device_opts on contains nodes

Allow choosing the bus that the device will be placed on, in case
the machine has more than one.  Otherwise, the bus may not match
the base address of the controller we attach it to.

Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: 7d8ada6e4d20b47dcf42d22fc62599a9799eac7a
      
https://github.com/qemu/qemu/commit/7d8ada6e4d20b47dcf42d22fc62599a9799eac7a
  Author: Paolo Bonzini <address@hidden>
  Date:   2019-06-03 (Mon, 03 Jun 2019)

  Changed paths:
    M tests/libqos/qgraph.c
    M tests/libqos/qgraph.h

  Log Message:
  -----------
  qgraph: fix qos_node_contains with options

Currently, if qos_node_contains was passed options, it would still
create an edge without any options.  Instead, in that case
NULL acts as a terminator.

Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: e8ecb706a8a3a75ea45387a3561b6debed9cacc3
      
https://github.com/qemu/qemu/commit/e8ecb706a8a3a75ea45387a3561b6debed9cacc3
  Author: Paolo Bonzini <address@hidden>
  Date:   2019-06-03 (Mon, 03 Jun 2019)

  Changed paths:
    M tests/ds1338-test.c
    M tests/libqos/i2c.c
    M tests/libqos/i2c.h
    M tests/pca9552-test.c
    M tests/tmp105-test.c

  Log Message:
  -----------
  libqos: move common i2c code to libqos

The functions to read/write 8-bit or 16-bit registers are the same
in tmp105 and pca9552 tests, and in fact they are a special case of
"read block"/"write block" functionality; read block in turn is used
in ds1338-test.

Move everything inside libqos-test, removing the duplication.  Account
for the small differences by adding to tmp105-test.c the "read register
after writing" behavior that is specific to it.

Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: 05095ece6f726dfd2244d4ed1b7e47e35ba7a922
      
https://github.com/qemu/qemu/commit/05095ece6f726dfd2244d4ed1b7e47e35ba7a922
  Author: Paolo Bonzini <address@hidden>
  Date:   2019-06-03 (Mon, 03 Jun 2019)

  Changed paths:
    M tests/libqos/i2c-omap.c

  Log Message:
  -----------
  libqos: fix omap-i2c receiving more than 4 bytes

If more than 4 bytes are received, the FIFO cannot host the entire
contents of the transfer and STP will be nonzero before entering
the transfer loop.  Also, CNT will contain the number of bytes
left to be transferred instead of the total number of bytes in
the transfer.

(Reverse engineered from the omap_i2c.c source code; no available
datasheet).

This will fix ds1338-test for omap-i2c.

Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: eadcd3b252dde196de10874fe999e1af803f22d3
      
https://github.com/qemu/qemu/commit/eadcd3b252dde196de10874fe999e1af803f22d3
  Author: Paolo Bonzini <address@hidden>
  Date:   2019-06-03 (Mon, 03 Jun 2019)

  Changed paths:
    M tests/pca9552-test.c

  Log Message:
  -----------
  pca9552-test: do not rely on state across tests

receive_autoinc is relying on the LED state that is set by
send_and_receive.  Stop doing that, because qgraph resets the
machine between tests.

Reviewed-by: Thomas Huth <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: c4f00daa5b390a74f13a271e7237e173c527bbce
      
https://github.com/qemu/qemu/commit/c4f00daa5b390a74f13a271e7237e173c527bbce
  Author: Paolo Bonzini <address@hidden>
  Date:   2019-06-03 (Mon, 03 Jun 2019)

  Changed paths:
    M hw/arm/imx25_pdk.c
    M tests/ds1338-test.c

  Log Message:
  -----------
  imx25-pdk: create ds1338 for qtest inside the test

There is no need to have a test device created by the board.
Instead, create it in the qtest so that we will be able to run
it on other boards too.

Reviewed-by: Thomas Huth <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: 732c919cf04c0aaf1b092238e8b84cdb7adf657a
      
https://github.com/qemu/qemu/commit/732c919cf04c0aaf1b092238e8b84cdb7adf657a
  Author: Paolo Bonzini <address@hidden>
  Date:   2019-06-03 (Mon, 03 Jun 2019)

  Changed paths:
    M tests/libqos/i2c-imx.c
    M tests/libqos/i2c-omap.c
    M tests/libqos/i2c.h
    M tests/pca9552-test.c
    M tests/tmp105-test.c

  Log Message:
  -----------
  libqos: split I2CAdapter initialization and allocation

Provide *_init functions that populate an I2CAdapter struct without
allocating one, and make the existing *_create functions wrap them.

Because in the new setup *_create might return a pointer inside the
IMXI2C or OMAPI2C struct, create companion *_free functions to go
back to the outer pointer.

All this is temporary until allocation will be handled entirely by
qgraph.

Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: c0825c63cfae0d4af1f1f91867c42e609f3ed13c
      
https://github.com/qemu/qemu/commit/c0825c63cfae0d4af1f1f91867c42e609f3ed13c
  Author: Paolo Bonzini <address@hidden>
  Date:   2019-06-03 (Mon, 03 Jun 2019)

  Changed paths:
    M tests/Makefile.include
    M tests/libqos/i2c-imx.c
    M tests/libqos/i2c-omap.c
    M tests/libqos/i2c.c
    M tests/libqos/i2c.h

  Log Message:
  -----------
  libqos: convert I2C to qgraph

Create an i2c-bus interface, corresponding to the I2CAdapter struct.
Wrap IMXI2C and OMAPI2C with a QOSGraphObject, and add the get_driver
function to retrieve the I2CAdapter.

The conversion is still not complete; for simplicity, i2c_recv and
i2c_send (along with their wrappers) still take an adapter/address
pair.  Fixing that would be complicated until the tests are converted
to qgraph, so it is left for after the conversion.

Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: 48963982e55a1c206ea20bed600e188655af2b4b
      
https://github.com/qemu/qemu/commit/48963982e55a1c206ea20bed600e188655af2b4b
  Author: Paolo Bonzini <address@hidden>
  Date:   2019-06-03 (Mon, 03 Jun 2019)

  Changed paths:
    M tests/Makefile.include
    A tests/libqos/arm-n800-machine.c

  Log Message:
  -----------
  libqos: add ARM n800 machine object

This is used to test omap_i2c.

Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: 751a7a5d00b23e1977c0c082fe041efbde77d06c
      
https://github.com/qemu/qemu/commit/751a7a5d00b23e1977c0c082fe041efbde77d06c
  Author: Paolo Bonzini <address@hidden>
  Date:   2019-06-03 (Mon, 03 Jun 2019)

  Changed paths:
    M tests/Makefile.include
    A tests/libqos/arm-imx25-pdk-machine.c

  Log Message:
  -----------
  libqos: add ARM imx25-pdk machine object

This is used to test imx_i2c.

Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: 93c3fe2a349970aaba8d196b8c2cbcd7c472bb81
      
https://github.com/qemu/qemu/commit/93c3fe2a349970aaba8d196b8c2cbcd7c472bb81
  Author: Paolo Bonzini <address@hidden>
  Date:   2019-06-03 (Mon, 03 Jun 2019)

  Changed paths:
    M tests/Makefile.include
    M tests/libqos/i2c-omap.c
    M tests/libqos/i2c.h
    M tests/pca9552-test.c
    M tests/tmp105-test.c

  Log Message:
  -----------
  tests: convert OMAP i2c tests to qgraph

This way, pca9952-test and tmp105-test will run for every machine
that exposes an i2c-bus.

Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: 8130dbcbcda15b3fe5ae1da76bf48868c4ce90fb
      
https://github.com/qemu/qemu/commit/8130dbcbcda15b3fe5ae1da76bf48868c4ce90fb
  Author: Paolo Bonzini <address@hidden>
  Date:   2019-06-03 (Mon, 03 Jun 2019)

  Changed paths:
    M tests/Makefile.include
    M tests/ds1338-test.c
    M tests/libqos/i2c-imx.c
    M tests/libqos/i2c.h

  Log Message:
  -----------
  tests: convert ds1338-test to qtest

This way, ds1338-test will run for every machine that exposes
an i2c-bus.

Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: 06599472ec40efef3de7cb2bc98d61e8d4b18a63
      
https://github.com/qemu/qemu/commit/06599472ec40efef3de7cb2bc98d61e8d4b18a63
  Author: Paolo Bonzini <address@hidden>
  Date:   2019-06-03 (Mon, 03 Jun 2019)

  Changed paths:
    M tests/ds1338-test.c
    M tests/libqos/i2c.c
    M tests/libqos/i2c.h
    M tests/pca9552-test.c
    M tests/tmp105-test.c

  Log Message:
  -----------
  libqos: i2c: move address into QI2CDevice

This removes the hardcoded I2C address from the tests.  The address
is passed via QOSGraphEdgeOptions to i2c_device_create and stored
in the QI2CDevice.

The i2c_send and i2c_recv functions, along with their wrappers,
therefore, can be changed to take a QI2CDevice rather than an
adapter/address pair.

Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: f6adb8e7e3ed945a6ab36edd4c56a49a171761c0
      
https://github.com/qemu/qemu/commit/f6adb8e7e3ed945a6ab36edd4c56a49a171761c0
  Author: Paolo Bonzini <address@hidden>
  Date:   2019-06-03 (Mon, 03 Jun 2019)

  Changed paths:
    A .patchew.yml

  Log Message:
  -----------
  ci: store Patchew configuration in the tree

Patchew cannot yet retrieve the configuration from the QEMU Git tree, but
this is planned.  In the meanwhile, let's start storing it as YAML
so that the Patchew configuration (currently accessible only to administrators)
is public and documented.

Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: 7f27154d5042bae6fd9ac200e23a28ecca3387a0
      
https://github.com/qemu/qemu/commit/7f27154d5042bae6fd9ac200e23a28ecca3387a0
  Author: Marc-André Lureau <address@hidden>
  Date:   2019-06-03 (Mon, 03 Jun 2019)

  Changed paths:
    M configure

  Log Message:
  -----------
  configure: remove tpm_passthrough & tpm_emulator

This is a left-over from commit 7aaa6a16373 "tpm: express dependencies
with Kconfig".

Signed-off-by: Marc-André Lureau <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: c87759ce876a7a0b17c2bf4f0b964bd51f0ee871
      
https://github.com/qemu/qemu/commit/c87759ce876a7a0b17c2bf4f0b964bd51f0ee871
  Author: Alex Williamson <address@hidden>
  Date:   2019-06-03 (Mon, 03 Jun 2019)

  Changed paths:
    M hw/core/machine.c
    M hw/i386/pc.c
    M hw/i386/pc_q35.c
    M include/hw/boards.h
    M include/hw/i386/pc.h

  Log Message:
  -----------
  q35: Revert to kernel irqchip

Commit b2fc91db8447 ("q35: set split kernel irqchip as default") changed
the default for the pc-q35-4.0 machine type to use split irqchip, which
turned out to have disasterous effects on vfio-pci INTx support.  KVM
resampling irqfds are registered for handling these interrupts, but
these are non-functional in split irqchip mode.  We can't simply test
for split irqchip in QEMU as userspace handling of this interrupt is a
significant performance regression versus KVM handling (GeForce GPUs
assigned to Windows VMs are non-functional without forcing MSI mode or
re-enabling kernel irqchip).

The resolution is to revert the change in default irqchip mode in the
pc-q35-4.1 machine and create a pc-q35-4.0.1 machine for the 4.0-stable
branch.  The qemu-q35-4.0 machine type should not be used in vfio-pci
configurations for devices requiring legacy INTx support without
explicitly modifying the VM configuration to use kernel irqchip.

Link: https://bugs.launchpad.net/qemu/+bug/1826422
Fixes: b2fc91db8447 ("q35: set split kernel irqchip as default")
Signed-off-by: Alex Williamson <address@hidden>
Reviewed-by: Peter Xu <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: e2a58ff493a2e00db3e963c1839c5374500110f2
      
https://github.com/qemu/qemu/commit/e2a58ff493a2e00db3e963c1839c5374500110f2
  Author: Peter Maydell <address@hidden>
  Date:   2019-06-03 (Mon, 03 Jun 2019)

  Changed paths:
    A .patchew.yml
    M configure
    M hw/arm/imx25_pdk.c
    M hw/core/machine.c
    M hw/i386/pc.c
    M hw/i386/pc_q35.c
    M hw/misc/edu.c
    M include/exec/memory.h
    M include/hw/boards.h
    M include/hw/i386/pc.h
    M memory.c
    M scripts/checkpatch.pl
    M target/i386/cpu.c
    M target/i386/cpu.h
    M tests/Makefile.include
    M tests/ds1338-test.c
    A tests/libqos/arm-imx25-pdk-machine.c
    A tests/libqos/arm-n800-machine.c
    M tests/libqos/i2c-imx.c
    M tests/libqos/i2c-omap.c
    M tests/libqos/i2c.c
    M tests/libqos/i2c.h
    M tests/libqos/qgraph.c
    M tests/libqos/qgraph.h
    M tests/pca9552-test.c
    M tests/qos-test.c
    M tests/test-thread-pool.c
    M tests/tmp105-test.c
    M vl.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* Revert q35 to kernel irqchip (Alex)
* edu device fixes (Li Qiang)
* cleanups (Marc-André, Peter)
* Improvements to -accel help
* Better support for IA32_MISC_ENABLE MSR (Wanpeng)
* I2C test conversion to qgraph (Paolo)

# gpg: Signature made Mon 03 Jun 2019 14:20:12 BST
# gpg:                using RSA key BFFBD25F78C7AE83
# gpg: Good signature from "Paolo Bonzini <address@hidden>" [full]
# gpg:                 aka "Paolo Bonzini <address@hidden>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* remotes/bonzini/tags/for-upstream: (24 commits)
  q35: Revert to kernel irqchip
  configure: remove tpm_passthrough & tpm_emulator
  ci: store Patchew configuration in the tree
  libqos: i2c: move address into QI2CDevice
  tests: convert ds1338-test to qtest
  tests: convert OMAP i2c tests to qgraph
  libqos: add ARM imx25-pdk machine object
  libqos: add ARM n800 machine object
  libqos: convert I2C to qgraph
  libqos: split I2CAdapter initialization and allocation
  imx25-pdk: create ds1338 for qtest inside the test
  pca9552-test: do not rely on state across tests
  libqos: fix omap-i2c receiving more than 4 bytes
  libqos: move common i2c code to libqos
  qgraph: fix qos_node_contains with options
  qgraph: allow extra_device_opts on contains nodes
  edu: uses uint64_t in dma operation
  edu: mmio: allow 64-bit access in read dispatch
  edu: mmio: allow 64-bit access
  i386: Enable IA32_MISC_ENABLE MWAIT bit when exposing mwait/monitor
  ...

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/ad88e4252f09...e2a58ff493a2